Patents Assigned to S.A.R.L.
  • Publication number: 20010047594
    Abstract: A certain quantity of product to be dried, in powder or granular form, is sucked into a vessel located inside a vacuum container. The vessel is heated by a heat transfer fluid circulating in a gap made between an inner wall and an outer wall of the vessel. The vessel is made to vibrate by a vibrator so that the product comes constantly into contact with the heated inner wall in such a way that the product is dried.
    Type: Application
    Filed: December 13, 2000
    Publication date: December 6, 2001
    Applicant: Zanchetta & C. S.r.l.
    Inventor: Vittoriano Marcheschi
  • Publication number: 20010048133
    Abstract: An LDMOS structure is formed in a region of a first type of conductivity of a semiconductor substrate and comprises a gate, a drain region and a source region. The source region is formed by a body diffusion of a second type of conductivity within the first region, and a source diffusion of the first type of conductivity is within the body diffusion. An electrical connection diffusion of the second type of conductivity is a limited area of the source region, and extends through the source diffusion and reaches down to the body diffusion. At least one source contact is on the source diffusion and the electrical connection diffusion. The LDMOS structure further comprises a layer of silicide over the whole area of the source region short-circuiting the source diffusion and the electrical connection diffusion. The source contact is formed on the silicide layer.
    Type: Application
    Filed: May 22, 2001
    Publication date: December 6, 2001
    Applicant: STMicroelectronics S.r.l.
    Inventors: Giuseppe Croce, Alessandro Moscatelli, Alessandra Merlini, Paola Galbiati
  • Patent number: 6327184
    Abstract: The read circuit comprises an array branch having an input array node connected, via an array bit line, to an array cell; a reference branch having an input reference node connected, via a reference bit line, to a reference cell; a current-to-voltage converter connected to an output array node of the array branch and to an output reference node of the reference branch to supply on the output array node and the output reference node the respective electric potentials correlated to the currents flowing in the array memory cell and, respectively, in the reference memory cell; and a comparator connected at input to the output array node and output reference node and supplying as output a signal indicative of the contents stored in the array memory cell; and an array decoupling stage arranged between the input array node and the output array node to decouple the electric potentials of the input and output array nodes from one another.
    Type: Grant
    Filed: July 21, 2000
    Date of Patent: December 4, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Rino Micheloni, Giovanni Campardo, Luca Crippa
  • Patent number: 6326271
    Abstract: A MOS technology power device comprises a semiconductor substrate, a semiconductor layer of a first conductivity type superimposed over the semiconductor substrate, an insulated gate layer covering the semiconductor layer, a plurality of substantially rectilinear elongated openings parallel to each other in the insulated gate layer, a respective plurality of elongated body stripes of a second conductivity type formed in the semiconductor layer under the elongated openings, source regions of the first conductivity type included in the body stripes and a metal layer covering the insulated gate layer and contacting the body stripes and the source regions through the elongated openings.
    Type: Grant
    Filed: December 21, 2000
    Date of Patent: December 4, 2001
    Assignee: SGS-Thomson Microelectronics S.r.l.
    Inventors: Angelo Magri', Raffaele Zambrano, Ferruccio Frisina
  • Patent number: 6325238
    Abstract: A device for mutually fastening at least two portions of a cooking vessel grip; the portions to be fastened have a continuous seat for the insertion of a fastening element having opposite end heads, which cooperate with and on which rest respective annular stop surfaces formed at opposite ends of the seat to secure the grip portions to one another; the fastening element is defined by two plugs, respective end portions of which are inserted concentrically by a predetermined length one inside the other, and are connected to each other with a predetermined amount of radial interference; and the end portions of the plugs have been welded to each other, e.g. by means of an ultrasonic welding process, after the plugs are inserted inside the seat, so that the plugs define a monolithic fastening element.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: December 4, 2001
    Assignee: La Termoplastic F.B.M. S.r.l.
    Inventor: Marco Munari
  • Patent number: 6325922
    Abstract: A filter device for filtering plastic melts includes a filter wheel having cavities which are covered by screening elements. A pressure sensor is provided in a melt inflow line upstream of the filter wheel. A pressure sensor is also provided in a melt outflow line downstream of the filter wheel. The pressure sensors measure the pressure drop across the filter. The melt inflow and outflow lines are connected to a melt channel in the filter device, respectively. A melt return line is in connection via a pump and a discharge line with a backflushing slot. The discharge line is connected to an accelerator for increasing pressure in surges. A further melt return/discharge line is connected via a 3-way valve and a return line to the melt inflow line or to a disposal line.
    Type: Grant
    Filed: May 9, 2000
    Date of Patent: December 4, 2001
    Assignee: Arteva Technologies S.A.R.L.
    Inventors: Rainer Schaller, Eduard Lindner, Ralf Henke, Detlef Gneuss
  • Patent number: 6325021
    Abstract: Automatic equipment (1) to wash, disinfect, dry and stimulate the dairy animals'teats and in particular of dairy cows, comprising a washing part (3) supplied with an opening (5) to introduce the teat to be washed, containing two counterrotating brushes at horizontal axis (7a) and (7b) and spray devices (29) for the detergent and sanitizing solution, characterized in that it has a cup-like brush (8), placed below the two counterrotating brushes (7a) and (7b), with a rotation axis perfectly coincident with the entry of the teat in the equipment. To allow the two counterrotating brushes (7a) and (7b)to adjust to the teat conicity which is more accentuated near the udder, they are supplied as well with automatic devices for lateral movement of the rotation axis.
    Type: Grant
    Filed: January 13, 2000
    Date of Patent: December 4, 2001
    Assignee: C.T.A. S.r.l.
    Inventor: Felice Farina
  • Patent number: 6326408
    Abstract: The invention concerns the transformation of expanded polymers, in particular styrene polymers of the polystyrene type and styrene copolymers. More particularly it concerns a method for transforming polymers in an expanded solid state into a non-expanded amorphous state in the form of a re-usable malleable pasty magma. The method comprises a step for treating the polymer with a transforming solution containing a solvent, a non-fatty lubricant and optionally an alcohol. The invention concerns the transformation method proper, the transforming solution used in said method, the device for implementing said method and the magma resulting from implementing the method.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: December 4, 2001
    Assignee: Financiere Lea S.A.R.L.
    Inventor: Patrick Jura
  • Patent number: 6326827
    Abstract: A method for regulating the duty cycle of an input clock signal includes producing a second clock signal using a first adjustable delay circuit for varying the duty cycle. The second clock signal is applied to first and second circuits for respectively increasing and decreasing the duty cycle of the second clock signal. The method further includes monitoring if the first circuitry increases the duty cycle or if the second circuitry reducing the duty cycle saturates first. The duty cycle introduced by the first adjustable delay circuit is modified until saturation of the first and second circuits occur at substantially the same time.
    Type: Grant
    Filed: September 1, 2000
    Date of Patent: December 4, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Francesco Cretti, Nuccio Villa, Raffaele Izzo
  • Patent number: 6326229
    Abstract: To manufacture integrated semiconductor devices comprising chemoresistive gas microsensors, a semiconductor material body is first formed, on the semiconductor material body are successively formed, reciprocally superimposed, a sacrificial region of metallic material, formed at the same time and on the same level as metallic connection regions for the sensor, a heater element, electrically and physically separated from the sacrificial region and a gas sensitive element, electrically and physically separated from the heater element; openings are formed laterally with respect to the heater element and to the gas sensitive element, which extend as far as the sacrificial region and through which the sacrificial region is removed at the end of the manufacturing process.
    Type: Grant
    Filed: September 24, 1999
    Date of Patent: December 4, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Ubaldo Mastromatteo, Benedetto Vigna
  • Patent number: 6326266
    Abstract: A method of manufacturing a semiconductor virtual ground memory device having a matrix of floating gate memory cells formed on a semiconductor substrate with a plurality of continuous bit lines extending across the substrate as discrete parallel stripes. The device also includes a circuit portion for selection transistors and decode and address circuit portions having P-channel and N-channel MOS transistors. According to the method, N-wells are formed in at least one substrate portion to accommodate the P-channel transistors, active areas of all transistors are defined using a screening mask, and then an isolation layer is grown through the apertures of the screening mask. The screening mask is not open over the matrix region of the memory cells.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: December 4, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Claudio Brambilla, Valerio Cassio, Paolo Caprara, Manlio Sergio Creda
  • Patent number: 6323271
    Abstract: The invention is directed to polyester resins containing a silica selected from the group consisting of fumed silica, colloidal silica and silica beads, which resin has utility on the production of containers, particularly beverage containers, having reduced stickiness relative to containers made from the same resin but without the silica.
    Type: Grant
    Filed: November 3, 1998
    Date of Patent: November 27, 2001
    Assignee: Arteva North America S.A.R.L.
    Inventors: Sarah E. Caldwell, Jennifer King, John Woodward, Audrey C. Wu, Jim Schwietert
  • Patent number: 6321629
    Abstract: A machine for cutting panels, featuring pressure clamping devices for clamping the panels; the machine being characterized in that the carriage houses a supporting and fast-fit connecting element for supporting a cutting tool presenting a circular saw and a fast-fit connector for connection to the element.
    Type: Grant
    Filed: October 11, 1996
    Date of Patent: November 27, 2001
    Assignee: Selco S.r.l.
    Inventor: Valter Naldi
  • Patent number: 6324098
    Abstract: A reading circuit for nonvolatile memory cells, including a current-to-voltage converter, having an array load, connected to a memory cell, and a reference load connected to a reference generator. The array load and the reference load include PMOS transistors presenting an array shape factor (W/L)F and, respectively, a reference shape factor (W/L)R. The reading circuit further includes a charge pump that supplies a biasing voltage to a gate terminal of the memory cell. The biasing voltage is proportional to and higher than a supply voltage VDD. The ratio between the array shape factor (W/L)F and the reference shape factor (W/L)R is a non-integer.
    Type: Grant
    Filed: April 11, 2000
    Date of Patent: November 27, 2001
    Assignee: STMicroelectronics S.R.L.
    Inventors: Carmelo Condemi, Michele La Placa, Ignazio Martines
  • Patent number: 6321554
    Abstract: A flush-mount enclosure, particularly for making provisions for air-conditioning systems, comprising a box-like containment body for refrigeration tubing and a power supply cable, a condensation collector being associable, so that it can be removed and turned through 180°, with said box-like body in a downward region, said collector having at least an outlet arranged at a lateral end thereof.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: November 27, 2001
    Assignee: Tecnosystemi S.r.l.
    Inventor: Giorgio Rigoni
  • Patent number: 6322345
    Abstract: An apparatus for extruding edible paste which includes a supporting framework; a hopper for feeding paste to be extruded; at least one pair of sizing or lamination cylinders arranged in sequence downstream of the hopper; a belt conveyor which is suitable for receiving and removing the extruded and laminated paste that leaves the lamination cylinders; motor assembly for the lamination cylinders; one or more pairs of extraction and dosage elements which are arranged directly below the hopper and are suitable for extracting, in a uniform and pulsed manner, paste from the hopper to feed it to the lamination cylinders.
    Type: Grant
    Filed: May 20, 1998
    Date of Patent: November 27, 2001
    Assignee: Doge Food Processing Machinery S.r.l.
    Inventor: Giampietro Zaltron
  • Patent number: 6324238
    Abstract: A bit counter stage, particularly for memory addresses, including: a master storage circuit; a slave storage circuit which is connected to the master storage circuit; a circuit for enabling the transit of an external address in the master storage circuit; a circuit for enabling the connection between the slave storage circuit and the master storage circuit; a circuit for enabling the connection between the master storage circuit and the slave storage circuit; a circuit for calculating the product of the external address and of an input carry signal which arrives from a preceding counter stage; and a circuit for calculating an output carry signal on the basis of the external address and of the input carry signal.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: November 27, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventor: Luigi Pascucci
  • Patent number: 6323544
    Abstract: A metal frame patterned by die stamping has the outermost end portion of each patterned pin extending freely, without constraints, from a line of metal bridge connections (dam bar). The end face of each pin is also covered, as well as other surfaces of the frame, by a coating layer or multilayer of metals different from the metal of the die stamped frame. The coating layer or multilayer contains at least on its outer surface, a noble metal such as palladium or gold. The tip of the pins are not subject to cutting and/or trimming after plating the die stamped frame. The pins are not even cut or trimmed during separation of the patterned frame from the surrounding metal at the end of the encapsulation process, when the pins are then eventually bent into shape.
    Type: Grant
    Filed: March 5, 1999
    Date of Patent: November 27, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Andrea Giovanni Cigada, Fulvio Silvio Tondelli
  • Patent number: 6323799
    Abstract: A reading device having an A/D converter of n+m bits receiving an input signal correlated to the threshold voltage of the memory cell, and supplying a binary output word of n+m bits. The A/D converter is of a double conversion stage type, wherein a first A/D conversion stage carries out a first analog/digital conversion of the input signal to supply at the output a first intermediate binary word of n bits, and the second A/D conversion stage can be activated selectively to carry out a second analog/digital conversion of a difference signal correlated to the difference between the input signal and the value of the first intermediate binary word. The second A/D conversion stage generates at the output a second intermediate binary word of m bits that is supplied along with the first intermediate binary word to an adder, which generates the binary output word of n+m bits.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: November 27, 2001
    Assignee: STMicroelectronics S.r.l.
    Inventors: Marco Pasotti, Roberto Canegallo, Giovanni Guaitini, Pier Luigi Rolandi
  • Patent number: D451339
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: December 4, 2001
    Assignee: La Termoplastic F.B.M. S.r.l.
    Inventor: Marco Munari