Abstract: A display device for performing image processing by using a neural network including a plurality of layers, may obtain a plurality of pieces of model information respectively corresponding to pixels included in a first image based on object features respectively corresponding to the pixels; identify the plurality of pieces of model information respectively corresponding to the plurality of layers and the pixels input to the neural network based on information about a time point at which each of the pixels is processed in the neural network; update parameters of the plurality of layers, based on the plurality of pieces of model information; and obtain a second image by processing the first image via the plurality of layers to which the updated parameters are applied; and display the second image.

Abstract: A semiconductor memory device includes a memory cell array including memory cell row, each of which includes volatile memory cells, a row hammer management circuit, a repair control circuit and a connection logic. The row hammer management circuit counts access addresses associated with the memory cell rows to store counting values, and determines a hammer address associated with least one of the memory cell rows, which is intensively accessed, based on the counting values. The repair control circuit includes repair controllers, each of which includes a defective address storage, and repairs a defective memory cell row among the memory cell rows. The connection logic connects first repair controllers, which are unused for storing defective addresses, among the plurality of repair controllers, to the row hammer management circuit. The row hammer management circuit uses the first repair controllers as a storage resource to store a portion of the access addresses.

Abstract: A method for selection of a marker in an augmented reality (AR) environment is provided. The method includes capturing a scene in the augmented reality environment; extracting a set of region of interest from the scene captured; identifying a text in the region of interest or from a document associated to the region of interest; determining a set of phrase-action pairs from the text; generating a representation of a set of region of interest and a representation of a set of phrase-action pairs; calculating inter model similarity using the set of region of interest and the set of phrase-action pairs in common embedding space; computing intra model similarity by comparing the extracted ROI with a generated ROI and the extracted phrase-action with generated phrase actions; and selecting a phrase-action-ROI tuple having the highest intra modal similarity as the marker.

Abstract: An electronic device may include a storage device and at least one processor, wherein the at least one processor may obtain environmental information from a radio access network (RAN) to store the environmental information in the storage device, identify at least one first configuration value for scheduling a radio resource from the obtained environmental information, based on a learning model generated based on previously obtained environmental information, compare the first configuration value with at least one threshold value, adjust the first configuration value to a second configuration value, and transmit the adjusted second configuration value to the RAN.

Abstract: A storage device includes a nonvolatile memory device including a memory cell array and a storage controller to control the nonvolatile memory device. The memory cell array includes word-lines, memory cells and word-line cut regions dividing the word-lines into memory blocks. The storage controller includes an error correction code (ECC) engine including an ECC encoder and a memory interface. The ECC encoder performs a first ECC encoding operation on each of sub data units in user data to generate parity bits and generate a plurality of ECC sectors, selects outer cell bits to be stored in outer cells to constitute an outer ECC sector including the outer cell bits and performs a second ECC encoding operation on the outer ECC sector to generate outer parity bits. The memory interface transmits, to the nonvolatile memory device, a codeword set including the ECC sectors and the outer parity bits.

Abstract: A semiconductor memory device may be provided. The semiconductor memory device may include data storage patterns having respective first sides and respective second sides, a spin-orbit coupling (SOC) channel layer in common contact with the first sides of the data storage patterns, the SOC channel layer is configured to provide a spin-orbit torque to the data storage patterns, read access transistors connected between the second sides of respective ones of the data storage patterns and respective data lines, a write access transistor connected between a first end of the SOC channel layer and a source line, and a bit line connected to a second end of the SOC channel layer. Each of the data storage patterns comprises a free layer in contact with the SOC channel layer and an oxygen reservoir layer in contact with the free layer.

Abstract: An electronic apparatus includes a communication interface, a microphone, and a processor configured to obtain a first expectation value for a first sound to be output from a first external electronic apparatus and a second expectation value for a second sound to be output from a second external electronic apparatus, control the communication interface to transmit a first sound output request signal to the first external electronic apparatus, obtain a first measurement value for the first sound, control the communication interface to transmit a second sound output request signal to the second external electronic apparatus, obtain a second measurement value for the second sound, and obtain a correction value for one or more of the first measurement value and the second measurement value based on the obtained first measurement value, the obtained second measurement value, the obtained first expectation value, and the obtained second expectation value.

Abstract: A magnetic tunnel junction device includes a pinned magnetic layer, a free magnetic layer, and a tunnel barrier layer between the pinned and free magnetic layers. The free magnetic layer includes a first free layer, a second free layer spaced apart from the tunnel barrier layer with the first free layer therebetween, and a spacer layer between the first free layer and the second free layer. The first free layer and the second free layer are antiferromagnetically coupled to each other by the spacer layer, and each of the first free layer and the second free layer has a magnetization direction substantially perpendicular to an interface between the free magnetic layer and the tunnel barrier layer. A thermal stability of the free magnetic layer is in a range of 0 to 15.

Abstract: A display device includes a plurality of pixels. Each of the plurality of pixels includes a first, a second, and a third sub pixel that are disposed in a vertical direction. A first pixel of the plurality of pixels includes: a first sub pixel of the first pixel, a second sub pixel of the first pixel, which is disposed to be spaced apart from the first sub pixel of the first pixel by a first distance, and a third sub pixel of the first pixel, which is disposed to be spaced apart from the second sub pixel of the first pixel by the first distance. A second pixel of the plurality of pixels also includes a first sub pixel and a second sub pixel, which are separated apart by a second distance that is different from the first distance.

Abstract: A compound is represented by Chemical Formula 1. In Chemical Formula 1, G, R1, R2, R3, X1, Ar1 and Ar2 are each the same as in the specification.

Abstract: A semiconductor device includes a substrate including a first surface, and a second surface opposing the first surface. A via insulating layer extending through the substrate is disposed. A through-silicon via extending through the via insulating layer is disposed. The center of the through-silicon via is misaligned from the center of the via insulating layer. A blocking layer is disposed on the first surface. A first insulating layer is disposed on the blocking layer. A contact plug contacting the through-silicon via and extending through the first insulating layer and the blocking layer is disposed.

Abstract: A disclosed home appliance system comprises: a washer for washing clothes; a dryer for drying the clothes; an external server for communicating with the washer and the dryer; and a mobile device for controlling the washer and the dryer through the external server, wherein the mobile device can: acquire energy peak time information including time-specific energy billing information from the external server; display a first user interface for receiving the selection of a first interworking course of sequentially operating the washer and the dryer; determine a first cycle time of the first interworking course including a first washing time of the washer and a first drying time of the dryer, the first cycle time being required in order to perform the first interworking course; display a second user interface for receiving the selection of whether to perform the first interworking course on the basis of the energy peak time information and the first operation time; and transmit first interworking course informatio

Abstract: A semiconductor memory device may include a cell substrate including a cell array region and an extension region, a first mold structure on the cell substrate, a second mold structure on the first mold structure, a channel structure passing through the first and second mold structures on the cell array region, and a cell contact structure passing through the first and second mold structures on the extension region. The first mold structure and the second mold structure respectively include first gate electrodes and second gate electrodes sequentially stacked on the cell array region and stacked in a stepwise manner on the extension region. The cell contact structure includes a lower conductive pattern connected to one of the first gate electrodes, an upper conductive pattern connected to one of the second gate electrodes, and an insulating pattern separating the lower conductive pattern from the upper conductive pattern.

Abstract: Provided is a semiconductor package, including a first redistribution substrate, a first semiconductor chip on the first redistribution substrate, first bumps between the first redistribution substrate and the first semiconductor chip, a conductive structure on the first redistribution substrate and spaced apart from the first semiconductor chip, a second redistribution substrate on the first semiconductor chip, second bumps between the first semiconductor chip and the second redistribution substrate, a second semiconductor chip on the second redistribution substrate, a first mold layer between the first redistribution substrate and the second redistribution substrate, and on the first semiconductor chip, and a second mold layer on the second redistribution substrate and the second semiconductor chip, and spaced apart from the first mold layer.

Abstract: A semiconductor device including a gate structure on a substrate, a first gate spacer, and a second gate spacer may be provided. A sidewall of the gate structure includes a concave lower sidewall portion and an upper sidewall portion that is vertical with respect to an upper surface of the substrate. The first gate spacer is formed on the upper sidewall portion of the sidewall of the gate structure. The second gate spacer is formed on the concave lower sidewall portion of the sidewall of the gate structure and an outer sidewall of the first gate spacer. The second gate spacer contacts a lower surface of the first gate spacer and includes nitride.

Abstract: A display system including a host processor and a display driver integrated circuit may be provided. The host processor may generate a clock signal that swings swinging between a high level and a low level, generate and output a first synchronization signal based on the clock signal, generate a wakeup interrupt by measuring a frame update period of a display panel, generates frame data based on the first synchronization signal by enabling an image providing path based on the wakeup interrupt, and output the frame data for every frame update period. The display driver integrated circuit may receive the first synchronization signal and the frame data from the host processor, and control the display panel such that a frame image corresponding to the frame data is displayed on the display panel based on the first synchronization signal without storing the frame data.

Abstract: Provided are a graphene interconnect structure, an electronic device including the graphene interconnect structure, and a method of manufacturing the graphene interconnect structure. The graphene interconnect structure may include: a first oxide dielectric material layer; a second oxide dielectric material layer on a surface of the first oxide dielectric material layer and having a dielectric constant greater than that of the first oxide dielectric material layer; and a graphene layer on a surface of the second oxide dielectric material layer opposite to the surface on which the first oxide dielectric material layer is located.

Abstract: A method for sharing data in a transmitting-side electronic device communicating with a receiving-side electronic device is provided. The method includes connecting a voice call with the receiving-side electronic device; obtaining a sharing object to be shared with the receiving-side electronic device; and transmitting data corresponding to the sharing object to the receiving-side electronic device through a data session formed based on information related to the voice call.

Abstract: A target tracking method and apparatus is provided. The target tracking apparatus includes a memory configured to store a neural network, and a processor configured to extract feature information of each of a target included in a target region in a first input image, a background included in the target region, and a searching region in a second input image, using the neural network, obtain similarity information of the target and the searching region and similarity information of the background and the searching region based on the extracted feature information, obtain a score matrix including activated feature values based on the obtained similarity information, and estimate a position of the target in the searching region from the score matrix.

Abstract: A decoration panel for home appliances having excellent reflectivity and durability, the decoration panel being applicable to outer sides of various home appliances, a home appliance including the decoration panel, and a method for manufacturing the decoration panel. More specifically, the decoration panel for home appliances includes: an aluminum substrate with one surface in which an engraved pattern having a preset width and a preset depth is formed, the engraved pattern having micro unevenness formed in a surface of the engraved pattern; a porous aluminum oxide layer formed on the engraved pattern; and a sealing layer formed to close a plurality of pores of the porous aluminum oxide layer, wherein an edge of the aluminum substrate is in a Chamfering (C) shape or a Rounding (R) shape.