Abstract: A method for dynamic calibration correction in multi-frame, multi-exposure capture in a camera system includes receiving an amplified non-reference frame (e.g., with non-standard exposure value EV-4) to which a digital gain was applied and a reference frame (e.g., with standard exposure value EV0). The method includes generating a mask based on the reference frame and the amplified non-reference frame. The method includes estimating a scaling coefficient and an offset coefficient for each of a number of channels in the amplified non-reference frame, based on selected pixel locations in the generated mask. The method includes correcting a calibration of the amplified non-reference frame by applying the scaling coefficients for each of the channels. The method also includes outputting a calibration-corrected amplified non-reference frame to a multi-frame processor.

Abstract: A semiconductor device includes a substrate, an N-well area formed in the substrate, a first P-channel metal oxide semiconductor (PMOS) transistor having active regions formed in the N-well area, and a first N-channel metal oxide semiconductor (NMOS) transistor having active regions formed in the substrate. The first NMOS transistor includes a first N-type active region overlapping each of the substrate and the N-well area, when viewed from above a plane parallel to a top surface of the substrate.

Abstract: A method includes obtaining, using at least one processor, audio/video content. The method also includes processing, using the at least one processor, the audio/video content with a trained attention-based machine learning model to classify the audio/video content. Processing the audio/video content includes, using the trained attention-based machine learning model, generating a global representation of the audio/video content based on the audio/video content, generating a local representation of the audio/video content based on different portions of the audio/video content, and combining the global representation of the audio/video content and the local representation of the audio/video content to generate an output representation of the audio/video content. The audio/video content is classified based on the output representation.

Abstract: A device including a first structure and a second structure is provided.

Abstract: A micro light emitting display apparatus and a method of manufacturing the micro light emitting display apparatus are disclosed. The micro light emitting display apparatus includes a micro light emitting element, a driving transistor connected to the micro light emitting element, a switching transistor connected to the driving transistor, and a first opening is provided to expose a source region or a drain region of the switching transistor, and a gate electrode of the driving transistor is provided in the first opening and in contact with the source region or the drain region of the switching transistor.

Abstract: A semiconductor device including a well region in a substrate, an impurity region in the well region, a first active fin on the impurity region, a second active fin on the well region, and a connection pattern penetrating the second active fin and connected to the well region may be provided. The substrate and the impurity region include impurities having a first conductivity type. The well region includes impurities having a second conductivity type different from the first conductivity type. The first active fin includes a plurality of first semiconductor patterns that are spaced apart from each other in a direction perpendicular to a top surface of the substrate. The first semiconductor patterns and the impurity region include impurities having the first conductivity type.

Abstract: An electronic device, method, and computer readable medium for an invertible wavelet layer for neural networks are provided. The electronic device includes a memory and at least one processor coupled to the memory. The at least one processor is configured to receive an input to a neural network, apply a wavelet transform to the input at a wavelet layer of the neural network, and generate a plurality of subbands of the input as a result of the wavelet transform.

Abstract: The present disclosure relates to a pre-5th-Generation (5G) or 5G communication system to be provided for supporting higher data rates Beyond 4th-Generation (4G) communication system such as Long Term Evolution (LTE). The embodiment of the application provides a method for determining the activation state of a secondary cell and a UE. The method is applied to the technical field of wireless communication and comprises the following steps: acquiring secondary cell activation state indicator information, and then determining respective corresponding states of at least one secondary cell configured or reconfigured by a UE based on the secondary cell activation state indicator information, wherein the states include: an activation state and an inactivation state. The embodiment of the application realizes the reduction of the time delay for the user equipment to receive or send data and the reduction of the time required for deactivating a secondary cell, thereby reducing the power consumption of the UE.

Abstract: An integrated circuit (IC) device includes first and second fin-type semiconductor active regions on a substrate. A plurality of first semiconductor patterns are provided, which are stacked on the first fin-type active region as a first plurality of spaced-apart channel regions of a first FINFET. A plurality of second semiconductor patterns are provided, which are stacked on the second fin-type active region as a second plurality of spaced-apart channel regions of a second FINFET. A first gate structure is provided on the plurality of first semiconductor patterns. This first gate structure includes a first material region, which at least partially fills spaces between the first plurality of spaced-apart channel regions. A second gate structure is also provided on the plurality of second semiconductor patterns. The second gate structure includes second and third material regions, which at least partially fill spaces between the second plurality of spaced-apart channel regions.

Abstract: A wafer processing method includes supplying a first process gas into a wafer processing apparatus, lowering a temperature of the wafer, generating plasma using the first process gas, supplying a second process gas and mixing the second process gas with the plasma, performing a plasma process on the wafer using the plasma and the second process gas, and performing an annealing process on the wafer on which the plasma process has been performed. The lowering of the temperature of the wafer includes increasing an internal pressure of the wafer processing apparatus.

Abstract: A method for processing a 360-degree image includes determining a processing order of each of a plurality of segments constituting a 360-degree image, based on positions of the segments and parameters of a camera by which the 360-degree image is captured, obtaining distortion correction information according to distortion in the 360-degree image predicted based on parameters of an optical device via which at least a partial region of the 360-degree image is projected, and processing data of the at least a partial region of the 360-degree image according to the determined processing order and the obtained distortion correction information.

Abstract: A memory device accessed by circuits operating based on a first supply voltage. The memory device includes a cell array electrically connected to a plurality of word lines and a plurality of bit lines; a row driver configured to select one word line of the plurality of word lines based on a row address; a precharge circuit configured to precharge the plurality of bit lines based on the first supply voltage; a column driver configured to select at least one bit line of the plurality of bit lines based on a column address; and a read circuit configured to read data stored in the cell array through the at least one bit line. The cell array, the row driver, the column driver, and the read circuit operate based on a second supply voltage, which is higher than the first supply voltage.

Abstract: A semiconductor memory device includes a first semiconductor chip and a second semiconductor chip. Each semiconductor chip of the first and second semiconductor chips may include a cell array region and a peripheral circuit region. The cell array region may include an electrode structure including electrodes sequentially stacked on a body conductive layer and vertical structures extending through the electrode structure and connected to the body conductive layer. The peripheral circuit region may include a residual substrate on the body conductive layer and on which a peripheral transistor is located. A bottom surface of the body conductive layer of the second semiconductor chip may face a bottom surface of the body conductive layer of the first semiconductor chip.

Abstract: A white light emitting device is provided. The white light emitting device includes a blue light emitting diode configured to emit blue light having a peak wavelength in a first range of 440 nm to 455 nm; a first wavelength conversion material, based on being excited by the blue light, emits first light having a peak wavelength in a second range of 535 nm to 550 nm and a full width at half maximum (FWHM) of 60 nm or less; and a second wavelength conversion material, based on being excited by the blue light, emits second light having a peak wavelength in a third range of 620 nm to 660 nm, wherein a melanopic photopic ratio of white light emitted from the white light emitting device is 0.65 or less, and a color rendering index (CRI) of the white light is 80 or more.

Abstract: A semiconductor device includes an active region extending from a substrate in a vertical direction, source/drain regions spaced apart from each other on the active region, a fin structure between the source/drain regions on the active region, the fin structure including a lower semiconductor region on the active region, a stack structure having alternating first and second semiconductor layers on the lower semiconductor region, a side surface of at least one of the first semiconductor layers being recessed, and a semiconductor capping layer on the stack structure, an isolation layer covering a side surface of the active region, a gate structure overlapping the fin structure and covering upper and side surfaces of the fin structure, the semiconductor capping layer being between the gate structure and each of the lower semiconductor region and stack structure, and contact plugs electrically connected to the source/drain regions.

Abstract: Provided is a semiconductor device including a front-end-of-line (FEOL) structure and a back-end-of-line (BEOL) structure connected to the FEOL structure, wherein the FEOL structure includes at least one source/drain region and at least one gate structure, and the BEOL structure includes: a plurality of 1st fine metal lines arranged in a row with a same pitch, each of the plurality of 1st fine metal lines having a same width; and at least one 1st wide metal line formed at a side of the plurality of 1st fine metal lines, the 1st wide metal line having a width greater than the width of the 1st fine metal line, and wherein each of the plurality of 1st fine metal lines includes a material different from a material included in the 1st wide metal line.

Abstract: A semiconductor device includes an active pattern which includes a lower pattern, and a sheet pattern that is spaced apart from the lower pattern in a first direction, a gate structure on the lower pattern that includes a gate electrode that surrounds the sheet pattern, the gate electrode extending in a second direction that is perpendicular to the first direction, and a source/drain pattern on the lower pattern and in contact with the sheet pattern. A contact surface between the sheet pattern and the source/drain pattern has a first width in the second direction, and the sheet pattern has a second width in the second direction that is greater than the first width.

Abstract: A nanorod light emitting device, a method of manufacturing the same, and a display apparatus including the nanorod light emitting device are provided. The nanorod light emitting device includes a first semiconductor layer doped with a first conductivity type, a light emitting layer disposed on the first semiconductor layer, and a second semiconductor layer disposed on the light emitting layer and doped with a second conductivity type that is electrically opposite to the first conductivity type, wherein a distance between a lower surface of the first semiconductor layer and an upper surface of the second semiconductor layer is in a range of about 2 ?m to about 10 ?m, wherein a difference between a diameter of the upper surface of the second semiconductor layer and the lower surface of the first semiconductor layer is 10% or less of a diameter of the upper surface of the second semiconductor layer.

Abstract: Provided are an electronic device capable of providing text information corresponding to a user voice through a user interface and a method of controlling the electronic device. Specifically, an electronic device according to the present disclosure, when an image including at least one object is obtained, analyzes the image to identify the at least one object included in the image, and when a user voice is received, performs voice recognition on the user voice to obtain text information corresponding to the user voice, then identifies an object corresponding to the user voice among the at least one object included in the image, and displays a memo user interface (UI) including text information on an area corresponding to the object identified as corresponding to the user voice among areas on a display.

Abstract: An electronic device includes: a display panel, a display driving circuit, and at least one processor operatively connected to the display driving circuit. The at least one processor may be configured to: determine a resolution of each of a plurality of applications, and generate a frame image including regions corresponding to execution screens of the plurality of applications and determined resolutions of the plurality of applications, based at least partially on the resolutions of the plurality of applications and/or information on a display region corresponding to the execution screens of the plurality of applications on the display panel, and transmit, to the display driving circuit, the frame image and coordinate information of each of the regions included in the frame image.