Abstract: Disclosed is a 5G or pre-5G communication system for supporting a data transmission rate higher than that of a 4G communication system such as LTE. The present invention relates to a technique for implementing, in a compact form, a four-way power divider and combiner for a phased array system. More particularly, according to one embodiment of the present invention, a power divider including one input port and four output ports comprises an input terminal inductor having one end connected to the input port and the other end connected to the ground, an inductor group including four output terminal inductors, and four connection units for connecting the input port and the inductor group, wherein four secondary inductors are respectively connected to the four connection units so that four nodes are formed between the four connection units and the inductor group, and the output ports are respectively disposed on the four connection units between the input port and the inductor group.

Abstract: A fingerprint verification method and apparatus is disclosed. The fingerprint verification method may include obtaining an input fingerprint image, determining a matching region between the input fingerprint image and a registered fingerprint image, determining a similarity corresponding to the matching region, representing a determined indication of similarities between the input fingerprint image and the registered fingerprint image, relating the determined similarity to the matching region as represented in a matching region-based similarity, determining a result of a verification of the input fingerprint image based on the matching region-based similarity, and indicating the result of the verification.

Abstract: A program method of a nonvolatile memory device including a plurality of memory cells, each storing at least two bits of data, includes performing a first program operation based on a plurality of program voltages having a first pulse width to program first page data into selected memory cells connected to a selected word line among the plurality of memory cells; and performing a second program operation based on a plurality of program voltages having a second pulse width different from the first pulse width to program second page data into the selected memory cells in which the first page data is programmed.

Abstract: Disclosed is a clothes care apparatus capable of preventing the spreading of fire when a fire occurs on a printed circuit board (PCB) assembly. The clothes care apparatus may comprise: a PCB assembly; a PCB housing having an accommodation space for accommodating the PCB assembly, the PCB housing including a sidewall that forms the accommodation space; and a protective body filled into the accommodation space to cover the PCB assembly, wherein the sidewall may include guide wall having a height lower than or equal to a height of the protective body filled in the accommodation space.

Abstract: A semiconductor memory device includes a quadrature error correction circuit, a clock generation circuit and a data input/output (I/O) buffer. The quadrature error correction circuit performs a locking operation to generate a first corrected clock signal and a second corrected clock signal by adjusting a skew and a duty error of a first through fourth clock signals generated based on a data clock signal and performs a relocking operation to lock the second corrected clock signal to the first corrected clock signal in response to a relock signal. The clock generation circuit generates an output clock signal and a strobe signal based on the first corrected clock signal and the second corrected clock signal. The data I/O buffer generates a data signal by sampling data from a memory cell array based on the output clock signal and transmits the data signal and the strobe signal to a memory controller.

Abstract: Provided is a substrate processing apparatus, including a process chamber, a plasma shutter configured ascend to close the process chamber, and an upper liner on the process chamber, wherein the process chamber includes a process space in which a substrate process is performed, and an insertion passage adjacent to the process space and connecting the process space to an outside of the process chamber, wherein the upper liner includes an extension liner, wherein the extension liner faces a connection inner surface that upwardly extends from an inner end of a passage ceiling forming the insertion passage, and wherein, in a state where the plasma shutter ascends to close the process space, an upper end of the plasma shutter is inserted between the connection inner surface and the extension liner.

Abstract: The present application provides a method for transmitting data, which includes the following. A UE detects a physical downlink control channel, PDCCH, on a configured control resource set; the UE analyzes the detected PDCCH, and determines a method for dividing code blocks, CBs, and a method for rate matching of a physical downlink shared channel, PDSCH, and receives the PDSCH accordingly. By the method of the present application, when a service with a low delay requirement punches the time-frequency resources of other services, a performance of the other services is improved as much as possible, and the resource utilization rate is improved as much as possible.

Abstract: A method performed by a terminal in a wireless communication system is provided, the method includes receiving, from a base station, a sidelink configured grant for a sidelink transmission, transmitting, to another terminal, a sidelink signal based on the sidelink configured grant, generating a second hybrid automatic repeat request (HARQ) acknowledgement (HARQ-ACK) information based on whether first HARQ-ACK information corresponding to the sidelink signal is received from the another terminal, and reporting on an uplink channel, to a base station, the second HARQ-ACK information.

Abstract: An electronic apparatus includes a memory storing instructions, a plurality of chat-bots for responding to a plurality of questions, and a question classification model trained to identify a chat-bot among the plurality of chat-bots for responding to an input question, and a processor configured to execute the instructions to input the input question into the question classification model, the question classification model outputting a first chat-bot among the plurality of chat-bots for responding to the input question, acquire a first response for the input question, through the outputted first chat-bot, based on the acquired first response comprising information of a function that can be performed at the electronic apparatus, generate a question requesting to perform the function, and input the generated question into the question classification model, the question classification model outputting a second chat-bot among the plurality of chat-bots for responding to the generated question.

Abstract: A robot for outputting various reactions according to user behaviors is disclosed. A control method for a robot using an artificial intelligence model, according to the present disclosure, comprises the steps of: acquiring data related to at least one user; inputting the data related to the at least one user into the artificial intelligence model as learning data so as to learn a user state for each user of which there is at least one; determining representative reactions corresponding to the user states learned on the basis of the data related to the at least one user; and inputting the input data into the artificial intelligence model so as to determine a user state of a first user and controlling the robot on the basis of a representative reaction corresponding to the determined user state, when input data related to the first user among the users, of which there is a least one, is acquired.

Abstract: Embodiments of the present application provides an apparatus and a method for transmitting and receiving uplink data, and relates to the field of communication technologies. The method includes: performing uplink data transmission via a contention-based random access (RACH) procedure. The embodiments of the present application implement that, when transmitting uplink data in an RRC idle mode, the user equipment does not need to establish an RRC connection, and may directly transmit the uplink data via the RACH procedure, so that the power consumption of the UE may be reduced, and the waste of system resources may be reduced.

Abstract: A memory system includes a memory device including a plurality of non-volatile memories and an interface circuit connected to each of the plurality of non-volatile memories, and a memory controller connected to the interface circuit and configured to transmit/receive data according to a first clock, wherein the interface circuit is configured to divide the first clock into a second clock, according to the number of the plurality of non-volatile memories, and transmit/receive data to/from each of the plurality of non-volatile memories, according to the second clock.

Abstract: Disclosed is a display panel. The display panel comprises: a light-emitting device; a first protection layer disposed on the light-emitting device and having an anti-glare-treated surface; a second protection layer disposed on the first protection layer and having a surface having been subjected to at least one of an anti-glare treating and an anti-reflection treating; and a transparent layer containing a transparent material that allows visible lights to penetrate there through and absorbs or reflects ultraviolet rays and infrared rays.

Abstract: Provided are semiconductor circuits. A semiconductor circuit includes a first circuit configured to propagate a value of a first node to a second node based on a voltage level of a clock signal; a second circuit configured to propagate a value of the second node to a third node based on the voltage level of the clock signal; and a third circuit configured to determine a value of the third node based on a voltage level of the second node and the voltage level of the clock signal, wherein the first circuit comprises a first transistor gated to a voltage level of the first node, a second transistor connected in series with the first transistor and gated to the voltage level of the third node, and a third transistor connected in parallel with the first and second transistors and gated to a voltage level of the clock signal to provide the value of the first node to the second node.