Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming a preliminary via structure through a portion of a substrate; partially removing the substrate to expose a portion of the preliminary via structure; forming a protection layer structure on the substrate to cover the portion of the preliminary via structure that is exposed; partially etching the protection layer structure to form a protection layer pattern structure and to partially expose the preliminary via structure; wet etching the preliminary via structure to form a via structure; and forming a pad structure on the via structure to have a flat top surface.

Abstract: An electronic device is provided. The electronic device includes a camera including an image sensor including a plurality of pixels, a memory, and a processor that controls the camera. Each pixel included in the plurality of pixels includes a plurality of photodiodes and a microlens covering the plurality of photodiodes. The processor obtains phase images and image data for an external object using the plurality of photodiodes of the image sensor and authenticates the external object using the phase images and the image data. In addition, various embodiments recognized through the specification are possible.

Abstract: An electronic device is provided. The electronic device includes a housing, a battery included within the housing, a connector electrically connected to an external power supply device including an integrated circuit (IC) and exposed to a part of the housing, and a power management unit included within the housing and electrically connected to the connector, wherein the power management unit is configured to communicate with the IC of the external power supply device, and wherein the connector is configured to receive a first current of a first current value during at least a part of the communication and to receive a second current of a second current value greater than the first current value during at least a part in which the communication is not performed.

Abstract: A row hammer preventing circuitry including: a first table storing a count value representing a hit count and an address bit of multiple entries, each entry corresponding to access-requested target rows; a second table including safe bits and a safe bit counter; and a row hammer preventing logic to identify masking entries, on which a masking comparison is to be performed, among the entries on the basis of the safe bit counter, to determine a hit or miss on the basis of whether other bits except an MSB among address bits of an access-requested target row match other bits except an MSB among address bits of the masking entries, and to generate a control signal indicating an additional refresh on rows adjacent to rows corresponding to a masking entry whose hit count is greater than a threshold value.

Abstract: Disclosed is a wireless audio device, which includes at least one microphone, at least one speaker, at least one sensor, a processor, and a memory storing instructions, and the instructions that, when executed by the processor, cause the wireless audio device, while the wireless audio device outputs a sound for reducing an outside sound acquired through the at least one microphone through the at least one speaker, to identify a specified outside sound of the outside sound acquired through the at least one microphone, to output a notification sound for indicating that the specified outside sound is identified through the at least one speaker, to identify a motion of a user of the wireless audio device through the at least one sensor, in response to outputting the notification sound, and to stop the output of the sound for reducing the outside sound based on the identified motion.

Abstract: A volatile memory device may include; a first sense amplifier, a second sense amplifier spaced apart from the first sense amplifier in a first direction, a first mat disposed between the first sense amplifier and the second sense amplifier and including a first bit line connected to the first sense amplifier and a second bit line connected to the second sense amplifier, a third sense amplifier spaced apart from the second sense amplifier in a second direction, a fourth sense amplifier spaced apart from the third sense amplifier in the first direction, and a second mat disposed between the third sense amplifier and the fourth sense amplifier and including a first complementary bit line connected to the first sense amplifier.

Abstract: A semiconductor interconnect and an electrode for semiconductor devices may include a thin film including a multielement compound represented by Formula 1 and having a thickness equal to or less than about 50 nm, a grain size (A) to thickness (B) ratio (A/B) equal to or greater than about 1.2, and a resistivity equal to or less than about 200 ??·cm: Mn+1AXn??Formula 1 In Formula 1, M, A, X, and n are as described in the specification.

Abstract: Disclosed is an electronic device including: a housing including a first plate, a second plate facing away from the first plate, and a side member surrounding a space between the first plate and the second plate, connected to the second plate or integrally formed with the second plate, and including a first portion comprising a conductive material, wherein the first portion of the side member includes a plurality of through-holes aligned in a first direction substantially parallel to the first plate and a non-conductive material inside the through-holes; a structure disposed inside the space to face the through-holes and including at least one conductive path; and a wireless communication circuit electrically connected to the conductive path. Various other embodiments inferred from the specification are also possible.

Abstract: A semiconductor package includes a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate includes an insulating layer, and first, second, and third redistribution patterns disposed in the insulating layer. The first to third redistribution patterns are sequentially stacked in an upward direction and are electrically connected to each other. Each of the first to third redistribution patterns includes a wire portion that extends parallel to the top surface of the redistribution substrate. Each of the first and third redistribution patterns further includes a via portion that extends from the wire portion in a direction perpendicular to the top surface of the redistribution substrate. The second redistribution pattern furthers include first fine wire patterns that are less wide than the wire portion of the second redistribution pattern.

Abstract: A method of fabricating a semiconductor device include; seating a substrate having a substrate radius on an electrostatic chuck, applying first radio-frequency power to the electrostatic chuck to induce plasma in a region at least above the electrostatic chuck, and generating a magnetic field in the region at least above the electrostatic chuck using a magnet having a ring-shape and disposed above the electrostatic chuck by applying second radio-frequency power to the magnet, wherein the magnet has an inner radius ranging from about one-half to about one-fourth of the substrate radius.

Abstract: Disclosed are interconnection structures, semiconductor packages including the same, and methods of fabricating the same.

Abstract: An electronic device and a method thereof, which supports fast wireless charging, are provided.

Abstract: A semiconductor device includes transistors on a substrate, a first interlayer insulating layer on the transistors, a lower interconnection line in an upper portion of the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, an upper interconnection line in the second interlayer insulating layer, the upper interconnection line including a via portion penetrating the etch stop layer to contact the lower interconnection line, and an etch stop pattern on the etch stop layer and in contact with a first sidewall of the via portion. The second interlayer insulating layer extends on the etch stop pattern and a top surface of the etch stop layer free of the etch stop pattern. A dielectric constant of the etch stop pattern is higher than a dielectric constant of the etch stop layer.

Abstract: An interconnect structure may include a graphene-metal barrier on a substrate and a conductive layer on the graphene-metal barrier. The graphene-metal barrier may include a plurality of graphene layers and metal particles on grain boundaries of each graphene layer between the plurality of graphene layers. The metal particles may be formed at a ratio of 1 atom % to 10 atom % with respect to carbon of the plurality of graphene layers.

Abstract: A composite positive active material represented by Formula 1, LiaNibCOcMndMeO2??Formula 1 wherein, in Formula 1, M is zirconium (Zr), aluminum (Al), rhenium (Re), vanadium (V), chromium (Cr), iron (Fe), gallium (Ga), silicon (Si), boron (B), ruthenium (Ru), titanium (Ti), niobium (Nb), molybdenum (Mo), magnesium (Mg), or platinum (Pt), 1.1?a?1.3, b+c+d+e?1, 0?b?0.3, 0?c?0.3, 0<d?0.6, and 0?e?0.1, wherein, through atomic interdiffusion of lithium and the metal, the composite positive active material has a uniform distribution of lithium excess regions and a uniform degree of disorder of metal cations, and the metal cations have a disordered, irregular arrangement at an atomic scale. Also a method of preparing the composite positive active material, a positive electrode including the composite positive active material, and a lithium battery including the positive electrode.

Abstract: The present disclosure provides an electronic device including a touch screen display, at least one processor, and a memory, in which the memory stores a first application program including a user interface, and stores instructions that, with regard to execution of the first application, cause the at least one processor to execute the first application program, and display content on the touch screen display in response to the execution of the first application program, receive a first user input for selecting at least a portion of the content using the user interface, receive a second user input for adding at least a portion of the selected content to a clipboard using the user interface, check whether or not the application program associated with the second user input is the first application program, and allow or block the addition of the selected content to the clipboard based at least in part on the check. In addition to the above, various embodiments identified through the specification are possible.

Abstract: A semiconductor package includes a frame having a through-opening, a first semiconductor chip disposed in the through-opening and having a first active surface on which a first connection pad is disposed and a first inactive surface opposing the first active surface, a second semiconductor chip disposed on the first semiconductor chip and having a second active surface on which a second connection pad is disposed and a second inactive surface opposing the second active surface, first and second bumps electrically connected to the first and second connection pads, respectively, first and second dummy bumps disposed on a same level as levels of the first and second bumps, respectively, first and second posts electrically connected to the first and second bumps, respectively, a connection member including a redistribution layer electrically connected to each of the first and second posts, and a dummy post disposed between the frame and the connection member.

Abstract: An electronic device and a touch control method therefor are provided. The electronic device includes a housing, a flexible display that is drawn into or out of the housing by a sliding operation, a transparent window disposed in the housing so that a partial region of the flexible display drawn into the housing passes therethrough, and a transparent electrode layer disposed between the transparent window and the flexible display. At least one first touch electrode may be disposed in the transparent electrode layer. The at least one first touch electrode disposed in the transparent electrode layer may be activated. At least one second touch electrode arranged in the partial region of the flexible display may be deactivated.

Abstract: A storage controller for writing first data to a first memory cell by performing programming of the first memory cell N-times, where N is a positive integer greater than 1, includes a write amplification manager and a central processing unit. The write amplification manager checks whether the first data is invalid data before an Nth programming of the first memory cell is performed, and the central processing unit does not perform the N-th programming of the first memory cell when the first data is the invalid data.

Abstract: A neural network apparatus is disclosed, where the neural network apparatus includes one or more processors comprising a controller and one or more processing units. The controller is configured to determine a shared operand to be shared in parallelized operations as being either one of a pixel value among pixel values of an input feature map and a weight value among weight values of a kernel, based on either one or both of a feature of the input feature map and a feature of the kernel. The one or more processing units are configured to perform the parallelized operations based on the determined shared operand.