Abstract: The embodiments described herein include a method and device for adjusting trip points within a storage device. The method includes: obtaining one or more configuration parameters; and based on the one or more configuration parameters, determining a trip voltage. The method also includes comparing the trip voltage with an input voltage. The method further includes triggering a power fail condition in accordance with a determination that the input voltage is less than the trip voltage.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable secure erase in a memory device. In one aspect, the method includes detecting a secure erase trigger. The method further includes determining a secure erase algorithm from among one or more secure erase algorithms to use in accordance with the detected secure erase trigger. The method further includes performing a secure erase operation in accordance with the selected secure erase algorithm, the secure erase operation including: (1) signaling a secure erase condition to a plurality of controllers on the memory device, (2) erasing one or more non-volatile memory devices on the memory device, (3) monitoring the secure erase operation, and (4) recording data related to the secure erase operation.

Abstract: The embodiments described herein methods and devices that enhance the endurance of a non-volatile memory (e.g., flash memory). The method includes obtaining, for each of the plurality of die, an endurance metric. The method also includes sorting the plurality of die into a plurality of die groups based on their corresponding endurance metrics, where each die group includes one or more die and each die group is associated with a range of endurance metrics. In response to a write command specifying a set of write data, the method further includes writing the write data to the non-volatile memory by writing in parallel subsets of the write data to the one or more die assigned to a single die group of the plurality of die groups.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable biasing for wear leveling in storage systems. In one aspect, the method includes (1) determining, for each erase unit of a plurality of erase units in the storage medium, an age metric, (2) determining a representative age metric of the plurality of erase units, (3) for each respective erase unit of the plurality of erase units, biasing a respective garbage collection control metric for the respective erase unit in accordance with the age metric of the respective erase unit in relation to the representative age metric of the plurality of erase units to generate an adjusted garbage collection control metric for the respective erase unit, and (4) performing garbage collection for the storage medium in accordance with the adjusted garbage collection control metrics of the plurality of erase units.

Abstract: Systems, methods and/or devices that enhance the reliability with which data can be stored in and read from a memory utilize an error indicator to adaptively determine the soft information values used for decoding. For example, in some implementations, the method includes selecting a first set of one or more soft information values and receiving a read data command. The method further includes responding to the read data command by initiating performance of a data access operation to access data in a storage medium, the data access operation producing a syndrome weight; determining a first indicator based at least in part on the syndrome weight; based on the first indicator, selecting a second set of one or more soft information values; and decoding data obtained from the data access operation using the second set of one or more soft information values to produce a result.

Abstract: The various implementations described herein include systems, methods and/or devices used to enable power sequencing and a data hardening module in a storage device. In one aspect, the method includes determining whether a power supply voltage provided to the storage device is lower than an under-voltage threshold. The method further includes, in accordance with a determination that the power supply voltage is lower than the under-voltage threshold, performing a power fail operation, the power fail operation including: (1) signaling a power fail condition to a plurality of controllers on the storage device, (2) transferring data held in volatile memory to non-volatile memory, and (3) removing power from the plurality of controllers on the storage device.

Abstract: The various implementations described herein include systems, methods and/or devices used to manage heat flow for dissipating heat generated by electronic components in an electronic system (e.g., a memory system that includes closely spaced memory modules). In one embodiment, heat sinks are disposed on front sides of a first module and a second module in the electronic system, and at least one heat sink in the second module is disposed between at least two heat sinks in the first module. In some embodiments, the number of heat sinks and/or a subset of geometric parameters for the locations, sizes and shapes of the heat sinks are configured for the purpose of disturbing and mixing air flow that passes an air gap between the front sides of the first and second modules.

Abstract: A method for recovering corrupted data stored in persistent memory provides protection against, at least, loss of a single block, loss of a single page, as well as a high number of random retention errors. In some implementations, each data element in a quadrant of the persistent memory is protected by a row check word and a diagonal check word. Each row check word includes a value resulting from a mathematical operation performed on a respective row set comprising a set of data elements and each diagonal check word in the quadrant includes a value resulting from a mathematical operation performed on a respective diagonal set comprising a set of data elements distributed over the banks, blocks and pages in the quadrant so that failure of any one page, block or die in the quadrant does not result in the loss of any data in the quadrant.

Abstract: The various embodiments described herein include systems, methods and/or devices used to packaging non-volatile memory. In one aspect, the method includes, selecting, from a set of non-volatile memory die, a plurality of non-volatile memory die on which predefined die-level and sub-die level tests have been deferred until after packaging, in accordance with predefined criteria and predefined statistical die performance information corresponding to the set of non-volatile memory die. The method further includes packaging the selected plurality of non-volatile memory die into a memory device. After said packaging, the method further includes performing a set of tests on the plurality of non-volatile memory die in the memory device to identify respective units of memory within the non-volatile memory die in the memory device that meet predefined validity criteria, wherein the set of tests performed include the deferred predefined die-level and sub-die level tests.

Abstract: A storage controller is provided that contains multiple processors. In some embodiments, the storage controller is coupled to a flash memory module having multiple flash memory groups, each flash memory group corresponding to a distinct flash port in the storage controller, each flash port comprising an associated processor. Each processor handles a portion of one or more host commands, including reads and writes, allowing multiple parallel pipelines to handle one or more host commands simultaneously.

Abstract: A storage controller is provided that contains multiple processors. In some embodiments, the storage controller is coupled to a flash memory module having multiple flash memory groups, each flash memory group corresponding to a distinct flash port in the storage controller, each flash port comprising an associated processor. Each processor handles a portion of one or more host commands, including reads and writes, allowing multiple parallel pipelines to handle one or more host commands simultaneously.

Abstract: Approaches for recovering a node of a distributed transactional system. When a recovering node is being brought on-line, a copy of at least a portion of a first data store maintained by an existing node is created without ceasing to process transactions against the first data store at the existing node. The recovering node creates a second data store based on the copy of the first data store. While the recovering node creates the second data store, the recovering node stores committed transaction data received from a plurality of nodes. The committed transaction data describes transactions committed against data stores maintained by the sender of the committed transaction data. The recovering node may thereafter replay, against the second data store, any transactions identified by the committed transaction data that are associated with a global transaction number that is more recent than is a reference commit number.

Abstract: An error control system uses an error control code that corresponds to an error density location profile of a storage medium. The system includes an encoder configured to produce one or more codewords from data using an error control code generator matrix corresponding to the error density location profile of the storage medium. The system also includes a decoder configured to produce decoded data from one or more codewords using an error control code parity-check matrix corresponding to the error density location profile of the storage medium, where columns of the parity-check matrix are associated with corresponding data bits of the storage medium, rows of the parity-check matrix are associated with check bits, and each matrix element of the parity-check matrix having a predefined value indicates a connection between a particular data bit and a particular check bit.

Abstract: An error control encoding system produces a codeword from a data word, where the resulting codeword includes the data word and three or more parity segments produced using the data word. The system includes a first encoder to encode the data word in two or more first data segments in order to produce two or more first parity segments, where each of the two or more first data segments includes a respective sequential portion of the data word. The system includes a second encoder to encode the data word in one or more second data segments in order to produce a corresponding one or more second parity segments, where each of the one or more second data segments includes a respective sequential portion of the data word, and each of the one or more second data segments also includes a sequential portion of the data included in a plurality of the two or more first data segments.

Abstract: Implementations include systems, methods and/or devices suitable for use in a memory system that may enhance the performance of error control codes used to improve the reliability with which data can be stored and read. Some implementations include systems, methods and/or devices enabled to generate and utilize soft information for decoding encoded data read from a storage medium. More specifically, some implementations utilize a collection of characterization vectors that include soft information values for bit-tuples that may be read from the storage medium for various combinations of the storage medium characterization parameter values. Some implementations are enabled to determine and utilize read comparison signal values associated with one or more storage medium characterization parameter values.

Abstract: An error control decoding system decodes a codeword that includes a data word and two or more parity segments. The system includes a first decoder to decode the codeword by utilizing one or more first parity segments and the data word included in the codeword, and a second decoder to decode the codeword by utilizing one or more second parity segments and the data word included in the codeword, wherein the one or more first parity segments are different from the one or more second parity segments. An error estimation module estimates the number of errors in the codeword, and a controller selects which of the first decoder and second decoder to start decoding the codeword, wherein the selection is based on the estimate of the number of errors in the codeword provided by the error estimation module.

Abstract: Methods and systems are disclosed herein for detecting problems related to copyback programming. After the copyback data is read into the internal flash buffer, a part of the copyback data stored in the internal flash buffer (such as spare data) is analyzed to determine whether there are any errors in a part of the copyback data read. The analysis may be used by the flash memory in one or more ways related to the current copyback operation, subsequent copyback operations, subsequent treatment of the data in the current copyback operation, and subsequent treatment of the section in memory associated with the source page.

Abstract: A method and system for intelligent bit recovery identifies toggling bits, which change in value from one read to the next, and examines a subset of potential bit patterns. The subset is a fraction of the potential bit patterns, and is based on an understanding of the flash memory and the problems that may cause the toggling bits. The intelligent bit recovery may analyze at least one aspect of the flash memory to identify a problem, or plurality of problems, that is potentially causing the toggling bits, and to select the subset of potential bit patterns as potential solutions. The subset of potential bit patterns examined by the intelligent bit recovery is a small fraction of the entire set of potential bit patterns.

Abstract: Data versioning in a non-volatile memory. An object key associated with a data object is created. An index into an object table is generated using the object key. A version number is stored in conjunction with the data object stored in the non-volatile memory. In an object linked-list, the object key and the location information of the data object in the non-volatile memory are stored. A record associated with the data object is created in an object table. The record includes an index, a reference to the object linked-list, and the version number. The index is generated based on the object key.

Abstract: Approaches for processing an event in an objects store, such as an MySQL database management system or a memcached caching system, that are maintained on one or more solid state devices. A plurality of threads may be instantiated. Each of the threads may be configured to retrieve items from a queue of items. Each item in the queue of items may be associated with a particular event occurring within the object store. Each event is a message that indicates an activity requiring work has occurred within the object store. When a particular thread retrieves an item from the queue of items, the particular thread processes the particular event associated with the item retrieved by the particular thread. In this way, event handling in object stores such as MySQL and memcached may be performed more efficiently on a solid state device.