Patents Assigned to Sanyo
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Publication number: 20070146184Abstract: A signal processing circuit includes an auto gain control circuit and amplifies a signal with an amplification ratio determined based on a synchronous signal level having a positive potential with respect to a black level included in a high definition television video signal. In consequence, during the processing of the high definition television video signal, the signal processing is performed with a desired amplification ratio.Type: ApplicationFiled: December 20, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Toru Okada, Hiroyuki Ebinuma
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Publication number: 20070145427Abstract: A solid-state image sensor capable of suppressing generation of cross talk or a dark current and improving transfer efficiency of electrons (signal charge) can be obtained. This solid-state image sensor includes a plurality of pixels and a transfer gate electrode arranged in each of the plurality of pixels. An OFF-state voltage of the transfer gate electrode located on a boundary part between the pixels during an imaging period is lower than an OFF-state voltage of the transfer gate electrode located on the boundary part between the pixels during a transfer period.Type: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Mamoru Arimoto, Hayato Nakashima, Toshio Nakakuki
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Publication number: 20070147545Abstract: BB input units input baseband received signals. An initial weight data setting unit sets weighting coefficients to be utilized in the interval of a training signal as initial weighting coefficients. A gap compensating unit compensates control weighting coefficients with a gap error signal and outputs the updated weighting coefficients acquired as a result of the compensation. A weight switching unit selects the initial weighting coefficients in the interval of the training signal and selects the updated weighting coefficients in the interval of the data signal. Then the weight switching unit outputs the selected initial weighting coefficients and updated weighting coefficients as the weighting coefficients. A synthesizing unit weights the baseband received signals with the weighting coefficients and then sums them up.Type: ApplicationFiled: February 20, 2007Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventor: Yoshiharu Doi
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Publication number: 20070150641Abstract: A bus address selecting circuit is disclosed that selects addresses to be output to a first address bus connected to a first memory and a second address bus connected to a second memory, the bus address selecting circuit comprising an address output circuit that, based on a selecting bit composed of a predetermined plurality of bits in an instruction code, outputs addresses stored in first and second address registers out of a plurality of address registers as first and second addresses; and a bus selecting circuit that, based on predetermined higher-order n bits of at least one of the first and second addresses, outputs the first address to one of the first and second address buses and the second address to the other of the first and second address buses.Type: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Iwao Honda, Hideki Ohashi, Takashi Kuroda, Noriyuki Tomita
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Publication number: 20070146194Abstract: An encoding circuit is disclosed which comprises: a data-for-encoding storing register that stores n-bit data for encoding; a data-for-calculation storing register that stores m-bit data for calculation generated by shifting the data for encoding; a shifter that shifts the data for encoding stored in the data-for-encoding storing register, and shifts and inputs the shifted data into the data-for-calculation storing register; a first coefficient register that stores m-bit first coefficient data indicating a first coefficient for executing encoding; a first logic circuit that is inputted with the data for calculation stored in the data-for-calculation storing register and the first coefficient data stored in the first coefficient register and outputs the logical product for each bit of the data for calculation and the first coefficient data; and a second logic circuit that is inputted with m-bit data outputted from the first logic circuit and outputs the exclusive logical sum of the m-bit data as the encoded daType: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Iwao Honda, Hideki Ohashi, Takashi Kuroda, Noriyuki Tomita
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Publication number: 20070146522Abstract: S/N ratio deterioration resulting from dark current generated in each light-receiving pixel is suppressed in a frame transfer CCD image sensor. A predetermined off-voltage VL2 is applied to a transfer electrode before an on-voltage VH is applied to the transfer electrode to form a potential well and to start the accumulation of information charges into the potential well during an exposure period. The off-voltage VL2 is set to be lower than the off-voltage VL1 of the transfer clock signal during a frame transfer (period: t18 to t19). The off-voltage VL2 is set at the pinning voltage, for example. As the result of applying the off-voltage VL2, holes are captured at the interface state in the surface region of the semiconductor substrate, thereby making it difficult for the thermally excited electrons to jump from the valence band to the conduction band.Type: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Yoshihiro Okada, Kazutaka Itsumi
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Publication number: 20070146099Abstract: Electric circuit device comprises electric element and two conductive plates. The electric element includes two anode electrodes and two cathode electrodes and has relatively low impedance in a frequency range between 1×10?5 to 10 GHz. The one conductive plate has lower impedance than that of the conductive plate comprising the electric element and is connected between two anode electrodes. The other conductive plate has lower impedance than that of the conductive plate comprising the electric element and is connected between two cathode electrodes. As a result, the electric circuit device which has relatively low impedance and is capable of preventing the temperature rise is provided.Type: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kenichi Ezaki, Fumio Kameoka
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Publication number: 20070147137Abstract: A memory control circuit that controls m (=L/k) memories (first to mth memories), each of which has a k-bit width, the m memories storing data having a data width (D bits) of an integral multiple of k bits up to L bits, the circuit comprising: an address input circuit that determines a memory (nth memory) storing a first k bits of the data among the m memories, based on a start-position specification address which is a predetermined j bits of an A-bit address indicating a storage destination of the data, and inputs to the nth to mth memories a first specification address for specifying a storage destination of the data, the first specification address being an A-j bits of the A-bit address, which is the A-bit address without the predetermined j bits thereof, and inputs to the first to (n?1)th memories a second specification address obtained by adding one to the first specification address; a data input circuit that inputs a plurality of pieces of divided data obtained by dividing the data into k-bit data to tType: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Takashi Kuroda, Iwao Honda, Noriyuki Tomita, Hideki Ohashi
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Publication number: 20070145520Abstract: In a semiconductor device of the present invention, two epitaxial layers are formed on a P type single crystal silicon substrate. One of the epitaxial layers has an impurity concentration higher than that of the other epitaxial layer. The epitaxial layers are divided into a plurality of element formation regions by isolation regions. In one of the element formation regions, an NPN transistor is formed. Moreover, between a P type diffusion layer, which is used as a base region of the NPN transistor, and a P type isolation region, an N type diffusion layer is formed. Use of this structure makes it hard for a short-circuit to occur between the base region and the isolation region. Thus, the breakdown voltage characteristics of the NPN transistor can be improved.Type: ApplicationFiled: December 8, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Mitsuru Soma, Hirotsugu Hata, Minoru Akaishi
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Publication number: 20070147516Abstract: A frame memory successively stores post-filter data in such a manner that 1-column/1-row pre-filter data extending along the right and lower sides of each block are not overwritten by the post-filter data. Thus, the frame memory stores both the post-filter data used for inter-prediction and the pre-filter data remaining for intra-prediction of a next block. The inter-prediction and the intra-prediction can be simultaneously executed based on the data stored in the frame memory.Type: ApplicationFiled: December 26, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventor: Tetsuo Kosuge
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Publication number: 20070145590Abstract: This invention provides a semiconductor device that solves a problem that a pattern of a wiring formed on a back surface of a semiconductor substrate is reflected on an output image. A light receiving element (e.g. a CCD, an infrared ray sensor, a CMOS sensor, or an illumination sensor) is formed on a front surface of a semiconductor substrate, and a plurality of ball-shaped conductive terminals is disposed on a back surface of the semiconductor substrate. Each of the conductive terminals is electrically connected to a pad electrode on the front surface of the semiconductor substrate through a wiring layer. The wiring layer and the conductive terminal are formed on the back surface of the semiconductor substrate except in a region overlapping the light receiving element in a vertical direction, and are not disposed in a region overlapping the light receiving element.Type: ApplicationFiled: December 15, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Takashi Noma, Kazuo Okada, Shinzo Ishibe, Katsuhiko Kitagawa, Yuichi Morita, Shigeki Otsuka, Hiroshi Yamada, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
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Publication number: 20070147448Abstract: A nitride semiconductor laser device 20 has nitride semiconductor laser element 5 with dielectric layer 5b composed of AlN formed on light emitting face 5a. The nitride semiconductor laser element 5 is air-tightly sealed within package 1. The atmosphere within the package contains nitrogen with less than 5000 ppm water and more than 5% nitrogen. By controlling the atmosphere within package 1, less deterioration of output and less deterioration of reliability is achieved due to changes in the dielectric layer, which is composed of nitride formed at a facet of the semiconductor laser.Type: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Yasuyuki Bessho, Yasuhiko Nomura
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Publication number: 20070145420Abstract: The invention provides a semiconductor device that solves a problem of reflection of a pattern of a wiring formed on a back surface of a semiconductor substrate on an output image. A reflection layer is formed between a light receiving element and a wiring layer, that reflects an infrared ray toward a light receiving element the without transmitting it to the wiring layer, the infrared ray entering from a light transparent substrate toward the wiring layer through a semiconductor substrate. The reflection layer is formed at least in a region under the light receiving element uniformly or only under the light receiving element. Alternatively, an anti-reflection layer having a function of absorbing the entering infrared ray to prevent transmission thereof may be formed instead of the reflection layer.Type: ApplicationFiled: December 15, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Kazuo Okada, Katsuhiko Kitagawa, Takashi Noma, Shigeki Otsuka, Hiroshi Yamada, Shinzo Ishibe, Yuichi Morita, Noboru Okubo, Hiroyuki Shinogi, Mitsuru Okigawa
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Publication number: 20070144700Abstract: A method of easily manufacturing a metal mold able to add an antireflection structure to a lens or the like having a complicated surface shape such as an aspherical lens. The method comprises the steps of forming a silicon dioxide film (SiO2) film (2) on a curved-surface base substrate (1) formed in a specified shape, etching the silicon dioxide film (SiO2) film (2) using a resist mask (3) to form a specified shaped antireflection structure pattern, bonding a metal used for the metal mold (4) onto a silicon dioxide film (SiO2) film (21) on which this antireflection film pattern is formed to transfer the antireflection film pattern onto the metal used for the metal mold (4), and then re-moving the silicon dioxide film (SiO2) film to form a metal mold (4a) having an antireflection structure on the curved surface.Type: ApplicationFiled: March 18, 2005Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Shinji Kobayashi, Atsushi Yamaguchi, Satoshi Sumi, Masahiro Higuchi, Yoshiaki Maeno
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Publication number: 20070145530Abstract: In a semiconductor device of the present invention, an epitaxial layer is formed on a P type single crystal silicon substrate. Isolation regions are formed in the epitaxial layer, and are divided into a plurality of element formation regions. An NPN transistor is formed in one of the element formation regions. An N type diffusion layer is formed between a P type isolation region and a P type diffusion layer which is used as a base region of the NPN transistor. This structure makes the base region and the isolation region tend not to be short-circuited. Hence, the breakdown voltage characteristics of the NPN transistor can be improved.Type: ApplicationFiled: December 8, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRIC CO., LTD.Inventors: Mitsuru Soma, Hirotsugu Hata, Minoru Akaishi
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Publication number: 20070147449Abstract: A nitride semiconductor laser device 20 has nitride semiconductor laser element 5 with dielectric layer 5b composed of SiO2 formed on light emitting face 5a. The nitride semiconductor laser element 5 is air-tightly sealed within package 1. The atmosphere within the package contains oxygen with less than 5000 ppm water and more than 5% oxygen. By controlling the atmosphere within package 1, less deterioration of outputs and less deterioration of reliability is achieved due to changes in the dielectric layer formed at a facet of the semiconductor laser.Type: ApplicationFiled: December 21, 2006Publication date: June 28, 2007Applicant: Sanyo Electric Co., Ltd.Inventors: Yasuyuki Bessho, Yasuhiko Nomura
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Publication number: 20070149700Abstract: An organic-inorganic composite forming material which contains an organometallic polymer having an -M-O-M- bond (M denotes a metal atom), an acrylic monomer or oligomer having a hydrophilic group and inorganic particles. Preferably, the organometallic polymer has Si in the place of M and is obtained via hydrolysis and polycondensation of trialkoxysilane having a photo- or thermally-polymerizable group and dialkoxysilane having a phenyl group.Type: ApplicationFiled: December 12, 2006Publication date: June 28, 2007Applicant: SANYO ELECTRONIC CO., LTD.Inventors: Nobuhiko Hayashi, Mitsuaki Matsumoto, Keiichi Kuramoto, Masaya Nakai
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Patent number: 7236431Abstract: A semiconductor integrated circuit for an audio system includes a playback processing section for playing back at least an optical disk, a frequency measurement circuit for measuring a frequency of a radio signal from a tuner, a display control circuit for making a display device display at least the frequency of the radio signal, and a controller for controlling the playback processing section, the frequency measurement circuit, and the display control circuit, according to an external signal. The playback processing section, the frequency measurement circuit, the display control circuit, and the controller are formed on a single semiconductor chip.Type: GrantFiled: October 9, 2003Date of Patent: June 26, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Yoshihide Morimoto, Norio Harada
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Patent number: 7235428Abstract: A semiconductor device production method including: the step of forming a stopper mask layer of a first metal on a semiconductor substrate, the stopper mask layer having an opening at a predetermined position thereof; the metal supplying step of supplying a second metal into the opening of the stopper mask layer to form a projection electrode of the second metal; and removing the stopper mask layer after the metal supplying step.Type: GrantFiled: November 12, 2003Date of Patent: June 26, 2007Assignees: Rohm Co., Ltd., Mitsubishi Denki Kabushiki Kaisha, Sanyo Electric Co., Ltd.Inventors: Kazumasa Tanida, Yoshihiko Nemoto, Mitsuo Umemoto
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Patent number: 7236202Abstract: A movement control system useful for an apparatus comprising a movable member movable between two positions, a motor and a sensor device for producing an output value which changes during the movement of the movable member. The control system drives the motor in a first amount so as to move the movable member from one of the two positions to the other position and thereafter drives the motor in a second amount to move the movable member toward said one position when the output value of the sensor device remains unchanged. When the sensor device produces a changed output value, the system drives the motor in a third amount to move the movable member toward said one position. Subsequently, the system drives the motor in a fourth amount when the output value of the sensor device is different from the output value before the motor is driven in the first amount, so as to move the movable member toward said other position.Type: GrantFiled: October 9, 2003Date of Patent: June 26, 2007Assignee: Sanyo Electric Co., Ltd.Inventors: Shinichiro Okamura, Tetsuo Mise