Abstract: Various aspects of the present disclosure are directed toward a disc drive apparatus including a disc drive actuator assembly, and a vapor-trapping pathway. The vapor-trapping pathway, in certain embodiments, is formed by an inner surface of an eblock, outer surface of a pivot shaft, and first and second shields. The vapor-trapping pathway being designed to mitigate the flow of vapor into an interior enclosure of the disc drive from within a ball-bearing cartridge.

Abstract: Technologies are described herein for preventing adjacent track erasure in a storage device using position error signal compensation from a previously written track in a storage device. A first data track is written to a recording medium in the storage device while position error signal information regarding deviations of a read/write head from an ideal center of the first data track are recorded. The recorded position error signal information is then utilized during the writing of a second, adjacent data track to the recording medium to position the read/write head in order to compensate for non-uniformities in the writing of the first data track.

Abstract: Method and apparatus for managing data in a memory. In accordance with some embodiments, input write data having a selected logical address are stored in a rewriteable non-volatile (NV) buffer. A copy of the input write data is transferred to an NV main memory using a sloppy write process. A verify operation is subsequently performed to verify successful transfer of the copy of the input write data to the NV main memory using a hash value generated responsive to the input write data in the NV buffer.

Abstract: Provided herein is an apparatus including a rectangular array of rectangular protrusions in a first region corresponding to a data region; and a hexagonal array of circular protrusions in a second region corresponding to a servo region, wherein a first global protrusion density for the first region is greater than a second global protrusion density for the second region. Also provided herein is a method including forming a first template; forming a second template; and cross-imprinting the first template and the second template to form a third template corresponding to the foregoing apparatus.

Abstract: Methods and systems that include receiving data to be written to a NAND array in a controller; and writing the data to the NAND array, the NAND array including both type A NAND cells and type B NAND cells, wherein the type A NAND cells and the type B NAND cells have at least one structural difference.

Abstract: A data storage device can have one or more data bits that are stored on a data storage medium and accessed with a transducing head. The data bits may be organized on the data storage medium to provide a surface data capacity. A performance degradation can be predicted for the transducing head by a controller connected to the transducing head. In response to the predicted performance degradation, the surface data capacity of the data storage medium is decreased.

Abstract: Lock-free communication storage request reordering enables reduced latency and/or increased bandwidth in some usage scenarios, such as a multi-threaded driver context operating with a device, such as a storage device (e.g. a Solid-State Disk (SSD)) enabled to respond to a multiplicity of outstanding requests.

Abstract: A heat-assisted magnetic recording head is configured to write data to and read data from a magnetic recording medium. The head comprises a reader and a writer including a near-field transducer (NFT). The reader comprises a center which is laterally offset relative to a center of the writer to define a reader-writer offset (RWO) therebetween. A controller is configured to control the writer to write data to data tracks of the medium, detect a shift in the RWO, and in response to the detected shift in the RWO, control the writer to write data to a plurality of tracks defining a reserved band during an open period of the reserved band.

Abstract: An adaptive channel tracking algorithm performed by a flash memory system obtains disparity metrics and derivative metrics and uses a combination of the disparity and derivative metrics to estimate an optimal read reference voltage. The estimation of the optimal read reference voltage does not rely on assumptions about the underlying cell voltage distributions and results in a good estimate of the read reference voltage even if the standard deviations of the cell voltage distributions are different. In addition, the algorithm is relatively simple and less computationally intensive to perform than the known tracking algorithms.

Abstract: An apparatus includes an error correction code circuit and an error correction code selection circuit. The error correction code circuit may be configured to encode and decode data using any of a plurality of error correction codes. The error correction code selection circuit may be configured to control which of the plurality of error correction codes is used by the error correction code circuit to encode and decode data responsive to one or more reliability statistics and predetermined data characterizing distribution properties of each of the plurality of error correction codes.

Abstract: Provided is an apparatus, including a stationary component; a rotatable component, wherein the stationary component and the rotatable component are positioned for relative rotation; a first sealing means positioned in a radial channel at a first axial end of the rotatable component; a second sealing means positioned in an axial channel at a second axial end of the rotatable component; and a fluid reservoir adjacent to the first sealing means and extending radially outward from the first sealing means, wherein the fluid reservoir is positioned radially outward from the pump seal, and wherein the fluid reservoir extends radially outward from the pump seal.

Abstract: Mis-programming of MSB data in flash memory is prevented by using ECC decoding logic on the flash die that error corrects the LSB values prior to the LSB values being used in conjunction with the MSB values to determine the proper reference voltage ranges. Error correcting the LSB page data prior to using it in combination with the MSB page data to determine the reference voltage ranges ensures that the reference voltage ranges will be properly determined and programmed into the flash cells.

Abstract: Provided is an apparatus including a first storage device having a first write speed and a second storage device having a second write speed. The apparatus also includes a controller configured to manage a transfer of data to the first storage device or the second storage device. The amount of data stored on each of the first and second storage devices is based on the first write speed and the second write speed.

Abstract: A data storage device may be configured at least with a magnetic stack that contacts a magnetic shield. The magnetic stack can be disposed between first and second side shields and having at least one layer constructed of a CoFeNiB material. The magnetic shield may have a synthetic antiferromagnet with a non-magnetic layer disposed between first and second ferromagnetic layers.

Abstract: Devices that include a near field transducer (NFT); a gas barrier layer positioned on at least a portion of the NFT; and a wear resistance layer positioned on at least a portion of the gas barrier layer wherein the gas barrier layer includes tantalum oxide (TaO), titanium oxide (TiO), chromium oxide (CrO), silicon oxide (SiO), aluminum oxide (AlO), titanium oxide (TiO), zirconium oxide (ZrO), yttrium oxide (YO), magnesium oxide (MgO), beryllium oxide (BeO), niobium oxide (NbO), hafnium oxide (HfO), vanadium oxide (VO), strontium oxide (SrO), or combinations thereof; silicon nitride (SiN), aluminum nitride (Al), boron nitride (BN), titanium nitride (TiN), zirconium nitride (ZrN), niobioum nitride (NbN), hafnium nitride (HfN), chromium nitride (CrN), or combinations thereof; silicon carbide (SiC), titanium carbide (TiC), zirconium carbide (ZrC), niobioum carbide (NbC), chromium carbide (CrC), vanadium carbide (VC), boron carbide (BC), or combinations thereof; or combinations thereof.

Abstract: An apparatus includes a non-volatile memory and a controller. The controller is coupled to the non-volatile memory and configured to (i) measure a rate of free space consumption in the non-volatile memory, (ii) measure a rate of free space production in the non-volatile memory, and (iii) adjust a rate of a recycling process in response to the measured rate of free space consumption and the measured rate of free space production.

Abstract: A data storage device testing system may be configured with at least a test slot, a loader assembly, and an exchange assembly. The loader assembly can be positioned to respectively engage and disengage a test deck with the test slot. The exchange assembly may be configured to open an access port portion of the test deck and subsequently replace a tested data storage component housed within the first test deck with an untested data storage component.

Abstract: Method and apparatus for managing a memory, such as but not limited to a flash memory. In accordance with some embodiments, user data and associated metadata are stored in a memory. The metadata are arranged as a first sequence of snapshots of the metadata at different points in time during the operation of the memory, and a second sequence of intervening journals which reflect updates to the metadata from one snapshot to the next. Requested portions of the metadata are recovered from the memory using a selected snapshot in the first sequence and first and second journals in the second sequence.

Abstract: An apparatus and method are provided for a robust and shock resistant fluid dynamic bearing. A fluid sealing system with fluid pumping and capillary features provides increased reliability and performance for small form factor disc drive memory systems. Concerns of motor jog are addressed, jog being the rapid and repeated opening and closing of spaces between relatively rotatable components that can dispel oil from, or draw air into, these spaces. The fluid pumping capillary sealing system includes a fluid pumping groove with a rib portion and a slot portion for pumping fluid. The fluid pumping capillary sealing system also includes a capillary seal. In an aspect, a sweeping rib sweeps fluid toward the bearing. A truncated rib is situated adjacent to the sweeping rib, the truncated rib extending a shorter radial distance as compared to the sweeping rib and forming a plenum region.

Abstract: Apparatus and method for supplying electrical power to a device. A system on chip (SOC) integrated circuit includes a first region having a processing core and a second region characterized as an always on domain (AOD) power island having a power control block with an energy detector coupled to a host input line. First and second power supply modules respectively supply power to the first and second regions. The second power supply module includes a main switch between the first power supply module and a host input voltage terminal. The power control block opens the main switch to enter a low power mode during which no power is supplied to the first region, and the power control block closes the main switch to resume application of power to the first region responsive to the energy detector detecting electrical energy on the host input line.