Patents Assigned to SEH America, Inc.
  • Patent number: 6632688
    Abstract: A method for evaluating the concentration of impurities in gases used in depositing an epitaxial layer on a semiconductor substrate. The method includes processing a semiconductor substrate of known impurity levels in an epitaxial reactor, and measuring the impurity levels after epitaxial processing by drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together. In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of the substrate to getter impurities from the substrate into the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were transferred to the substrate from the epitaxial susceptor.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: October 14, 2003
    Assignee: SEH America, Inc.
    Inventor: Sergei V. Koveshnikov
  • Patent number: 6632277
    Abstract: A method of manufacturing a silicon wafer with robust gettering sites and a low concentration of surface defects is provided. The method comprises adding polycrystalline silicon to a crucible; adding a nitrogen-containing dopant to the crucible; heating the crucible to form a nitrogen-doped silicon melt; pulling a silicon crystal from the melt according to the Czochralski technique; forming a silicon wafer from the silicon crystal, wherein the silicon wafer includes a front surface and a back surface; placing the silicon wafer into a deposition chamber; heating the wafer; and simultaneously depositing an epitaxial first film of a desired compound onto the front surface of the wafer and a second film of the desired compound onto the back surface of the wafer.
    Type: Grant
    Filed: January 11, 2001
    Date of Patent: October 14, 2003
    Assignee: SEH America, Inc.
    Inventors: Gerald R. Dietze, Sean G. Hanna, Zbigniew J. Radzimski
  • Publication number: 20030190810
    Abstract: A method of polishing the surface of a semiconductor wafer such that the adherence of abrasive particles to the surface of the wafer is minimized, resulting in a semiconductor wafer having a reduced number of pits. The invented method has two stages. The first stage follows traditional polishing practice using chemical mechanical polishing. The second stage diverges from traditional practices and provides for a final polishing step or steps involving the polishing of the wafer with a polishing solution having no abrasive particles.
    Type: Application
    Filed: April 5, 2002
    Publication date: October 9, 2003
    Applicant: SEH America, Inc.
    Inventor: Steven P. Cooper
  • Patent number: 6630363
    Abstract: A method for evaluating the concentration of impurities in as-grown monocrystalline semiconductor ingots is provided. The method includes growing a monocrystalline semiconductor ingot, and measuring the bulk impurity levels of the ingot by drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together. In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of a sample of the monocrystalline semiconductor ingot to getter impurities from the sample into the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were grown into the monocrystalline semiconductor ingot.
    Type: Grant
    Filed: November 14, 2001
    Date of Patent: October 7, 2003
    Assignee: SEH America, Inc.
    Inventors: Sergei V. Koveshnikov, Douglas G. Anderson
  • Patent number: 6620632
    Abstract: A method for evaluating the concentration of impurities in a semiconductor substrate. The method includes drawing together at least a portion of the impurities and measuring the concentration of impurities that were drawn together. In one embodiment of the invention, a gettering layer is formed adjacent one or more surfaces of the substrate to getter impurities from the substrate to the gettering layer. The impurity concentration of the gettering layer is then measured and the results are used to determine at least a range of impurity concentrations that were in the substrate prior to the drawing together.
    Type: Grant
    Filed: April 6, 2000
    Date of Patent: September 16, 2003
    Assignee: SEH America, Inc.
    Inventors: Sergei V. Koveshnikov, Craig Rein
  • Patent number: 6620998
    Abstract: The invention teaches a method and apparatus for the generation of electric power by recycling the heat generated by various industrial processes. Thermophotovoltaic cells are used to convert the heat radiated from the industrial apparatus used to perform the various processes into electricity. Arrays of thermophotovoltaic cells placed around the apparatus, which may optionally be surrounded by an infrared (IR) emitter. The emitter serves to convert the IR radiation of the initial heat source into IR radiation having a more uniform wavelength. The cell arrays are spaced outward from a convection barrier tube and a short pass filter that may be placed around the IR emitter. A heat sink may be placed outside of the perimeter formed by the array of thermophotovoltaic cells, this serves to cool the thermophotovoltaic arrays, and also increases the power density of the cells, which in turn improves the power generation capacity of the array.
    Type: Grant
    Filed: October 25, 2001
    Date of Patent: September 16, 2003
    Assignee: SEH America, Inc.
    Inventor: Neil F. Salstrom
  • Patent number: 6611325
    Abstract: A surface scanning inspection system that uses a laser to scan the surface of a wafer for defects. The wafers are pre-aligned at a specified angle prior to the scan. This enables maximum light scattered off stacking fault defects, to be directed into a collector, enhancing the abilities of the system to classify the defect from other type of defects.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: August 26, 2003
    Assignee: Seh-America, Inc.
    Inventor: Douglas A. Clark
  • Publication number: 20030158770
    Abstract: A method and system for assigning and reporting a plurality of preventative maintenance workorders is generally implemented by a computer system, including a computer network, interfaces, and a database. The method and system permit assigning and reporting preventative maintenance workorders via an electronic mailbox associated with each interface. Maintenance data associated with the preventative maintenance procedure is recorded on a checksheet and stored in a database. If maintenance data exceeds an out of specification tolerance, the method and system include automatically notifying responsible personnel according to different levels of criticality. The method and system also permit creation of one of a plurality of workorders in a database.
    Type: Application
    Filed: February 19, 2002
    Publication date: August 21, 2003
    Applicant: SEH America, Inc.
    Inventors: Leif Carlson, Tony Feliciano, Michael M. Robinson
  • Patent number: 6606582
    Abstract: A universal system and method are provided for collecting a plurality of different types of process data, including particle measurement data, from remote locations without requiring manual intervention. The universal system includes a plurality of particle measurement instruments disposed at respective locations distributed about a facility in order to collect particle data. The universal system also includes a process data collection device for providing process data other than particle data, such as temperature, pressure, humidity level, switch position or the like. The universal system further includes a central computer that is located remote from the plurality of particle measurement instruments and from the process data collection device and that is interconnected with the plurality of particle measurement instruments and the process data collection device by means of a computer network.
    Type: Grant
    Filed: March 27, 2000
    Date of Patent: August 12, 2003
    Assignee: SEH America, Inc.
    Inventors: Matthew James Brinkman, Joel Wayne Mietzner, Marshall Rowe
  • Publication number: 20030135378
    Abstract: A method and system for reporting, assigning, and tracking facilities incident reports provides a single integrated approach to maintaining incident reports. Incident reports that affect personnel, production, equipment or the environment are reported via a computer network. Supervisors are notified of the incident report and assign corrective action. Other relevant personnel are notified of the incident report to classify the incident and complete corrective action.
    Type: Application
    Filed: January 11, 2002
    Publication date: July 17, 2003
    Applicant: SEH America, Inc.
    Inventors: Leif Carlson, Tony Feliciano, Michael M. Robinson
  • Patent number: 6583024
    Abstract: A silicon wafer having a thick, high-resistivity epitaxially grown layer and a method of depositing a thick, high-resistivity epitaxial layer upon a silicon substrate, such method accomplished by: a) providing a silicon wafer substrate and b) depositing a substantially oxygen free, high-resistivity epitaxial layer, with a thickness of at least 50 &mgr;m, upon the surface of the silicon wafer. The silicon wafer substrate may then, optionally, be removed from the epitaxial layer.
    Type: Grant
    Filed: December 6, 2001
    Date of Patent: June 24, 2003
    Assignee: SEH America, Inc.
    Inventors: Oleg V. Kononchuk, Sergei V. Koveshnikov, Zbigniew J. Radzimski, Neil A. Weaver
  • Publication number: 20030106485
    Abstract: An improved method of obtaining a wafer exhibiting high resistivity while preventing the reduction of resistivity due to the generation of oxygen donors provided by: a) using the CZ method to grow a silicon single crystal ingot in the presence of a magnetic field, such crystal having a resistivity of 100 &OHgr;·cm or more and an initial interstitial oxygen concentration of 5 to 10 ppma and b) processing the ingot into a wafer.
    Type: Application
    Filed: December 6, 2001
    Publication date: June 12, 2003
    Applicant: SEH America, Inc.
    Inventors: Oleg V. Kononchuk, Sergei V. Koveshnikov, Zbigniew J. Radzimski, Neil A. Weaver
  • Publication number: 20030109095
    Abstract: A method of growing epitaxial semiconductor layers with reduced crystallographic defects. The method includes etching the wafer surface and then growing an initial portion of the epitaxial layer under conditions of relatively high temperature and low source gas flow to heal defects in or on the surface of the substrate. Subsequently, the remainder of the epitaxial layer is grown under high growth rate conditions resulting from high source gas flow. The initial portion of the epitaxial layer acts as a low-defect seed layer by preventing defects in the surface of the substrate from propagating into the remainder of the epitaxial layer. However, the relatively high source gas flow permits the remainder epitaxial layer to be grown at a faster rate than the initial portion of the epitaxial layer.
    Type: Application
    Filed: December 16, 2002
    Publication date: June 12, 2003
    Applicant: SEH America, Inc.
    Inventors: Mark R. Boydston, Oleg V. Kononchuk
  • Publication number: 20030106482
    Abstract: An improved method of obtaining a wafer exhibiting high resistivity and high gettering effect while preventing the reduction of resistivity due to the generation of oxygen donors provided by: a) using the CZ method to grow a silicon single crystal ingot having a resistivity of 100 &OHgr;·cm or more, preferably 1000 &OHgr;·cm, and an initial interstitial oxygen concentration of 10 to 40 ppma while doping the crystal with an electrically inactive material such as nitrogen, carbon, or tin, b) processing the ingot into a wafer, and c) subjecting the wafer to an oxygen precipitation heat treatment whereby the residual interstitial oxygen content in the wafer is reduced to about 8 ppma or less.
    Type: Application
    Filed: December 6, 2001
    Publication date: June 12, 2003
    Applicant: SEH America, Inc.
    Inventors: Oleg V. Kononchuk, Sergei V. Koveshnikov, Zbigniew J. Radzimski, Neil A. Weaver
  • Publication number: 20030106481
    Abstract: A method of obtaining a wafer exhibiting high resistivity and high gettering effect while preventing the reduction of resistivity due to the generation of oxygen donors, and while further minimizing in-grown defects is provided by: a) using the CZ method to grow a silicon single crystal ingot having a resistivity of 100 &OHgr;·cm or more, preferably 1000 &OHgr;·cm, and an initial interstitial oxygen concentration of 10 to 40 ppma with a v/G ratio of from about 1×10−5 cm2/s·K to about 5×10−5 cm2/s·K, b) processing the ingot into a wafer, and c) subjecting the wafer to an oxygen precipitation heat treatment whereby the residual interstitial oxygen content in the wafer is reduced to about 8 ppma or less.
    Type: Application
    Filed: December 6, 2001
    Publication date: June 12, 2003
    Applicant: SEH America, Inc.
    Inventors: Oleg V. Kononchuk, Sergei V. Koveshnikov, Zbigniew J. Radzimski, Neil A. Weaver
  • Publication number: 20030106486
    Abstract: A high resistivity wafer which does not exhibit diminishing resistivity after device installation and method of making the high resistivity wafer comprising a) using the CZ method to grow a silicon single crystal ingot with a resistivity of 100 &OHgr;·cm or more, preferably 1000 &OHgr;·cm or more, and an initial interstitial oxygen concentration of 10 to 40 ppma, b) processing the ingot into a wafer, c) determining the total amount of heat treatment required to reduce the interstitial oxygen content of the wafer to about 8 ppma or less, d) determining the amount of heat treatment which will take place during the device fabrication process after wafer fabrication, e) subjecting the wafer to a partial oxygen precipitation heat treatment equivalent to the total amount of heat treatment, less the amount of heat treatment that will occur during device fabrication.
    Type: Application
    Filed: December 6, 2001
    Publication date: June 12, 2003
    Applicant: SEH America, Inc.
    Inventors: Oleg V. Kononchuk, Sergei V. Koveshnikov, Zbigniew J. Radzimski, Neil A. Weaver
  • Patent number: 6576501
    Abstract: A semiconductor wafer manufacturing process is disclosed wherein a double side polished wafer having oxygen induced stacking faults to provide extrinsic gettering on the back surface of the wafer. The process includes polishing the back surface of the wafer, and depositing a thin polysilicon film on the polished back surface. The wafer is then subjected to a thermal oxidation step, wherein the polysilicon film is consumed by the thermal oxidation step. The oxide layer is then stripped from the back surface, leaving oxygen induced stacking faults on the back surface of the wafer. The front surface of the wafer is then polished, thereby producing a double side polished wafer containing extrinsic gettering sites on the polished back surface.
    Type: Grant
    Filed: May 31, 2002
    Date of Patent: June 10, 2003
    Assignee: SEH America, Inc.
    Inventors: David A. Beauchaine, Timothy L. Brown, Sergei V. Koveshnikov, Romony San
  • Publication number: 20030105546
    Abstract: A system and method are provided for collecting, storing, and displaying a plurality of different types of process data, including accumulated and differential particle counts, from remote locations without requiring manual intervention. The system includes a plurality of particle measuring instruments disposed at respective locations distributed about a facility in order to collect particle data. The system also includes a process data collection device for providing process data other than particle data, such as temperature, pressure or humidity level. The system is interconnected with the plurality of particle measuring instruments and the process data collection device by means of a computer network. As such, the particle data and process data can be provided to a computer network for collection and storage. Thereafter, the particle data and the process data can be remotely displayed at a graphic user interface.
    Type: Application
    Filed: November 30, 2001
    Publication date: June 5, 2003
    Applicant: SEH America, Inc.
    Inventors: Michael M. Robinson, Leif Carlson
  • Publication number: 20030097975
    Abstract: A method of growing a crystalline ingot having a <110> orientation, such as a dislocation-free (“DF”) crystalline ingot, is provided. The method of manufacture includes providing a liquidous melt. Next, a seed crystal having a <110> crystal direction is contacted with the surface of the melt. The seed crystal is then withdrawn from the melt to thereby grow a neck. According to one embodiment, the seed elevation rate is automatically modified during the withdrawing step to reduce the diameter of the neck to greater than about 2.5 mm. Thereafter, the seed elevation rate is manually modified to alternate the diameter of the neck between about 2 mm and about 2.5 mm to thereby shape the neck into a recurring hourglass configuration. The neck is then withdrawn from the melt to grow a crystalline ingot having a <110> crystal direction and a diameter of at least about 200 mm.
    Type: Application
    Filed: December 9, 2002
    Publication date: May 29, 2003
    Applicant: SEH America, Inc.
    Inventors: Rosemary T. Nettleton, Robert L. Faulconer, Aaron W. Johnson
  • Patent number: 6569749
    Abstract: A novel method of generating intrinsic gettering sites in epitaxial wafers employs co-implanting silicon and oxygen into a substrate of the wafer, annealing the substrate at a low temperature, and then depositing the epitaxial layer on a surface of the substrate. The epitaxial deposition acts as an in-situ anneal to form dislocation loops that act as gettering sites. Oxygen precipitate clusters form during the method, which clusters act to anchor the dislocation loops and prevent them from gliding to the wafer surface over time.
    Type: Grant
    Filed: September 27, 1999
    Date of Patent: May 27, 2003
    Assignee: SEH America, Inc.
    Inventors: Witawat Wijaranakula, Jallepally Ravi, Naoto Tate