Patents Assigned to Semiconductor Energy Laboratories Co., Ltd.
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Patent number: 11961917Abstract: Provided is a semiconductor device in which deterioration of electric characteristics which becomes more noticeable as the semiconductor device is miniaturized can be suppressed. The semiconductor device includes a first oxide film, an oxide semiconductor film over the first oxide film, a source electrode and a drain electrode in contact with the oxide semiconductor film, a second oxide film over the oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the second oxide film, and a gate electrode in contact with the gate insulating film. A top end portion of the oxide semiconductor film is curved when seen in a channel width direction.Type: GrantFiled: June 21, 2022Date of Patent: April 16, 2024Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Kazuya Hanaoka, Daisuke Matsubayashi, Yoshiyuki Kobayashi, Shunpei Yamazaki, Shinpei Matsuda
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Patent number: 11963360Abstract: A highly integrated semiconductor device is provided. The semiconductor device includes a substrate, a prism-like insulator, a memory cell string including a plurality of transistors connected in series. The prism-like insulator is provided over the substrate. The memory cell string is provided on the side surface of the prism-like insulator. The plurality of transistors each include a gate insulator and a gate electrode. The gate insulator includes a first insulator, a second insulator, and a charge accumulation layer. The charge accumulation layer is positioned between the first insulator and the second insulator.Type: GrantFiled: April 21, 2021Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tomoaki Atsumi, Yuta Endo
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Patent number: 11961871Abstract: A display device with high resolution is provided. Manufacturing cost of a display device using a micro LED as a display element is reduced. The display device includes a substrate, a plurality of transistors, and a plurality of light-emitting diodes. The plurality of light-emitting diodes are provided in a matrix over the substrate. Each of the plurality of transistors are electrically connected to at least one of the plurality of light-emitting diodes. The plurality of light-emitting diodes are positioned closer to the substrate than the plurality of transistors are. The plurality of light-emitting diodes emit light to the opposite side of the substrate.Type: GrantFiled: April 26, 2019Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Koji Kusunoki, Shingo Eguchi, Yosuke Tsukamoto, Kazunori Watanabe, Kouhei Toyotaka
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Patent number: 11961918Abstract: A semiconductor device which has favorable electrical characteristics, a method for manufacturing a semiconductor device with high productivity, and a method for manufacturing a semiconductor device with a high yield are provided.Type: GrantFiled: August 24, 2022Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
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Patent number: 11963343Abstract: A semiconductor device capable of obtaining the threshold voltage of a transistor is provided. The semiconductor device includes a first transistor, a first capacitor, a first output terminal, a first switch, and a second switch. A gate and a source of the first transistor are electrically connected to each other. A first terminal of the first capacitor is electrically connected to the source. A second terminal and the first output terminal of the first capacitor are electrically connected to a back gate of the first transistor. The first switch controls input of a first voltage to the back gate. A second voltage is input to a drain of the first transistor. The second switch controls input of a third voltage to the source.Type: GrantFiled: August 22, 2022Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hitoshi Kunitake, Ryunosuke Honda, Tomoaki Atsumi
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Patent number: 11963374Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.Type: GrantFiled: January 24, 2022Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
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Patent number: 11961979Abstract: A semiconductor device capable of charging that is less likely to cause deterioration of a power storage device is provided. The amount of a charging current is adjusted in accordance with the ambient temperature. Charging under low-temperature environments is performed with a reduced charging current. When the ambient temperature is too low or too high, the charging is stopped. Measurement of the ambient temperature is performed with a memory element using an oxide semiconductor. The use of a memory element using an oxide semiconductor enables measurement of the ambient temperature and retention of the temperature information to be performed at the same time.Type: GrantFiled: July 3, 2019Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Takayuki Ikeda, Munehiro Kozuma, Takanori Matsuzaki, Ryota Tajima, Shunpei Yamazaki
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Patent number: 11961843Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.Type: GrantFiled: November 23, 2020Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hajime Kimura, Atsushi Umezaki, Shunpei Yamazaki
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Patent number: 11963430Abstract: An object is to provide a highly reliable display unit having a function of sensing light. The display unit includes a light-receiving device and a light-emitting device. The light-receiving device includes an active layer between a pair of electrodes. The light-emitting device includes a hole-injection layer, a light-emitting layer, and an electron-transport layer between a pair of electrodes. The light-receiving device and the light-emitting device share one of the electrodes, and may further share another common layer between the pair of electrodes. The hole-injection layer is in contact with an anode and contains a first compound and a second compound. The electron-transport property of the electron-transport layer is low; hence, the light-emitting layer is less likely to have excess electrons. Here, the first compound is the material having a property of accepting electrons from the second compound.Type: GrantFiled: April 14, 2023Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taisuke Kamada, Ryo Hatsumi, Daisuke Kubota, Naoaki Hashimoto, Tsunenori Suzuki, Harue Osaka, Satoshi Seo
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Patent number: 11960158Abstract: A semiconductor device including a large display portion with improved portability is provided. The display device includes a first display panel, a second display panel, and an adhesive layer. The area of the second display panel is larger than the area of the first display panel. The first display panel includes a first substrate, a second substrate, and a reflective liquid crystal element and a first transistor each positioned between the first substrate and the second substrate. The second display panel includes a first resin layer having flexibility, a second resin layer having flexibility, and a light-emitting element and a second transistor each positioned between the first resin layer and the second resin layer. The liquid crystal element has a function of reflecting light toward the second substrate side. The light-emitting element has a function of emitting light toward the second resin layer side.Type: GrantFiled: April 13, 2023Date of Patent: April 16, 2024Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Shingo Eguchi, Hideaki Kuwabara, Kazune Yokomizo
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Patent number: 11960185Abstract: Display data of pixels is updated at different timings. A scan line is connected to a first pixel and a second pixel, a first wiring is connected to the first pixel, and a second wiring is connected to the second pixel. In a first period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is updated is supplied to the first wiring, and setting data for setting a state where the display data of the second pixel is updated is supplied to the second wiring. In a second period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is not updated is supplied to the first wiring, and the setting data for setting the state where the display data of the second pixel is updated is supplied to the second wiring.Type: GrantFiled: March 19, 2019Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kouhei Toyotaka, Satoshi Yoshimoto, Kazunori Watanabe, Susumu Kawashima, Kei Takahashi
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Patent number: 11960174Abstract: A pixel electrode or a common electrode is a light-transmissive conductive film; therefore, it is formed of ITO conventionally. Accordingly, the number of manufacturing steps and masks, and manufacturing cost have been increased. An object of the present invention is to provide a semiconductor device, a liquid crystal display device, and an electronic appliance each having a wide viewing angle, less numbers of manufacturing steps and masks, and low manufacturing cost compared with a conventional device. A semiconductor layer of a transistor, a pixel electrode, and a common electrode of a liquid crystal element are formed in the same step.Type: GrantFiled: July 28, 2022Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Hajime Kimura
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Patent number: 11961842Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.Type: GrantFiled: July 21, 2023Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
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Patent number: 11959165Abstract: There have been cases where transistors formed using oxide semiconductors are inferior in reliability to transistors formed using amorphous silicon. Thus, in the present invention, a semiconductor device including a highly reliable transistor formed using an oxide semiconductor is manufactured. An oxide semiconductor film is deposited by a sputtering method, using a sputtering target including an oxide semiconductor having crystallinity, and in which the direction of the c-axis of a crystal is parallel to a normal vector of the top surface of the oxide semiconductor. The target is formed by mixing raw materials so that its composition ratio can obtain a crystal structure.Type: GrantFiled: April 13, 2021Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tetsunori Maruyama, Yuki Imoto, Hitomi Sato, Masahiro Watanabe, Mitsuo Mashiyama, Kenichi Okazaki, Motoki Nakashima, Takashi Shimazu
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Patent number: 11962013Abstract: The positive electrode active material layer includes a plurality of particles of a positive electrode active material and a reaction mixture where reduced graphene oxide is bonded to a polymer having a functional group as a side chain. The reduced graphene oxide has a sheet-like shape and high conductivity and thus functions as a conductive additive by being in contact with the plurality of particles of the positive electrode active material. The reaction mixture serves as an excellent binder since the reduced graphene oxide is bonded to the polymer. Therefore, even a small amount of the reaction mixture where the reduced graphene oxide is covalently bonded to the polymer excellently serves as a conductive additive and a binder.Type: GrantFiled: February 18, 2021Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Masaki Yamakaji, Kuniharu Nomoto
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Patent number: 11961994Abstract: To provide graphene oxide that has high dispersibility and is easily reduced. To provide graphene with high electron conductivity. To provide a storage battery electrode including an active material layer with high electric conductivity and a manufacturing method thereof. To provide a storage battery with increased discharge capacity. A method for manufacturing a storage battery electrode that is to be provided includes a step of dispersing graphene oxide into a solution containing alcohol or acid, a step of heating the graphene oxide dispersed into the solution, and a step or reducing the graphene oxide.Type: GrantFiled: January 31, 2022Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tatsuya Ikenuma, Yumiko Yoneda
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Patent number: 11961916Abstract: A novel memory device is provided. The memory device includes a plurality of first wirings extending in a first direction, a plurality of memory element groups, and an oxide layer extending along a side surface of the first wiring. Each of the memory element groups includes a plurality of memory elements. Each of the memory elements includes a first transistor and a capacitor. A gate electrode of the first transistor is electrically connected to the first wiring. The oxide layer includes a region in contact with a semiconductor layer of the first transistor. A second transistor is provided between the adjacent memory element groups. A high power supply potential is supplied to one or both of a source electrode and a drain electrode of the second transistor.Type: GrantFiled: July 29, 2019Date of Patent: April 16, 2024Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Tatsuya Onuki, Kiyoshi Kato, Tomoaki Atsumi, Shunpei Yamazaki
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Publication number: 20240121497Abstract: A small light-emitting device is provided. A light-emitting device which is less likely to produce a shadow is provided. A structure including a switching circuit for supplying a pulsed constant current and a light-emitting panel supplied with the pulsed constant current has been conceived.Type: ApplicationFiled: December 1, 2023Publication date: April 11, 2024Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiharu HIRAKATA, Nobuharu OHSAWA, Hisao IKEDA, Kazuhiko FUJITA, Akihiro KAITA
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Publication number: 20240120340Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.Type: ApplicationFiled: December 13, 2023Publication date: April 11, 2024Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI
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Publication number: 20240120341Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.Type: ApplicationFiled: December 13, 2023Publication date: April 11, 2024Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventor: Shunpei YAMAZAKI