Abstract: A leadframe is formed by chemically half-etching a sheet of conductive material. The half-etching exposes a first side surface of a first contact of the leadframe. A solder wettable layer is plated over the first side surface of the first contact. An encapsulant is deposited over the leadframe after plating the solder wettable layer.

Abstract: A transimpedance amplifier (TIA) for converting an input current at an input node into an output voltage at an output node, the TIA comprising: a first amplifier stage having a first input coupled to the input node and a first output; a feedback path between the first output and the first input; a second amplifier stage in the feedback path having a second input, the second input coupled to the first output of the first amplifier stage; a feedback resistor in the feedback path coupled between an output of the second amplifier stage and first input of the first amplifier stage; and an output stage, comprising: a load resistor coupled between a reference voltage node and a T-coil, the T-coil comprising first and second inductors coupled in series at an inductor node, the T-coil coupled between the first output and the load resistor, the inductor node coupled to the output node of the TIA.

Abstract: A semiconductor device has a substrate and leads formed on two or more sides of the substrate. An electrical component is disposed over the substrate and electrically connected to the lead with bumps or bond wires. The electrical component is encapsulated. A portion of the substrate is removed to form a wettable flank on at least three sides of the lead. The substrate has a molding compound and the lead is disposed within or adjacent to the molding compound. A portion of the molding compound can remain at corners of the substrate. The lead has a first surface or recessed surface on a first side of the lead, a second surface or recessed surface on a second side of the lead, and a third surface or recessed surface on a third side of the lead. A portion of a surface of the lead is plated.

Abstract: This application relates to transimpedance amplifier (TIA) apparatus, in particular to a TIA apparatus suitable for receiving data using burst mode communication. The apparatus has a transimpedance amplifier configured to generate a first voltage based on a current at an input node for an input signal. A controlled voltage source, such as a dummy TIA, generates a second voltage based on a first control current. A controller is configured to collectively control the first control current and a second control current based on an indication of input signal magnitude. The first control current controls the second voltage which may be used as a slicing level. The second control current is subtracted from the current at the input node and can provide a DC restore current.

Abstract: A semiconductor device has a substrate and leads formed on two or more sides of the substrate. An electrical component is disposed over the substrate and electrically connected to the lead with bumps or bond wires. The electrical component is encapsulated. A portion of the substrate is removed to form a wettable flank on at least three sides of the lead. The substrate has a molding compound and the lead is disposed within or adjacent to the molding compound. A portion of the molding compound can remain at corners of the substrate. The lead has a first surface or recessed surface on a first side of the lead, a second surface or recessed surface on a second side of the lead, and a third surface or recessed surface on a third side of the lead. A portion of a surface of the lead is plated.

Abstract: A semiconductor device includes a semiconductor wafer. A plurality of pillar bumps is formed over the semiconductor wafer. A solder is deposited over the pillar bumps. The semiconductor wafer is singulated into a plurality of semiconductor die after forming the pillar bumps while the semiconductor wafer is on a carrier. An encapsulant is deposited around the semiconductor die and pillar bumps while the semiconductor die remains on the carrier. The encapsulant covers an active surface of the semiconductor die between the pillar bumps.

Abstract: A method of characterizing a LoRa modulated signal or any such signals with a plurality of chirps as symbols. It foresees sampling and storing the signal, determining a phase of at least one chirp in the signal, and determining a timing error and/or a frequency error based on the phase, The timing error is extracted by the height of a discontinuous step in the phase at the position of the cyclical shift, while the frequency error is obtained by the slope of the phase. The method can be applied to a dedicated receiver for the characterization of LoRa transmitters.

Abstract: A packaged optical receiver, comprising: a photodiode configured to receive an optical signal; a transimpedance amplifier (TIA) coupled to the photodiode; and a signal pin; wherein the optical receiver is configured to receive, via the signal pin, a reset signal; and wherein the optical receiver is configured to output in response to the reset signal, via the signal pin, a received signal strength indication (RSSI) for the received optical signal.

Abstract: A compound semiconductor integrated circuit is disclosed, which includes biasing circuitry for generating a bias voltage at a bias output node. The biasing circuitry comprises a first circuit branch configured to extend between a defined voltage and a supply voltage. The first circuit branch includes a first transistor configured as a current source to generate a defined current in the first circuit branch and a controllably variable resistance. The bias output node is coupled to the first circuit branch at a first node which is between the controllably variable resistance and the first transistor. The biasing circuitry is operable so that the resistance value of the controllably variable resistance varies with a control voltage so as to vary the value of the bias voltage.

Abstract: The invention relates to a single-inductor multiple-output (SIMO) DC-DC converter (1), comprising: an electrical DC voltage source (Vs) switchable connected to an input node (ni) through an input switch (S1, S2); a plurality of loads (Ro1, Ro2, RoN) each being switchable connected to an output node (no) through one output switch (So1, So2, SoN) of a plurality of output switches (So1, So2, SoN), wherein the electrical DC voltage source (Vs) and the loads (Ro1, Ro2, RoN) are external to the SIMO DC-DC converter (1); an inductor (L) connected to the input node (ni) and the output node (no) and being configured to buffer energy; a control structure arranged to operate in consecutive cycles and being configured to generate control signals for the input switch (S1, S2) and the output switches (So1, So2, SoN), wherein the inductor (L) being energized and de-energized in one cycle of operation (Tcycle) for supplying the plurality of loads (Ro1, Ro2, RoN) with a set of currents (Iact) within the said cycle of opera

Abstract: A semiconductor device comprises a semiconductor die and an integrated capacitor formed over the semiconductor die. The integrated capacitor is configured to receive a high voltage signal. A transimpedance amplifier is formed in the semiconductor die. An avalanche photodiode is disposed over or adjacent to the semiconductor die. The integrated capacitor is coupled between the avalanche photodiode and a ground node. A resistor is coupled between a high voltage input and the avalanche photodiode. The resistor is an integrated passive device (IPD) formed over the semiconductor die. A first terminal of the integrated capacitor is coupled to a ground voltage node. A second terminal of the integrated capacitor is coupled to a voltage greater than 20 volts. The integrated capacitor comprises a plurality of interdigitated fingers in one embodiment. In another embodiment, the integrated capacitor comprises a plurality of vertically aligned plates.

Abstract: A radio transmitting device configured to transmit a spread-spectrum radio signal wherein a carrier frequency changes in a predetermined set of radio channels according to a hopping sequence, the radio signal being organized in packets having each a header transmitted at a first channel in the hopping sequence comprising a detection sequence, and payload data encoding a message transmitted at following channels in the hopping sequence.

Abstract: A semiconductor device has a first semiconductor die including a first protection circuit. A second semiconductor die including a second protection circuit is disposed over the first semiconductor die. A portion of the first semiconductor die and second semiconductor die is removed to reduce die thickness. An interconnect structure is formed to commonly connect the first protection circuit and second protection circuit. A transient condition incident to the interconnect structure is collectively discharged through the first protection circuit and second protection circuit. Any number of semiconductor die with protection circuits can be stacked and interconnected via the interconnect structure to increase the ESD current discharge capability. The die stacking can be achieved by disposing a first semiconductor wafer over a second semiconductor wafer and then singulating the wafers. Alternatively, die-to-wafer or die-to-die assembly is used.

Abstract: A leadframe is formed by chemically half-etching a sheet of conductive material. The half-etching exposes a first side surface of a first contact of the leadframe. A solder wettable layer is plated over the first side surface of the first contact. An encapsulant is deposited over the leadframe after plating the solder wettable layer.

Abstract: A leadframe is formed by chemically half-etching a sheet of conductive material. The half-etching exposes a first side surface of a first contact of the leadframe. A solder wettable layer is plated over the first side surface of the first contact. An encapsulant is deposited over the leadframe after plating the solder wettable layer.

Abstract: A TVS circuit having a first diode with a cathode coupled to a first terminal and an anode coupled to a first node. A second diode has an anode coupled to a second node and a cathode coupled to a third node. A third diode is coupled between the first node and second node. A fourth diode is coupled between the first node and third node. A fifth diode is coupled between the second node and a second terminal. A sixth diode is coupled between the second terminal and the third node. A seventh diode can be coupled between the second terminal and an intermediate node between the fifth diode and sixth diode. The first diode is disposed on a first semiconductor die, while the second diode is disposed on a second semiconductor die. Alternatively, the first diode and second diode are disposed on a single semiconductor die.

Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.

Abstract: A capacitive sensor with a plurality of sense inputs connectable to capacitive sense electrodes and a common reference input, each sense input and the reference input can be put in a measure state, in a ground state, or in a shield state. The sensor can be equipped with external reference capacitors between each of the sense input and the common reference terminal. The reference capacitor can be read individually by selectively pulling one of the input terminals to ground and driving the other to be equipotential with the reference input.

Abstract: A semiconductor device has a semiconductor wafer including a plurality of semiconductor die and a plurality of contact pads formed over a first surface of the semiconductor wafer. A trench is formed partially through the first surface of the semiconductor wafer. An insulating material is disposed over the first surface of the semiconductor wafer and into the trench. A conductive layer is formed over the contact pads. The conductive layer can be printed to extend over the insulating material in the trench between adjacent contact pads. A portion of the semiconductor wafer opposite the first surface of the semiconductor wafer is removed to the insulating material in the trench. An insulating layer is formed over a second surface of the semiconductor wafer and side surfaces of the semiconductor wafer. The semiconductor wafer is singulated through the insulating material in the first trench to separate the semiconductor die.

Abstract: A semiconductor device has a substrate and leads formed on two or more sides of the substrate. An electrical component is disposed over the substrate and electrically connected to the lead with bumps or bond wires. The electrical component is encapsulated. A portion of the substrate is removed to form a wettable flank on at least three sides of the lead. The substrate has a molding compound and the lead is disposed within or adjacent to the molding compound. A portion of the molding compound can remain at corners of the substrate. The lead has a first surface or recessed surface on a first side of the lead, a second surface or recessed surface on a second side of the lead, and a third surface or recessed surface on a third side of the lead. A portion of a surface of the lead is plated.