Abstract: The computer-implemented method for generating a public key and a secret key of the present disclosure comprises determining, by a processor, the secret key (s) by sampling from a distribution over {?1, 0, 1}nd; determining, by a processor, a first error vector (e) by sampling from (D?qn)d and a second error value (e?) by sampling from D?qn; choosing, by a processor, a randomly uniform matrix A which satisfies A·s=e (mod q); choosing, by a processor, a random column vector b which satisfies ? b , s ? = ? q 2 ? + e ? ? ( mod ? ? q ) ; and determining, by a processor, the public key (pk) by (A?b)?Rqd×(d+1).
Type:
Grant
Filed:
June 18, 2020
Date of Patent:
May 23, 2023
Assignees:
ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY, SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
Inventors:
Joohee Lee, Junghee Cheon, Duhyeong Kim, Aaram Yun
Abstract: A processor-implemented method with image processing includes: providing retouch result candidates of an input image to a user in response to applying vector value candidates to a style vector; determining a vector value of the style vector based on a selection of the user for the retouch result candidates; determining an adjustment parameter set corresponding to the determined vector value of the style vector; and generating a retouch result by adjusting the input image based on the adjustment parameter set.
Type:
Application
Filed:
November 7, 2022
Publication date:
May 18, 2023
Applicants:
Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
Inventors:
Kinam KWON, Heewon KIM, Kyoung Mu LEE, Hyong Euk LEE
Abstract: An object tracking learning system includes a first neural network module that expresses and learns a first parameter for an input image from a first type to a second type and outputs the learned result as a first learning result, a second neural network module that removes and learns a connection of a part of a second parameter for the input image and outputs the learned result as a second learning result, a prediction module that generates a prediction value for an object of the input image from a summation result obtained by summing the first learning result and the second learning result, and an optimization module that updates the first parameter and the second parameter based on the prediction value.
Type:
Application
Filed:
October 25, 2022
Publication date:
May 18, 2023
Applicant:
Seoul National University R&DB Foundation
Inventors:
MOON HYUN CHA, IL CHAE JUNG, BO HYUNG HAN, DAEYOUNG PARK, CHANGWOOK JEONG
Abstract: An image deblurring method and apparatus are provided. The image deblurring method includes generating a primary feature representation on a first blur point in an input image and offset information on similar points of the first blur point by encoding the input image by implementing an encoding model, generating secondary feature representations on the similar points by applying the offset information to the primary feature representation, and generating an output image, based on the secondary feature representations and the offset information, by implementing an implicit function model.
Type:
Application
Filed:
October 26, 2022
Publication date:
May 18, 2023
Applicants:
Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
Inventors:
Huijin LEE, Dong-Hwan JANG, Bohyung HAN, Nahyup KANG
Abstract: A semiconductor device includes a delay compensation circuit and a bias control circuit. The delay compensation circuit includes a variable delay circuit configured to generate an output signal by delaying an input signal and configured to compensate, according to a first bias control signal, for delay fluctuation caused by fluctuation of a power supply voltage between a first power source and a second power source. The bias control circuit is configured to generate the first bias control signal to compensate for the delay fluctuation.
Type:
Grant
Filed:
May 10, 2021
Date of Patent:
May 16, 2023
Assignees:
SK hynix Inc., Seoul National University R&DB Foundation
Inventors:
Soyeong Shin, Yongjae Lee, Jiheon Park, Deog-Kyoon Jeong
Abstract: Provided are a micro light source array for a display device, a display device including the micro light source array, and a method of manufacturing the display device. The micro light source array includes: a plurality of silicon sub-mounts provided on a substrate, each silicon sub-mount from among the plurality of silicon sub-mounts corresponding to a respective sub-pixel from among a plurality of sub-pixels of a display device, the plurality of silicon sub-mounts being separated from each other by a plurality of trenches; a plurality of light emitting device chips coupled to the plurality of silicon sub-mounts; and a plurality of driving circuits provided at the plurality of silicon sub-mounts.
Type:
Grant
Filed:
June 4, 2021
Date of Patent:
May 16, 2023
Assignees:
SAMSUNG ELECTRONICS CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
Abstract: A neural network operation apparatus and method are provided. The neural network operation apparatus includes an internal storage configured to store data to perform a neural network operation, an arithmetic logical unit (ALU) configured to perform an operation between the stored data and main data based on an operation control signal, an adder configured to add an output of the ALU and an output of a first multiplexer, wherein the first multiplexer is configured to output one of an output of the adder and the output of the ALU based on a reset signal, a second multiplexer configured to output one of the main data and a quantization result of the stored data based on a phase signal, and a controller configured to control the ALU, the first multiplexer, and the second multiplexer based on the operation control signal, the reset signal, and the phase signal.
Type:
Application
Filed:
July 13, 2022
Publication date:
May 11, 2023
Applicants:
SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
Inventors:
HANWOONG JUNG, Soonhoi HA, Donghyun KANG, Duseok KANG
Abstract: A processor-implemented method with scheduling includes: receiving one or more execution requests for a plurality of models executed independently of each other in an accelerator; predicting, for each of the plurality of models, quality of service (QoS) information corresponding to the model; and scheduling the plurality of models in units of layers of the plurality of models based on, for each of the plurality of models, either one or both of the QoS information and an idle time occurring in response to a candidate layer to be scheduled in the model being executed in the accelerator.
Type:
Application
Filed:
August 15, 2022
Publication date:
May 11, 2023
Applicants:
Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
Inventors:
Jae Wook LEE, Younghwan OH, Yunho JIN, Tae Jun HAM
Abstract: A device includes: one or more processors configured to perform a first operation for driving one or more basic blocks of a neural network model and a second operation for driving one or more transition blocks of the neural network model to drive the neural network model, wherein, for the performing of the first operation, the one or more processors are configured to: perform first batch normalization on input data; quantize the first batch normalized input data; perform a convolution operation based on the quantized input data; determine output data by applying an activation function to a result of the convolution operation; and perform the first operation by performing second batch normalization on the output data.
Type:
Application
Filed:
August 9, 2022
Publication date:
May 11, 2023
Applicants:
SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
Abstract: A device includes: a comparator; an exclusive-NOR (XNOR) gate; an accumulator; and a multiplication and accumulation (MAC) operator, wherein a basic block of a neural network comprises a first batch normalization layer, a quantization layer, a convolution layer, an active layer, and a second batch normalization layer, and wherein the basic block is driven by the device by a combination of a first batch normalization operation, a sign function operation, a bitwise convolution operation, an activation function operation, a second batch normalization operation, and a residual connection operation.
Type:
Application
Filed:
August 9, 2022
Publication date:
May 11, 2023
Applicants:
SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
Abstract: The present disclosure relates to an apparatus and method for gene amplification. The apparatus for gene amplification may include: an upper main body comprising a first inlet to receive a sealing solution, a second inlet to receive a sample solution, and an upper passage that allows the sample solution and the sealing solution to move by capillary action; a lower main body disposed to oppose the upper main body, and having a lower passage through which the sealing solution moves by capillary action after being injected from the first inlet of the upper main body; a gene amplification chip configured to be inserted between the upper main body and the lower main body; and a porous medium configured to be inserted between the upper main body and the lower main body.
Type:
Application
Filed:
March 2, 2022
Publication date:
May 11, 2023
Applicants:
SAMSUNG ELECTRONICS CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
Inventors:
Won Jong JUNG, Ho-Young Kim, Hyeong Seok Jang, Kak Namkoong, Tae Jeong Kim, Jae Hong Lee, Sohyun Jung
Abstract: A method of generating a secret key according to one embodiment includes generating a share of each of a user and a plurality of other users for a secret key of the user, providing the share of each of the plurality of other users to a user terminal of each of the plurality of other users, receiving a share of the user for a secret key of each of the plurality of other users from the user terminal of each of the plurality of other users, and generating a new secret key of the user using the share of the user for the secret key of the user and the shares of the user for the secret key of each of the plurality of other users.
Type:
Grant
Filed:
November 14, 2019
Date of Patent:
May 9, 2023
Assignees:
SAMSUNG SDS CO., LTD., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
Inventors:
Eunkyung Kim, Hyo Jin Yoon, Jung Hee Cheon, Jinhyuck Jeong
Abstract: A device for delivering an ionic material includes a storage module including a reservoir configured to store the ionic material, a bipolar membrane configured to pass the ionic material in a single direction based on an ionic current, electrodes, disposed on a lower end of the reservoir and an upper end of the bipolar membrane, respectively, configured to form an electric field generating the ionic current, and a control module configured to control either one or both of a release amount and a release period of the ionic material passing through the bipolar membrane by adjusting a direction and an intensity of the electric field.
Type:
Application
Filed:
April 28, 2022
Publication date:
May 4, 2023
Applicants:
SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
Inventors:
JOONSEONG KANG, Seung-Kyun Kang, Sung-Geun Choi, YOUNG JUN HONG, DON-WOOK LEE
Abstract: A system with fault recovery includes: a plurality of worker nodes configured to perform distributed training; and a master node configured to control the plurality of worker nodes, wherein the master node is configured to: detect a fault of the plurality of worker nodes based on a predetermined period; adjust a collective communication participant list in response to the detecting of the fault; and transmit the adjusted participant list to one or more worker nodes in the adjusted participant list.
Type:
Application
Filed:
September 28, 2022
Publication date:
May 4, 2023
Applicants:
Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
Abstract: A neural network operation apparatus and method are disclosed. The neural network operation apparatus may include an adder configured to perform addition of data for performing a neural network operation and main data, a first multiplexer configured to output one of an output result of the adder and the main data based on a reset signal, a second multiplexer configured to output one of the main data and a quantization result of the data based on a phase signal, and a controller configured to control the first and second multiplexers by generating the reset signal and the phase signal.
Type:
Application
Filed:
July 13, 2022
Publication date:
May 4, 2023
Applicants:
SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
Inventors:
HANWOONG JUNG, Soonhoi HA, Donghyun KANG, Duseok KANG
Abstract: A method includes: generating, based on a student network result of an implemented student network provided with an input, a sample corresponding to a distribution of an energy-based model based on the student network result and a teacher network result of an implemented teacher network provided with the input; training model parameters of the energy-based model to decrease a value of the energy-based model, based on the teacher network result and the student network result; and training the implemented student network to increase the value of the energy-based model, based on the sample and the student network result.
Type:
Application
Filed:
July 12, 2022
Publication date:
May 4, 2023
Applicants:
SAMSUNG ELECTRONICS CO., LTD., Seoul National University R&DB Foundation
Inventors:
Eunhee KANG, Minsoo KANG, Bohyung HAN, Sehwan KI, HYONG EUK LEE
Abstract: A mutation detection apparatus includes a memory configured to store software for implementing a neural network and a processor configured to detect a mutation by executing the software, wherein the processor is configured to generate first genome data extracted from a target tissue and second genome data extracted from a normal tissue, extract image data by preprocessing the first genome data and the second genome data, and detect a mutation of the target tissue on the basis of the image data through the neural network trained to correct a sequencing platform-specific false positive.
Type:
Grant
Filed:
October 25, 2019
Date of Patent:
May 2, 2023
Assignee:
SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
Inventors:
Dae Hyun Beak, Jun Hak Ahn, Hyeon Seong Jeon, Do Yeon Kim
Abstract: A processor-implemented method of a neural network includes obtaining intermediate pooling results, respectively corresponding to sub-pooling kernels obtained by decomposing an original pooling kernel, by performing a pooling operation on input pixels included in a current window in an input feature map with the sub-pooling kernels, obtaining a final pooling result corresponding to the current window by post-processing the intermediate pooling results, and determining an output pixel value of an output feature map, based on the final pooling result, wherein the current window is determined according to the original pooling kernel having been slid, according to a raster scan order, in the input feature map.
Type:
Grant
Filed:
March 23, 2020
Date of Patent:
May 2, 2023
Assignees:
Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
Inventors:
Hyunsun Park, Soonhoi Ha, Donghyun Kang, Jintaek Kang
Abstract: An aircraft flight scheduling apparatus according to an embodiment of the present disclosure includes a database configured to manage an arrival time and a departure time for each aircraft at each airport, aircraft flight data including slot information assigned to each aircraft at each airport, a ground delay program (GDP) information issued by a control center of each airport, a scenario for an expected aircraft flight according to generation of the GDP, and an objective function for determining resetting of an aircraft flight schedule according to the generation of the GDP, a memory for storing an aircraft flight scheduling program, and a processor configured to execute the aircraft flight scheduling program.
Type:
Application
Filed:
October 10, 2022
Publication date:
April 27, 2023
Applicant:
SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
Abstract: An accelerator includes a key matrix register configured to store a key matrix, a query vector register configured to store a query vector; and a preprocessor configured to calculate similarities between the query vector and the key matrix.
Type:
Grant
Filed:
March 26, 2020
Date of Patent:
April 25, 2023
Assignees:
SK hynix Inc., Seoul National University R&DB Foundation
Inventors:
Tae Jun Ham, Seonghak Kim, Sungjun Jung, Younghwan Oh, Jaewook Lee, Deog-Kyoon Jeong, Minsoo Lim