Abstract: An electronic module has a first substrate 11, an electronic element 13, 23 disposed on one side of the first substrate 11, a second substrate 21 disposed on one side of the electronic element 13, 23, a first coupling body 210 disposed between the first substrate 11 and the second substrate 21, a second coupling body 220 disposed between the first substrate 11 and the second substrate 21, and shorter than the first coupling body 210, and a sealing part 90 which seals at least the electronic element. The first coupling body 210 is not electrically connected to the electronic element. The second coupling body 220 is electrically connected to the electronic element 13, 23.

Abstract: A semiconductor module includes a die pad frame; a semiconductor chip disposed in a chip region on an upper surface of the die pad frame, a conductive connection member for die pad disposed between the second electrode of the semiconductor chip and the upper surface of the die pad frame, the conductive connection member for die pad electrically connecting the second electrode of the semiconductor chip and the upper surface of the die pad frame; a first clip frame disposed on the upper surface of the semiconductor chip; a first dip conductive connection member disposed between the first electrode on the semiconductor chip and a lower surface of the first clip frame, the first clip conductive connection member electrically connecting the first electrode of the semiconductor chip and the lower surface of the first clip frame and a sealing resin.

Abstract: A semiconductor device includes a device main body that is semi-annular, the device main body having an inner circumferential surface formed arcuate in plan view and an outer circumferential surface formed arcuate in plan view. Cutout portions are formed on a first end surface, on one end side, in a circumferential direction, of the device main body and a second end surface, on an other end side, in the circumferential direction, of the device main body. The cutout portions are used for inserting screws for fixing the device main body to a base portion.

Abstract: A semiconductor device of the present invention includes: a plurality of wiring boards disposed separately from one another; a plurality of semiconductor elements disposed on first main surfaces of the wiring boards and electrically connected to the wiring boards; a plurality of terminals electrically connected to the wiring boards; a sealing resin sealing the wiring boards and the semiconductor elements so that second main surfaces of the wiring boards are exposed.

Abstract: A method of manufacturing a semiconductor device includes in a following order: a first forming step where a gate electrode is formed on a first main surface side of a semiconductor base substrate with a gate insulation film interposed therebetween and, thereafter, an interlayer insulation film is formed to cover the gate electrode; a second forming step where a metal layer in a state of being connected with the gate electrode is formed over the interlayer insulation film; an irradiating step where a lattice defect is formed inside the semiconductor base substrate by irradiating an electron beam to the semiconductor base substrate in a state where the metal layer is set to a ground potential; a dividing step where the metal layer is divided into a plurality of electrodes; and an annealing step where the lattice defect in the semiconductor base substrate is repaired by heating the semiconductor base substrate.

Abstract: A starting power generation apparatus according to an embodiment of the present invention includes: a starter generator including a field portion having a permanent magnet, and an armature unit including a first multi-phase winding and a second multi-phase winding which are arranged in parallel; a first power conversion unit including a first positive-side DC terminal connected to a battery and a plurality of first AC terminals connected to the first multi-phase winding, the first power conversion unit being configured to convert a power bidirectionally between DC and AC; a second power conversion unit including a plurality of second AC terminals connected to the second multi-phase winding, the second power conversion unit being configured to control a current to be input and output via the second AC terminals; and a control unit configured to detect a positional relationship between the field portion and the armature unit based on an output voltage of the second multi-phase winding, and control the first pow

Abstract: A MOSFET includes a semiconductor base substrate where a super junction structure is formed of an n-type column region and a p-type column region. A total amount of a dopant in the n-type column region is set to a value greater than a total amount of a dopant in the p-type column region. The MOSFET is configured to be operated during a period from a point of time when a drain current starts to decrease to a point of time when the drain current becomes 0 for the first time in response to turning off of the MOSFET such that a first period during which the drain current is decreased, a second period during which the drain current is increased or the drain current becomes constant, and a third period during which the drain current is decreased again occur in this order.

Abstract: Provided is a MOSFET which includes: a semiconductor base substrate having an n-type column region and a p-type column region, a base region and a source region, wherein a super junction structure is formed of the n-type column region and the p-type column region; a trench having side walls and a bottom; a gate electrode formed in the trench by way of a gate insulation film; a carrier compensation electrode positioned between the gate electrode and the bottom of the trench; an insulation region separating the carrier compensation electrode from the side walls and the bottom; and a source electrode electrically connected to the source region and also electrically connected to the carrier compensation electrode. According to the MOSFET of the present invention, even when an irregularity in a charge balance occurs around the gate, an irregularity in switching characteristics when the MOSFET is turned off can be decreased.

Abstract: A power semiconductor device of the present invention includes: a semiconductor base body which has a super junction structure formed of a plurality of first conductive-type columnar regions and a plurality of second conductive-type columnar regions; a plurality of trenches; gate insulation films; gate electrodes; an interlayer insulation film; contact holes formed such that two or more contact holes are formed between two trenches disposed adjacently to each other; metal plugs formed by filling the inside of the contact holes with metal; and an electrode, wherein a first conductive-type high concentration diffusion region is formed only between the trench and the metal plug disposed closest to the trench between each two trenches disposed adjacently to each other. According to the power semiconductor device of the present invention, it is possible to provide a power semiconductor device which satisfies a demand for reduction in cost and downsizing of electronic equipment, and has a large breakdown strength.

Abstract: A semiconductor device has a first board (10) having a first electrically conducting layer (11) and a first electronic element (12) that is provided on the first electrically conducting layer (11); and an intermediate layer (20) being provided on the first board (10), and having a plurality of connectors and a resin board section, in which the plurality of connectors are fixed. The connector is exposed from the resin board section on the first board (10) side, and connected with the first electrically conducting layer (11) or the first electronic element (12).

Abstract: A semiconductor device includes a module substrate, a first input wiring line disposed on a top surface of the module substrate and including a first portion extending along a first side of the module substrate and a second portion extending along a second side that is adjacent to the first side, the second portion having one end that is connected to one end of the first portion, a first input terminal disposed on another end of the second portion and electrically connected to the first input wiring line, first to fourth transistors, first and second output terminals, a second input wiring line disposed on the top surface of the module substrate so as to be close to a fourth side that is opposite to the first side and adjacent to the second side, a second input terminal, and a module sealing member sealing the top surface.

Abstract: A semiconductor module includes: a first substrate having a first insulating substrate and a first conductor layer; a power device part having a first electrode, a second electrode and a gate electrode; a second substrate having a second insulating substrate, a second conductor layer and a third conductor layer wherein a hole is formed in the second insulating substrate, the second conductor layer has a bonding portion and a surrounding wall portion; an inner resin portion; a control IC; and an outer resin portion, wherein the first substrate, the power device part, the second substrate and the control IC are stacked in this order, a connector is disposed in the inside of the hole, and the gate electrode is electrically connected to a control signal output terminal of the control IC through a connector.

Abstract: A semiconductor device comprises a plurality of first conductor portions 10, a plurality of second conductor portions 20 and a sealing portion 50, covering upper surfaces of the first conductor portion 10 and the second conductor portion 20. The first conductor portion 10 and the second conductor portion 20 are connected. Usage mode of the first terminal 11 and the second terminal 12 can be selected, and the second terminal 21 of the second conductor portion 20 serves as an output terminal in a case where the first terminal 11 of the first conductor portion 10 is used as a power supply terminal, and the first terminal 11 of the first conductor portion 10 serves as an output terminal in a case where the second terminal 21 is used as a power supply terminal.

Abstract: A semiconductor device includes: a seal portion; a first electronic element; a second lead terminal having one end that is disposed to be close to the one end of the first lead terminal within the seal portion, and another end that is exposed from another end of the seal portion, the other end of the seal portion being along the longitudinal direction; a first connecting element disposed within the seal portion, and having one end that is electrically connected to the first electrode disposed on the first electronic element, and another end that is electrically connected to the one end of the second lead terminal; and a conductive bonding agent.

Abstract: A power semiconductor device according to the present invention has a super junction structure, and includes a low-resistance semiconductor layer, an n?-type column region, p?-type column regions, a base region, trenches, gate insulation films, gate electrodes, source regions, interlayer insulation films, contact holes, metal plugs, p+-type diffusion regions, a source electrode and a gate pad electrode. An active element part includes an n?-type column region between a predetermined p?-type column region disposed closest to a gate pad part and a predetermined n?-type column region disposed closest to the gate pad part among the n?-type column regions which are in contact with the trenches. The present invention provides a power semiconductor device which can satisfy a demand for reduction in cost and downsizing of electronic equipment, can lower ON resistance while maintaining a high withstand voltage, and can possess a large breakdown resistance.

Abstract: A semiconductor device according to a first aspect of the present invention includes a device main body, a single power supply wiring board, a plurality of output wiring boards, and a plurality of semiconductor elements. In a long-side direction of the device main body, the narrow portion of one of any two adjacent wiring boards faces the wide portion of another one of the any two adjacent wiring boards. In a short-side direction of the device main body, the narrow portion and the wide portion of each of the output wiring boards respectively face the wide portion and the narrow portion, in a single pair, of the power supply wiring board. In the long-side direction of the device main body a width of each of the output wiring boards is smaller than a sum of widths of the narrow portion and the wide portion, in a single pair, of the power supply wiring board.

Abstract: A semiconductor device of an embodiment includes a conductive semiconductor substrate, an insulating film formed on the semiconductor substrate, an overvoltage protection diode configured to be formed on the insulating film and to include an n-type semiconductor layer and a p-type semiconductor layer alternately arranged adjacent to each other, and an insulating film that covers the overvoltage protection diode. The concentration of the p-type impurities in the p-type semiconductor layer is lower than the concentration of the n-type impurities in the n-type semiconductor layer. The concentration peak of the p-type impurities is disposed in a non-boundary region between a boundary region and a boundary region.

Abstract: A magnetic component has a core 80 provided with a leg 81; and a coil structure having a coil 10, 20 including conductors wrapped around the leg 81, and two or more radiative insulating sheets 100 provided between the conductors; a radiator 91, 92 brought into contact with an end surface of the core 80, and extending toward the radiative insulating sheets 100 and brought into contact with the surface of the radiative insulating sheets 100.

Abstract: A semiconductor device includes: a semiconductor base body where a second semiconductor layer is stacked on a first semiconductor layer, a trench is formed on a surface of the second semiconductor layer, and a third semiconductor layer which is formed of an epitaxial layer is formed in the inside of the trench; a first electrode; an interlayer insulation film which has a predetermined opening; and a second electrode, wherein metal is filled in the opening, the opening is disposed at a position avoiding a center portion of the third semiconductor layer, the second electrode is connected to the third semiconductor layer through the metal, and a surface of the center portion of the third semiconductor layer is covered by the interlayer insulation film.

Abstract: A module includes a heat dissipating substrate including a first surface and a second surface on an opposite side of the first surface, an element arranged on the first surface of the heat dissipating substrate, a connecting terminal arranged on the first surface of the heat dissipating substrate and provided for electrically connecting the element to a wiring substrate arranged on the module, a module case arranged on the first surface in such a manner that a circumference of the heat dissipating substrate is partially covered, and a sealing member sealing the element and a connecting portion of the connecting terminal with the element, wherein the heat dissipating substrate includes a positioning part for positioning the module with respect to the housing case, and the positioning part protrudes to an outer side of the module case.