Abstract: A wireless link simulator includes, in sequence, a digital transmit device under test (TX-DUT), a wireless link simulator, and a digital receive device under test (RX-DUT). The wireless link simulator includes, in sequence, a transmitter IQ imbalance generator, a power amplifier non-linearity generator, a noise floor generator, a multi-path channel generator, a receive noise generator, a frequency offset generator, a phase noise generator, a receive IQ imbalance generator, and a DC offset generator. Each of the generators may be individually varied to determine the receiver sensitivity to each of these effects and associated parameters.

Abstract: During the preamble interval of a wireless packet, a receiver estimates the SINR of the preamble, and also examines the packet header to determine the data rate, length, and destination address. If the SINR as determined from the preamble is below a threshold, or if the SINR combined with the data rate from the packet header is below a threshold, the receiver is powered down for the duration of the current packet. Additionally, if the packet header bears a destination address for a different station from the one receiving it, the receiver is powered down for the duration of the packet. In this manner, the receiver power is only used to receive packets that have sufficient SINR to be correctly received for their data rate, or are destined for the present station. The reduction in power consumption results in longer battery life for the station.

Abstract: A maximum likelihood CCK detector has a first subtractor which subtracts the contents of a pre-equalize register from a current symbol, and the output of this subtractor is coupled to a simple Fast Walsh Transform (FWT) with an iteration variable k. The output of the FWT is coupled to a second subtractor for subtracting a plurality of ICI corrections for all possible current symbols computed from the post-FWT domain value of the current CCK symbol and stored in post equalization registers. A post equalization register contains values computed from feedback filter coefficients determined during a packet preamble, where the feedback filter coefficients are provided to a reduced complexity post equalization value generator which populates the post equalization register using an iteration variable i.

Abstract: A method masquerades computer display screen graphics data as a media stream supported by a media adapter with capabilities to receive a media stream, decompress it, and display it on an attached display device. The display screen graphics data is uncompressed pixel-level data representing graphics content displayable on a display screen attached to the computer in a normal display mode. The method processes the display screen graphics data, including compressing, to yield processed display screen graphics data in a compressed format supported by the media adapter and packages the processed display screen graphics data as a media stream. The method configures the computer to be a media server and transmits the media stream from the computer to the media adapter, thereby facilitating display on the display device of the graphics content, substantially cloning or extending what appears on at least a portion of the display screen attached to the computer.

Abstract: A method selectively either (a) plays a media file accessed from a computer on a remote display device connected to a media adapter or (b) masquerades uncompressed pixel-level computer display screen graphics data as a media stream supported by the media adapter to cause the display device to substantially clone or extend what appears on at least a portion of a local display screen attached to the computer. The method senses when a user enters an input signifying a desire by the user to play a media file on the computer. If said input is not sensed, then the method performs a masquerading process to process, compress, and package the display screen graphics data as a media stream and then transmits the media stream to the media adapter. If said input is sensed, then the method transmits the media file to the media adapter.

Abstract: A memory controller for a wireless communication system comprises a packet buffer write system and a packet buffer read system. The packet buffer write system places packets including packet header and packet data into a packet buffer. The packet buffer read system removes packets including a packet header and packet data from a packet buffer. The packet buffer is arranged into a plurality of packet buffer memory slots, each slot comprising a descriptor status array location including an availability bit set to “used” or “free”, and a packet buffer memory location comprising a descriptor memory slot and a data segment memory slot. The descriptor memory slot includes header information for each packet, and the data segment memory slot includes packet data. The memory controller operates on one or more queues of data, and data is placed into a particular queue in packet memory determined by priority information derived from incoming packet header or packet data.

Abstract: A method provides sleep and wake-up modes for railway track circuit units. An intermediate track circuit unit communicates in a first direction to a first unit and in a different second direction to a different second unit. A plurality of wireless messages are employed between a train and a plurality of wayside units operatively associated with some of the track circuit units. Included with the wireless messages are a first identifier of a corresponding one of the track circuit units and a second identifier of a direction of travel of the train. One of the wireless messages is received at one of the wayside units corresponding to the intermediate unit based upon the first identifier. A signal is responsively output based upon the second identifier from the intermediate unit in the first direction to the first unit or in the different second direction to the different second unit.

Abstract: A memory controller for a wireless communication system comprises a packet buffer write system and a packet buffer read system. The packet buffer write system places packets including packet header and packet data into a packet buffer. The packet buffer read system removes packets including a packet header and packet data from a packet buffer. The packet buffer is arranged into a plurality of packet buffer memory slots, each slot comprising a descriptor status array location including an availability bit set to “used” or “free”, and a packet buffer memory location comprising a descriptor memory slot and a data segment memory slot. The descriptor memory slot includes header information for each packet, and the data segment memory slot includes packet data. The memory controller operates on one or more queues of data, and data is placed into a particular queue in packet memory determined by priority information derived from incoming packet header or packet data.

Abstract: A baseband receiver having quadrature analog outputs and a plurality of analog control and status signals and a transmit modulator having analog quadrature inputs and a plurality of analog control and status signals are coupled to a transmit processor having a digital output and a plurality of digital control and status signals and to a receive processor having a digital input and a plurality of digital control and status signals by multiplexing analog to digital converters and digital to analog converters such that during a receive time the converters are used for a receive purpose and during a transmit time, the converters are used for a transmit purpose.

Abstract: An apparatus provides hot standby operation with normal and standby processors, each of which includes vital inputs electrically interconnected with the vital inputs of the other processor, vital outputs, and an application routine inputting the vital inputs and outputting the vital outputs. Communication ports communicate with communication ports of the other processor. A health routine provides a health status after communication is established with the other processor. A vital relay includes an input controlled by a vital output and an output to a vital input of the other processor. A synchronization routine provides a synchronization status through the communication ports. The application routine outputs the vital outputs when the synchronization status is set. The standby processor includes a reset routine, which resets the standby processor when the health status of that processor is not provided. A vital “OR” circuit outputs from the vital outputs of the normal and standby processors.

Abstract: A maximum likelihood CCK detector has a first subtractor which subtracts the contents of a pre-equalize register from a current symbol, and the output of this subtractor is coupled to a simple Fast Walsh Transform (FWT) with an iteration variable k. The output of the FWT is coupled to a second subtractor for subtracting a plurality of ICI corrections for all possible current symbols computed from the post-FWT domain value of the current CCK symbol and stored in post equalization registers. A post equalization register contains values computed from feedback filter coefficients determined during a packet preamble, where the feedback filter coefficients are provided to a reduced complexity post equalization value generator which populates the post equalization register using an iteration variable i.

Abstract: A geographic information system (GIS) displays geographic roadway data, geographic track data and geographic train position data. The GIS includes a GIS database having static roadway and track data. A computer aided dispatching (CAD) system includes a task to determine an occupied track section. A web server includes a first routine determining geographic starting and ending positions of the track section, a second routine displaying geographic information regarding the static roadway and track data, and a third routine determining geographic information regarding the occupied track section from the geographic starting and ending positions of the track section and from the GIS database. A client system communicates with the web server to receive and display the geographic information regarding the static roadway and track data, and to receive and display the geographic information regarding the occupied track section with the geographic information regarding the static roadway and track data.

Abstract: An RF receiver which produces quadrature digitized outputs and has a gain control is coupled to a digital gain controller which converts the quadrature digitized outputs into an rms voltage, and iterates over a finite number of steps to quickly control the gain to a level sufficient to achieve subsequent digital signal processing without limitations caused by insufficient dynamic range or nonlinear saturation effects caused by insufficient signal or excessive signal at the A/D input, respectively.

Abstract: A method generates optimized traffic movement plans. A plan monitor determines a first planning boundary for traffic based upon traffic conditions of a region. A plan generator employs the first planning boundary and repetitively generates first traffic movement plans for the traffic. The plan generator selects one of the first traffic movement plans as a first optimized traffic movement plan, and outputs the same for controlling traffic movement. The plan monitor determines current traffic conditions of the region for a planning window, and updates the first planning boundary to provide a second planning boundary for the traffic based upon the current traffic conditions. The plan generator employs the second planning boundary and repetitively generates second traffic movement plans for the traffic, selects one of the first and second traffic movement plans as a second optimized traffic movement plan, and outputs the same for controlling traffic movement.

Abstract: A spread rod tie assembly having a body with a top surface that has at least two levels is provided. That is, the tie body upper surface preferably includes two generally flat, generally parallel rail platforms disposed at each end of the tie body. The platforms are at a first height and are structured to support a pair of fixed rails. The tie body upper surface also has a recessed, generally flat spread rod bed disposed at a medial portion of the tie body between the rail platforms. The spread rod bed is at a second height that is below the first height. In this configuration, the tie body maintains the rails at the required height above the ballast while allowing for a device, such as, but not limited to, a spread rod to be disposed above the tie body between the rails.

Abstract: A tie system having at least one tie with a generally hollow, unitary body. The tie body is preferably made from a metal such as, but not limited to, steel. The tie is created as a unitary body and may be cast in its final form, however, in a preferred embodiment, the body is created as a tube which is then deformed into the final shape. Once the tube has the desired shape, a plurality of openings are cut therein. Components of the switch machine are then disposed within the tie body.

Abstract: A railroad crossing gate comprising a crossing gate arm having a counterweight support structure and one or more counterweights supported by the counterweight support structure. The counterweight support structure includes a gear rack provided along a first portion of the crossing gate arm and a pinion gear operatively coupled to and selectively movable along the gear rack.

Abstract: A wireless signal processor for handling a plurality of wireless sessions comprises a plurality of baseband receivers, one for each session, each receiver producing a digital output, a multiplexer for multiplexing the plurality of digital outputs into a single data stream, a digital signal processor for converting the stream of multiplexed data into a media access controller format, and a media access controller for demultiplexing and framing the stream of data into a plurality of data buffers, one data buffer for each wireless session.

Abstract: An improved LED signaling device employing a number of LEDs arranged in a specific pattern. At least some of the LEDs are received in a corresponding reflective cavity with an associated output angle. The LED signaling device also employs first and second lenses. The first lens collects the light emitted by the LEDs and disperses the light such that the second lens is flooded. The second lens collects the light dispersed by the first lens and collimates the light. The type of LEDs used, their specific pattern, the specific output angles of their corresponding reflective cavities, and the combination of the first and second lenses insure that the LED signaling device meets or exceeds the minimum luminous output intensity requirements and uniformity requirements.

Abstract: A railroad signaling method includes measuring a track current on a first track section, measuring a local voltage on the railroad line wires, determining whether a magnitude of the track current meets or exceeds a threshold value independent of the local voltage, and determining whether the track current and the local voltage are nominally in phase with one another in a manner that is independent of the track current measuring step. A first signal is provided only if the magnitude is determined to meet or exceed the threshold and the track current and local voltage are determined to be nominally in phase. The first signal is an indication that a train is not present in the track section, that the track section does not have a broken rail, and that the insulated joints that bound the track section do not include a fault condition. An associated relay arrangement is also provided.