Abstract: An optical detection assembly can include: a light-emitting device and a photoelectric conversion device installed in parallel on a substrate, where light generated by the light-emitting device is irradiated onto an object, and the photoelectric conversion device is configured to convert a reflected light of the object into an electrical signal; and a housing formed by light shielding material installed on the substrate, where the housing includes a first chamber for accommodating the light-emitting device, a sidewall that separates the light-emitting device and the photoelectric conversion device, and at least one emitting light opening at the top of the first chamber and having an axis inclined at a tilt angle.

Abstract: A switching time generation circuit can include: a regulation circuit configured to generate a regulation signal in accordance with change information of an output signal of a switching converter; and the regulation circuit being configured to adjust a switching state of a power switch based on the regulation signal, where the switching converter includes a power stage circuit having the power switch.

Abstract: The present disclosure relates to a resonance-type contactless power supply, an integrated circuit and a constant voltage control method. The resonance-type contactless power supply includes an inverter, a transmitter-side resonant circuit, a receiver-side resonant circuit, a rectifier circuit, and an output capacitance. In this resonance-type contactless power supply, the inverter receives electric energy, which is transferred to the rectifier circuit in a first state and is not transferred to the rectifier circuit in a second state. By switching between the first state and the second state, the resonance-type contactless power supply is controlled to provide a relatively constant voltage, and can be electrically coupled directly to a constant-voltage-type load.

Abstract: A resonance-type contactless power supply has the characteristic that an inductor current has a maximum value when it operates at a resonance frequency. Sampling values of the inductor current in two successive cycles are compared with each other. A frequency of an inverter circuit is adjusted in a manner the same as that in a previous cycle in a case that the inductor current increases, and is adjusted in a manner opposite to that in the previous cycle in a case that the inductor current decreases. Thus, the resonance-type contactless power supply can be properly tuned without the need for zero-crossing detection.

Abstract: A package structure of a power converter, can include: a die pad; an insulation adhesive layer and a conductive adhesive layer on the die pad; a control circuit die on the insulation adhesive layer, where the insulation adhesive layer comprises a first insulation adhesive layer on a back surface of the control circuit die, and a second insulation adhesive on a surface of the die pad, where the first insulation adhesive layer is connected to the second insulation adhesive layer; and a power device die on the conductive adhesive layer, where the insulation adhesive layer is separated from the conductive adhesive layer.

Abstract: A pseudo differential analog-to-digital converter includes: a first capacitor array and a second capacitor array respectively coupled to input terminals of an analog-to-digital circuit; where an output terminal of the first capacitor array receives a first reference voltage, and an output terminal of the second capacitor array receives a second reference voltage; and where a difference between the first and second reference voltages is set between zero and a peak value of an analog input signal.

Abstract: A frequency control circuit, applied in a switching converter, can be configured to: regulate an off time of a power transistor of the switching converter in one switching cycle according to an on time of the power transistor, or regulate the on time of the power transistor in one switching cycle according to the off time of the power transistor; and maintain an operating frequency of the switching converter to be within a predetermined range.

Abstract: A DC-DC converter can include: a switched capacitor converter including at least one switch group and at least one capacitor, where each switch group includes two switches coupled in series, and at least one capacitor is respectively coupled in parallel with a corresponding one of the switch groups; and a switch converter including a first magnetic component, where the switch converter is configured to share one of the switch groups, the first magnetic component is coupled to an intermediate node of the shared switch group, and the intermediate node is a common coupling point of two switches of the shared switch group.

Abstract: An optical package assembly can include: a first circuit board; a second circuit board and a first structure arranged on the first circuit board, where the second circuit board is adjacent to the first structure; and a second structure arranged on the second circuit board, where a thickness of the first structure is equal to a combined thickness of the second circuit board and the second structure.

Abstract: A semiconductor structure can include: a semiconductor substrate having a first region, a second region, and an isolation region disposed between the first and second regions; an isolation structure located in the isolation region, where the isolation structure comprises a first isolation ring having a first doping type, and a second isolation ring having a second doping type, where the first isolation ring is configured to absorb first carriers flowing from the first region to the second region, and where the second isolation ring is configured to absorb second carriers flowing from the second region to the first region; and a lateral blocking component in the isolation structure, where the lateral blocking component is configured to block a lateral flow of the first and second carriers, in order to increase a flow path of the first and second carriers in the semiconductor substrate.

Abstract: A semiconductor device can include: a substrate having a first doping type; a first well region located in the substrate and having a second doping type, where the first well region is located at opposite sides of a first region of the substrate; a source region and a drain region located in the first region, where the source region has the second doping type, and the drain region has the second doping type; and a buried layer having the second doping type located in the substrate and below the first region, where the buried layer is incontact with the first well region, where the first region is surrounded by the buried layer and the first well region, and the first doping type is opposite to the second doping type.

Abstract: A chip package assembly and a method for manufacturing the same are provided. A die is attached to one of pins located around a chip carrier, so that an electronic component such as a diode is packaged in the chip package assembly and is electrically connected in series with other dies inside the package, thereby improving the degree of integration of the chip package assembly, and reducing a volume of the external circuit.

Abstract: A voltage regulator can include: an input port with two terminals, and being configured to receive an input voltage; an output port with two terminals, and being configured to generate an output voltage, where the input port and the output port have a common ground potential; a group of input switches coupled in series between the two terminals of the input port, where a common node of every two adjacent input switches that form an input half-bridge topology is taken as an input switch node; at least one output half-bridge topology coupled between two terminals of the output port, where a common node of a high-side output switch and a low-side output switch in each output half-bridge topology is taken as an output switch node; and N storage capacitors, where each of the storage capacitors is coupled between one input switch node and one output switch node.

Abstract: A power converter can include: a rectifier circuit; a silicon controlled dimmer coupled between an AC input terminal and an input terminal of the rectifier circuit; and a bleeder circuit coupled to an output terminal of the rectifier circuit, and being configured to provide a bleeder current after the silicon controlled dimmer is turned off. A method of controlling a power converter, can include: generating a bleeder current flowing though output terminals of a rectifier circuit of the power converter after a silicon controlled dimmer is turned off; and where the silicon controlled dimmer coupled to the rectifier circuit receives an AC input voltage.

Abstract: A control circuit for a flyback converter is configured to adjust a conduction time of an auxiliary switch of the flyback converter in accordance with a drain-source voltage of a main switch of the flyback converter when the main switch is turned on, in order to achieve zero-voltage switching of the main switch. The flyback converter can include: a main power stage having the main switch to control energy storage and transmission of a transformer; and a clamp circuit having an auxiliary switch to provide a release path for releasing energy of leakage inductance of the transformer.

Abstract: A semiconductor die can include: first, second, third, and fourth transistors disposed at intervals, where each two of the first, second, third, and fourth transistors are separated by a separation region to form four separation regions; an isolation structure having a first doping structure of a first doping type, and a second doping structure of a second doping type, to absorb hole carriers and electron carriers flowing between the first, second, third, and fourth transistors; where the first doping structure is located in the separation region to isolate adjacent transistors in the first, second, third, and fourth transistors; and where at least a portion of the second doping structure is surrounded by the first doping structure, and the second doping structure is separated from the first doping structure.

Abstract: A laterally diffused metal oxide semiconductor device can include: a well region having a second doping type; a reduced surface field effect layer of a first doping type formed by an implantation process in a predetermined region of the well region, where a length of the reduced surface field effect layer is less than a length of the well region; a body region of the first doping type extending from a top surface of the well region into the well region; a drain portion of the second doping type extending from the top surface of the well region into the well region; and an insulating structure located between the body region and the drain portion, at least a portion of the insulating structure is located on the top surface of the well region.

Abstract: A light guide plate can include: a first end surface coupled to a reflection surface and a second end surface; where an incident light entering the light guide plate through the first end surface is reflected by the reflection surface and then output from the second end surface; and a diffusion structure configured to increase a transmission path of the incident light in the light guide plate.

Abstract: A method of cleaning a contact hole of a semiconductor device, can include: removing a first portion of an object to be removed in the contact hole by a dry cleaning process, where a second portion of the object to be removed remains after the dry cleaning process has completed; and removing the second portion of the object to be removed by a wet cleaning process. The method can further include: forming an interlayer dielectric layer on a semiconductor substrate having a contact region; etching the interlayer dielectric layer to form the contact hole, where the contact hole penetrates the interlayer dielectric layer and exposes the contact region; and after the cleaning of the contact hole, filling the contact hole by a metal material to form a metal plug that is in contact with the contact region.

Abstract: Disclosed a transient voltage suppressor and a method for manufacturing the same. According to the transient voltage suppressor, an additional gate stack layer is introduced based on the prior transient voltage suppressor, and the diffusion isolation regions are reused as the conductive vias, so that, the gate stack layer, the first doped region, the conductive vias, and the second semiconductor layer constitute a MOS transistor being coupled in parallel to the Zener diode or the avalanche diode of the transient voltage suppressor. When the current of the I/O terminal is relatively large, the MOS transistor is turned on to share part of the current of the I/O terminal through the Zener diode or the avalanche diode, thereby protecting the Zener diode or the avalanche diode from being damaged due to excessive current. Thus, the robustness of the transient voltage suppressor is improved without increasing the manufacture cost.