Patents Assigned to Silicon Valley Group
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Publication number: 20040205425Abstract: A method and system of accurately processing a discrete time input signal having a first clock rate into a discrete time output signal having a second clock rate is presented. The method includes delta filtering the input signal to produce an intermediate signal having the first clock rate and delta interpolating the intermediate signal to produce the output signal. Delta filtering includes calculating an input delta signal by subtracting an initial value from the input signal, generating a filtered delta signal, and adding the initial value to the filtered delta signal. Delta interpolating includes upsampling the intermediate signal to the second clock rate, calculating an upsampled intermediate delta signal by subtracting an initial value from the upsampled intermediate signal, filtering the intermediate delta signal, and adding the initial value to the filtered intermediate delta signal.Type: ApplicationFiled: March 23, 2004Publication date: October 14, 2004Applicants: Silicon Valley Group, Inc., ASML Holding N.V.Inventor: Roberto B. Wiener
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Publication number: 20040177103Abstract: A method and system of efficiently processing a discrete time input signal having a plurality of input signal samples that occur at a first clock rate into a discrete time output signal having a second clock rate that is R times the first clock rate is presented. The method includes receiving the input signal and filtering the input signal with an N-taps finite impulse response (FIR) filter having N filter coefficients. The method reduces the number of required operations and reduces computational errors in the filtering and interpolation of discrete input signals.Type: ApplicationFiled: March 23, 2004Publication date: September 9, 2004Applicants: Silicon Valley Group, Inc., ASML US, Inc. to ASML Holding N.V.Inventor: Roberto B. Wiener
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Patent number: 6616394Abstract: Systems and methods are described for wafer processing. A wafer processing apparatus includes: a first wafer transporter; a process station coupled to the first wafer transporter, the process station including: a first plurality of wafer processing stacks, each of the plurality of wafer processing stacks including a plurality of wafer processing modules, and a second wafer transporter coupled to the plurality of wafer processing modules, each of the plurality of wafer processing modules adjacent, and accessible by, the second wafer transporter; and a third wafer transporter coupled to the process station, wherein any of the plurality of wafer processing modules in any of the plurality of wafer processing stacks can be accessed by at least two adjacent wafer transporters from among the first, second and third wafer transporter.Type: GrantFiled: December 30, 1998Date of Patent: September 9, 2003Assignee: Silicon Valley GroupInventor: Jae Heon Park
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Publication number: 20030164931Abstract: An apparatus, system, and method for configuring a dual isolation system lithography tool is described. An isolated base frame is supported by a non-isolated tool structure. A wafer stage component is supported by the isolated base frame. The wafer stage component provides a mount for a semiconductor wafer. A reticle stage component is supported by the isolated base frame. The reticle stage component provides a mount for a reticle. An isolated bridge provides a mount for a projection optics. The isolated bridge is supported by the isolated base frame. Alternatively, an isolated bridge is supported by a non-isolated base frame. A wafer stage component is supported by the non-isolated base frame. A reticle stage component is supported by the non-isolated base frame. An isolated optical relay is supported by the non-isolated base frame. The isolated optical relay includes one or more individually servo controlled framing blades.Type: ApplicationFiled: February 21, 2003Publication date: September 4, 2003Applicant: Silicon Valley Group, Inc.Inventors: Daniel N. Galburt, Peter C. Kochersperger
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Patent number: 6570713Abstract: The use of refractive optical elements to reduce or eliminate unwanted wavelength components from a laser emission. The method and apparatus described herein introduces modifications to the parallelism of one or more existing optical elements within the laser to dispersively separate wavelength components of the laser emission. According to embodiments of the invention, modifications in the parallelism can be made to the output coupler, intra-cavity polarizing optical components, and extra-cavity beamsplitter to accomplish separation of wavelength components without the introduction of additional optical components or reduction in the operating capacity of the laser. Additional optical components can be used to accomplish further separation of the wavelength components after the laser beam leaves the laser resonator.Type: GrantFiled: February 27, 2001Date of Patent: May 27, 2003Assignee: Silicon Valley Group, Inc.Inventor: Steven N. Bittenson
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Publication number: 20030086158Abstract: The present invention provides a ultraviolet (UV) polarizing beam splitter cube. The UV polarizing beam splitter cube is transmissive to light at wavelengths equal to or less than 170 nm, and for example at 157 nm. The UV polarizing beam splitter cube can image at high quality light incident over a wide range of angles and including a numeric aperture greater than 0.6, and for example at 0.75. In one embodiment, the UV polarizing beam splitter cube comprises a pair of prisms that are made of at least a fluoride material, and a coating interface having at least one layer of a thin film fluoride material. In one example implementation, a UV polarizing beam splitter cube comprises a pair of prisms that are made of at least calcium fluoride material, and a coating interface having a stack of alternating layers of thin film fluoride materials. The alternating layers of thin film fluoride materials comprise first and second fluoride materials.Type: ApplicationFiled: October 4, 2002Publication date: May 8, 2003Applicant: Silicon Valley Group, Inc.Inventors: James A. McClay, Ronald A. Wilklow, Matthew Gregoire
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Publication number: 20030060921Abstract: A lithography system and method for calculating an optimal discrete time trajectory for a movable device is described. A trajectory planner of the lithography system calculates an optimal discrete time trajectory subject to maximum velocity and maximum acceleration constraints. The trajectory planner begins by calculating a continuous time, three-segment trajectory for a reticle stage, a wafer stage or a framing blade, including a first phase for acceleration at the maximum acceleration to the maximum velocity, a second phase for travel at the maximum velocity and a third phase for deceleration at the negative maximum acceleration to a final velocity. Next, the trajectory planner converts said continuous time, three-segment trajectory to a discrete time trajectory. The time of execution of the resulting trajectory is at most three quanta greater than the time of execution of the continuous time trajectory. One advantage of the system is the reduction of scanning times of a lithography system.Type: ApplicationFiled: August 8, 2001Publication date: March 27, 2003Applicant: Silicon Valley Group, Inc.Inventor: Roberto B. Wiener
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Patent number: 6538720Abstract: An apparatus, system, and method for configuring a dual isolation system lithography tool is described. An isolated base frame is supported by a non-isolated tool structure. A wafer stage component is supported by the isolated base frame. The wafer stage component provides a mount for a semiconductor wafer. A reticle stage component is supported by the isolated base frame. The reticle stage component provides a mount for a reticle. An isolated bridge provides a mount for a projection optics. The isolated bridge is supported by the isolated base frame. Alternatively, an isolated bridge is supported by a non-isolated base frame. A wafer stage component is supported by the non-isolated base frame. A reticle stage component is supported by the non-isolated base frame. An isolated optical relay is supported by the non-isolated base frame. The isolated optical relay includes one or more individually servo controlled framing blades.Type: GrantFiled: February 28, 2001Date of Patent: March 25, 2003Assignee: Silicon Valley Group, Inc.Inventors: Daniel N. Galburt, Peter C. Kochersperger
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Publication number: 20030055855Abstract: The present invention is directed to efficient and accurate filtering and interpolation techniques. Methods of the present invention reduce the number of required operations and reduce computational errors in the filtering and interpolation of discrete input signals.Type: ApplicationFiled: January 11, 2001Publication date: March 20, 2003Applicant: Silicon Valley Group, Inc.Inventor: Roberto B. Wiener
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Patent number: 6522483Abstract: An optical reduction system for use in the photolithographic manufacture of semiconductor devices having one or more quarter-wave plates operating near the long conjugate end. A quarter-wave plate after the reticle provides linearly polarized light at or near the beamsplitter. A quarter-wave plate before the reticle provides circularly polarized or generally unpolarized light at or near the reticle. Additional quarter-wave plates are used to further reduce transmission loss and asymmetries from feature orientation. The optical reduction system provides a relatively high numerical aperture of 0.7 capable of patterning features smaller than 0.25 microns over a 26 mm×5 mm field. The optical reduction system is thereby well adapted to a step and scan microlithographic exposure tool as used in semiconductor manufacturing. Several other embodiments combine elements of different refracting power to widen the spectral bandwidth which can be achieved.Type: GrantFiled: April 25, 2001Date of Patent: February 18, 2003Assignee: Silicon Valley Group, Inc.Inventor: Justin L. Kreuzer
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Publication number: 20030031545Abstract: A reticle protection and transport system and method for a lithography tool. The system includes an indexer that stores a plurality of reticles and a removable reticle cassette. The removable reticle cassette is comprised of an inner chamber and an outer chamber. The system further includes an end effector coupled to a robotic arm. The end effector engages one of the plurality of reticles to enable the reticle to be positioned within the removable reticle cassette and thereafter transported. The system further includes a seal, coupled to the end effector and the robotic arm. To transport the reticle, the reticle is first loaded onto the end effector. Next, the end effector is used to create an arrangement wherein the reticle is loaded into the removable reticle cassette. Importantly, the reticle and removable reticle cassette do not come into contact with one another.Type: ApplicationFiled: August 10, 2001Publication date: February 13, 2003Applicant: Silicon Valley Group, Inc.Inventors: Michael DeMarco, Glenn Friedman, Jorge Ivaldi, James McClay
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Patent number: 6509952Abstract: Particular types of distortion within a lithographic system may be characterized by linewidth control parameters. Linewidth control parameters of any given line or feature within a printed pattern vary as a result of optical capabilities of the lithography apparatus used, particular characteristics of the reticle, focus setting, light dose fluctuations, etc. The instant invention uses focus offset coefficients to change the focus at points within a slot to compensate for the linewidth control parameter variations introduced by the factors contributing to such variations. Additionally, different focuses can be set dynamically along the scan for a particular slot point. A set, or sets, of focus offset coefficients is generated for a particular lithography apparatus, depending on the number of linewidth control parameters for which correction is desired.Type: GrantFiled: May 23, 2000Date of Patent: January 21, 2003Assignee: Silicon Valley Group, Inc.Inventors: Pradeep Kumar Govil, James Tsacoyeanes
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Patent number: 6480330Abstract: The present invention provides an ultraviolet (UV) polarizing beam splitter cube. The UV polarizing beam splitter cube is transmissive to light at wavelengths equal to or less than 170 nm and can image, at high quality, light incident over a wide range of angles and including a numeric aperture greater than 0.6. The UV polarizing beam splitter cube comprises a pair of prisms that are made of at least a fluoride material, and a coating interface having at least one layer of a thin film fluoride material. Alternating layers of thin film fluoride materials can comprise a first fluoride material having a first refractive index and a second fluoride material having a second refractive index. The first and second fluoride materials form a stack of fluoride materials having relatively high and low refractive indices such that the coating interface separates UV light into two polarized states.Type: GrantFiled: March 30, 2000Date of Patent: November 12, 2002Assignee: Silicon Valley Group, Inc.Inventors: James A. McClay, Ronald A. Wilklow, Matthew Gregoire
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Publication number: 20020158185Abstract: A focus system that includes a calibration subsystem and a control subsystem. The control subsystem, which includes a control sensor, is in close proximity to the exposing of an image. The calibration subsystem, which includes a calibration sensor and a control sensor, is located remotely from, or off-axis with respect to, the exposing of an image. By separating calibration and control functions, the functional requirements can be separated into two (or more) types of sensors.Type: ApplicationFiled: April 25, 2001Publication date: October 31, 2002Applicant: Silicon Valley Group, Inc.Inventors: Michael L. Nelson, Justin L. Kreuzer, Peter L. Filosi, Christopher J. Mason
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Patent number: 6472643Abstract: This invention is a substrate thermal management system for efficient, rapid, controllable and uniform thermal management over a wide temperature range. The thermal management system integrates a thermal source, thermal sink and a thermal diffuser. According to the invention, a thermal diffuser is positioned stationary relative to the wafer surface and coupled to a thermal source and a thermal sink, which are also stationary relative to the wafer surface. The thermal source includes a plurality of zones adapted to provide differing amounts of heat and a controllable temperature field over a surface proximal to the thermal diffuser. The thermal sink comprises a heat-carrying media with a controllable temperature.Type: GrantFiled: March 7, 2000Date of Patent: October 29, 2002Assignee: Silicon Valley Group, Inc.Inventor: Dikran S. Babikian
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Patent number: 6468586Abstract: Systems and methods are described for environmental exchange control for a polymer on a wafer surface. An apparatus for controlling an exchange between an environment and a polymer on a surface of a wafer located in the environment includes: a chamber adapted to hold the wafer, define the environment, and maintain the polymer in an adjacent relationship with the environment; and a heater coupled to the chamber. A method for improving performance of a spin-on material includes: forming the spin-on material on a surface of a wafer; then locating the spin-on material in an environment so that said environment is adjacent said spin-on material; and then controlling an exchange between the spin-on material and said environment. The systems and methods provide advantages because inappropriate deprotection is mitigated by careful control of the environmental temperature and environmental species partial pressures (e.g. relative humidity).Type: GrantFiled: May 8, 2000Date of Patent: October 22, 2002Assignee: Silicon Valley Group, Inc.Inventors: Emir Gurer, Ed C. Lee, Tom Zhong, Kevin Golden, John W. Lewellen, Scott C. Wackerman, Reese Reynolds
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Patent number: 6465044Abstract: This invention relates to a method of depositing silicon oxide films on the surface of semiconductor substrates, and more particularly to depositing such films by chemical vapor deposition using alkylsiloxane oligomers precursors with ozone.Type: GrantFiled: April 4, 2000Date of Patent: October 15, 2002Assignee: Silicon Valley Group, Thermal Systems LLPInventors: Sanjeev Jain, Zheng Yuan
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Publication number: 20020134507Abstract: A gas delivery metering tube is provided. The gas delivery metering tube includes a two axially aligned nested tubes wherein the inner and outer tubes receive a gas through one end of the assembly and the inner tube conveys gas to the opposite end of the outer tube. The outer tube contains one or more arrays of orifices. Conveying gas to the end of the outer tube opposite that connected to the gas inlet provides for more even backing pressure over the entire length of the gas delivery metering tube than can be achieved by allowing gas to enter only through a single inlet.Type: ApplicationFiled: July 13, 2001Publication date: September 26, 2002Applicant: Silicon Valley Group, Thermal Systems LLCInventors: Jay Brian DeDontney, Anthony DeSa, Samuel Kurita
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Publication number: 20020118721Abstract: The use of refractive optical elements to reduce or eliminate unwanted wavelength components from a laser emission. The method and apparatus described herein introduces modifications to the parallelism of one or more existing optical elements within the laser to dispersively separate wavelength components of the laser emission. According to embodiments of the invention, modifications in the parallelism can be made to the output coupler, intra-cavity polarizing optical components, and extra-cavity beamsplitter to accomplish separation of wavelength components without the introduction of additional optical components or reduction in the operating capacity of the laser. Additional optical components can be used to accomplish further separation of the wavelength components after the laser beam leaves the laser resonator.Type: ApplicationFiled: February 27, 2001Publication date: August 29, 2002Applicant: Silicon Valley Group, Inc.,Inventor: Steven N. Bittenson
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Publication number: 20020118346Abstract: An apparatus, system, and method for configuring a dual isolation system lithography tool is described. An isolated base frame is supported by a non-isolated tool structure. A wafer stage component is supported by the isolated base frame. The wafer stage component provides a mount for a semiconductor wafer. A reticle stage component is supported by the isolated base frame. The reticle stage component provides a mount for a reticle. An isolated bridge provides a mount for a projection optics. The isolated bridge is supported by the isolated base frame. Alternatively, an isolated bridge is supported by a non-isolated base frame. A wafer stage component is supported by the non-isolated base frame. A reticle stage component is supported by the non-isolated base frame. An isolated optical relay is supported by the non-isolated base frame. The isolated optical relay includes one or more individually servo controlled framing blades.Type: ApplicationFiled: February 28, 2001Publication date: August 29, 2002Applicant: Silicon Valley Group, Inc.Inventors: Daniel N. Galburt, Peter C. Kochersperger