Abstract: A method of fabricating a poly-crystalline silicon ingot includes: (a) loading a nucleation promotion layer onto a bottom of a mold; (b) providing a silicon source on the nucleation promotion layer in the mold; (c) heating the mold until the silicon source is melted into a silicon melt completely; (d) controlling at least one thermal control parameter regarding the silicon melt continually to enable the silicon melt to nucleate on the nucleation promotion layer such that a plurality of silicon grains grow in the vertical direction; (e) controlling the at least one thermal control parameter to enable the plurality of the silicon grains to continuously grow with an average grain size increasing progressively in the vertical direction until entirety of the silicon melt is solidified to obtain the poly-crystalline silicon ingot, wherein the nucleation promotion layer is loaded by spreading a plurality of mono-Si particles over the bottom of the mold.

Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.

Abstract: The instant disclosure relates to a wafer formed by slicing an ingot. The wafer has at least one side surface adjacent to the slicing path and topped with a nanostructure layer.

Abstract: A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.

Abstract: The invention discloses a seed used for crystalline silicon ingot casting. A seed according to a preferred embodiment of the invention includes a crystal and an impurity diffusion-resistant layer. The crystal is constituted by at least one grain. The impurity diffusion-resistant layer is formed to overlay an outer surface of the crystal. A crystalline silicon ingot fabricated by use of the seed of the invention has significantly reduced red zone and yellow zone.

Abstract: A crystalline silicon ingot and a method of fabricating the same are disclosed. The crystalline silicon ingot of the invention includes multiple silicon crystal grains growing in a vertical direction of the crystalline silicon ingot. The crystalline silicon ingot has a bottom with a silicon crystal grain having a first average crystal grain size of less than about 12 mm. The crystalline silicon ingot has an upper portion, which is about 250 mm away from said bottom, with a silicon crystal grain having a second average crystal grain size of greater than about 14 mm.

Abstract: A method for manufacturing a wafer includes forming a plurality nano-pillars on a surface of a brick; forming a cover layer on the surfaces of the brick, wherein the cover layer covers the nano-pillars; forming an adhesive layer on the surface of the cover layer; cutting the brick into a plurality of wafers; and removing the cover layer and the adhesive layer on the wafers by a solvent, wherein the solvent reacts with the cover layer but not reacts with the brick.

Abstract: A method for inhibiting light-induced degradation of a photovoltaic device includes steps of: a) subjecting the photovoltaic device to an illumination treatment using a light having a wavelength not less than 300 nm to heat the photovoltaic device in the absence of ambient light; and b) maintaining the temperature of the photovoltaic device above an annealing temperature of the photovoltaic device for at least 0.5 minute. An apparatus for inhibiting light-induced degradation of a photovoltaic device is also disclosed.

Abstract: A crystal growth device includes a crucible and a heater setting. The crucible has a bottom and a top opening. The heater setting surrounds the crucible and is movable relative to the crucible along a top-bottom direction of the crucible and between first and second positions. The heater setting includes a first temperature heating zone and a second temperature heating zone higher in temperature than the first temperature heating zone. The heater setting is in the first position when the crucible is in the second temperature heating zone and in the second position when the crucible is in the first temperature heating zone.

Abstract: A crystalline silicon ingot and a method of manufacturing the same are provided. Using a crystalline silicon seed layer, the crystalline silicon ingot is formed by a directional solidification process. The crystalline silicon seed layer is formed of multiple primary monocrystalline silicon seeds and multiple secondary monocrystalline silicon seeds. Each of the primary monocrystalline silicon seeds has a first crystal orientation different from (100). Each of the secondary monocrystalline silicon seeds has a second crystal orientation different from the first crystal orientation. Each of the primary monocrystalline silicon seeds is adjacent to at least one of the secondary monocrystalline silicon seeds, and separate from the others of the primary monocrystalline silicon seeds.

Abstract: In a crystalline silicon formation apparatus, a quick cooling method is applied to the bottom of a crucible to control a growth orientation of a polycrystalline silicon grain, such that the crystal grain forms twin boundary, and the twin boundary is a symmetric grain boundary, and the crystal grain is solidified and grown upward in unidirection to form a complete polycrystalline silicon, such that defects or impurities will not form in the polycrystalline silicon easily.

Abstract: An approach is provided for a method to manufacture a crystalline silicon ingot. The method comprises providing a mold formed for melting and cooling a silicon feedstock by using a directional solidification process, disposing a barrier layer inside the mold, disposing one or more silicon crystal seeds on the barrier layer, loading the silicon feedstock on the silicon crystal seeds, heating the mold to obtain a silicon melt, and cooling the mold by the directional solidification process to solidify the silicon melt into a silicon ingot. The mold is heated until the silicon feedstock is fully melted and the silicon crystal seeds are at least partially melted.

Abstract: The invention provides an epitaxial substrate and fabrication thereof. The epitaxial substrate according to the invention includes a crystalline substrate. In particular, the crystalline substrate has an epitaxial surface which is nano-rugged and non-patterned. The epitaxial substrate according to the invention thereon benefits a compound semiconductor material in growth of epitaxy films with excellent quality. Moreover, the fabrication of the epitaxial substrate according to the invention has advantages of low cost and rapid production.

Abstract: The instant disclosure relates to a nanostructuring process for an ingot surface prior to the slicing operation. A surface treatment step is performed for at least one surface of the ingot in forming a nanostructure layer thereon. The nanostructure layer is capable of enhancing the mechanical strength of the ingot surface to reduce the chipping ratio of the wafer during slicing.

Abstract: The invention discloses an optoelectronic device and method of fabricating the same. The optoelectronic device according to the invention includes a semiconductor structure combination, a first surface passivation layer formed on an upper surface of the semiconductor structure combination, and a second surface passivation layer formed on the first surface passivation layer. The semiconductor structure combination includes at least one P-N junction. In particular, the interfacial state density of the first surface passivation layer is lower than that of the second surface passivation layer, and the fixed oxide charge density of the second surface passivation layer is higher than that of the first surface passivation layer.

Abstract: The invention discloses a seed used for crystalline silicon ingot casting. A seed according to a preferred embodiment of the invention includes a crystal and an impurity diffusion-resistant layer. The crystal is constituted by at least one grain. The impurity diffusion-resistant layer is formed to overlay an outer surface of the crystal. A crystalline silicon ingot fabricated by use of the seed of the invention has significantly reduced red zone and yellow zone.

Abstract: A method for patterning an epitaxial substrate includes: (a) forming an etch mask layer over an epitaxial substrate, and patterning the etch mask layer using a patterned cover mask layer to form the etch mask layer into a plurality of spaced apart mask patterns; and (b) etching the epitaxial substrate that is exposed from the mask patterns, and removing the mask patterns such that the epitaxial substrate is formed with a plurality of spaced apart substrate patterns.

Abstract: A crystalline silicon ingot and a method of fabricating the same are provided. The method utilizes a nucleation promotion layer to facilitate a plurality of silicon grains to nucleate on the nucleation promotion layer from a silicon melt and grow in a vertical direction into silicon grains until the silicon melt is completely solidified. The increment rate of defect density in the silicon ingot along the vertical direction has a range of 0.01%/mm˜10%/mm.

Abstract: A light emitting diode (LED) substrate includes a sapphire substrate which is characterized by having a surface consisting of irregular hexagonal pyramid structures, wherein a pitch of the irregular hexagonal pyramid structure is less than 10 ?m. A symmetrical cross-sectional plane of each of the irregular hexagonal pyramid structures has a first base angle and a second base angle, wherein the second base angle is larger than the first base angle, and the second base angle is 50° to 70°. This LED substrate has high light-emitting efficiency.

Abstract: A solar cell is provided. The solar cell includes a substrate, a first electrode, a second electrode, a seed layer, and a plurality of nanorods. The substrate has a first surface and a second surface opposite to each other. A conductive type of a portion of the substrate adjacent to the first surface is first conductive type, and a conductive type of the remaining portion of the substrate is second conductive type. The first electrode is disposed on the first surface. The second electrode is disposed on the second surface. The seed layer is disposed on the first surface. The nanorods are disposed on the seed layer.