Patents Assigned to Sony Semiconductor Solutions
  • Patent number: 12009378
    Abstract: To provide a solid-state imaging device capable of improving image quality and an electronic apparatus equipped with the solid-state imaging device. There is provided a solid-state imaging device including a pixel array unit in which a plurality of pixels is one-dimensionally or two-dimensionally arrayed, the pixel array unit including a color filter and a semiconductor substrate for each pixel, a partition layer being formed between the color filters, the partition layer having a first width and a second width in order from a light incident side, the first width and the second width being different, and the second width being larger than the first width, and there is further provided an electronic apparatus equipped with the solid-state imaging device.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: June 11, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Tetsuya Yamaguchi
  • Publication number: 20240186341
    Abstract: An imaging device according to an embodiment includes: a pixel array unit including a plurality of pixels arranged in matrix arrangement, in which a separation portion that separates a pixel with a separation surface to acquire a phase difference is provided at an angle different from 0 degrees with respect to a column direction in the arrangement in at least some of the plurality of pixels.
    Type: Application
    Filed: March 2, 2022
    Publication date: June 6, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Koji MIYATA
  • Publication number: 20240186352
    Abstract: Provided is an imaging device capable of suppressing an influence of flare. An imaging device according to the present disclosure includes: a pixel region in which a plurality of pixels that performs photoelectric conversion is arranged; an on-chip lens provided on the pixel region; a protective member provided on the on-chip lens; and a resin layer that adheres between the on-chip lens and the protective member, in which when a thickness of the resin layer and the protective member is T, a length of a diagonal line of the pixel region viewed from an incident direction of light is L, and a critical angle of the protective member is ?c, T?L/2/tan?c (Formula 2) or T?L/4/tan?c (Formula 3) is satisfied.
    Type: Application
    Filed: February 9, 2022
    Publication date: June 6, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshiaki MASUDA, Keisuke HATANO, Hirokazu SEKI, Atsushi TODA, Shinichiro NOUDO, Yusuke OIKE, Yutaka OOKA, Naoto SASAKI, Toshiki SAKAMOTO, Takafumi MORIKAWA
  • Publication number: 20240183955
    Abstract: A Time-of-Flight system having a light source which emits first light rays at a first wavelength and second light rays at a second wavelength to an object, the second wavelength being larger than the first wavelength, and a time-of-flight sensor which detects the first light rays at the first wavelength and the second light rays at the second wavelength, and generates first time-of-flight data associated with the detected first light rays and second time-of-flight data associated with the detected second light rays.
    Type: Application
    Filed: April 26, 2022
    Publication date: June 6, 2024
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Madani ARIOUA, Morin DEHAN, Anthony ANTOUN, Carlos BELMONTE PALMERO
  • Publication number: 20240186357
    Abstract: An imaging element according to the present disclosure includes a pixel, an overflow path, a pixel isolation unit, a pixel isolation electrode, an in-pixel isolation unit, and an in-pixel isolation electrode. The pixel includes a plurality of photoelectric conversion units formed in a semiconductor substrate having an interconnect region arranged on a front surface side and performs photoelectric conversion of incident light. The overflow path mutually transfers charges between the plurality of photoelectric conversion units. The pixel isolation unit is at a boundary of the pixel. The pixel isolation electrode is in the pixel isolation unit, and a first bias voltage is applied to the pixel isolation electrode. The in-pixel isolation unit isolates the plurality of photoelectric conversion units from each other. The in-pixel isolation electrode is arranged in the in-pixel isolation unit, and a second bias voltage is applied to the in-pixel isolation electrode.
    Type: Application
    Filed: January 31, 2022
    Publication date: June 6, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Hiroshi TAKAHASHI, Shigehiro IKEHARA, Tadashi IIJIMA
  • Publication number: 20240186354
    Abstract: A solid-state imaging element of an embodiment of the present disclosure includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel transistor provided on one surface of the semiconductor substrate; and an element separation section provided in the semiconductor substrate and including a first element separation section and a second element separation section that have mutually different configurations, the element separation section defining an active region of the pixel transistor, in which the second element separation section has, on a side surface, a first semiconductor region and a second semiconductor region that have mutually different impurity concentrations in a depth direction of the second element separation section.
    Type: Application
    Filed: February 7, 2024
    Publication date: June 6, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Atsushi Masagaki
  • Patent number: 12003878
    Abstract: An imaging device including an imaging unit in which a plurality of shared sections each including two pixel regions adjacent at least in a first direction is provided and the shared sections provided at closest positions in a second direction are disposed to shift in the first direction by the one pixel region, a photoelectric converter provided for each of the pixel regions, an electric charge holding unit that holds signal charge generated by the photoelectric converter, an electric charge voltage converter to which the signal charge is transferred from the electric charge holding unit, and a pixel transistor that is electrically coupled to the electric charge voltage converter. The second direction intersects the first direction. The pixel transistor is provided for each of the shared sections.
    Type: Grant
    Filed: January 8, 2020
    Date of Patent: June 4, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Yoshimichi Kumagai, Takashi Abe, Ryoto Yoshita, Masashi Bando, Naoyuki Osawa
  • Patent number: 12002823
    Abstract: A solid-state image sensor includes a plurality of imaging device blocks each including P×Q imaging devices. In an imaging device block, first charge movement controlling electrodes are provided between the imaging devices, and second charge movement controlling electrodes are provided between the imaging device blocks. In the imaging device block, P imaging devices are arrayed along a first direction, and Q imaging devices are arrayed along a second direction. Charge accumulated in a photoelectric conversion layer of the (P?1)th imaging device from the first imaging device along the first direction is transferred to the photoelectric conversion layer of the Pth imaging device and read out together with charge accumulated in the photoelectric conversion layers of the Q Pth imaging devices, under the control of the first charge movement controlling electrodes.
    Type: Grant
    Filed: June 7, 2019
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Toshiaki Ono
  • Patent number: 12003870
    Abstract: Binning in a hybrid pixel structure of image pixels and event vision sensor (EVS) pixels. In one embodiment, the imaging sensor includes a pixel array including a plurality of pixel circuits and a plurality of binning transistors. A first portion of the plurality of pixel circuits individually includes an intensity photodiode. A second portion of the plurality of pixel circuits individually includes an event vision sensor (EVS) photodiode. The plurality of binning transistors is configured to bin together at least one of the first portion or the second portion.
    Type: Grant
    Filed: April 15, 2022
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Pooria Mostafalu, Frederick T. Brady, Sungin Han, Hongyi Mi
  • Patent number: 12001076
    Abstract: To provide, with an inexpensive construction, a lens module which does not require an individual adjustment of positions during mass production and which enables a degree of freedom of arrangement in a set to be improved. The lens module includes: a lens; a lens tube which has a central axis that is parallel to an optical axis of the lens and which is configured to hold the lens inside; a casing configured to house the lens tube inside; a first coil which is provided so as to circle around an outer circumferential surface of the lens tube; a magnet which is provided on an inner circumferential surface of the casing so as to oppose the first coil; and a second coil which is provided so as to circle around the inner circumferential surface of the casing.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: June 4, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kazunori Hasebe, Tatsuo Kuroiwa
  • Patent number: 12003873
    Abstract: A first and second pixel units that perform FD addition are provided. The first pixel unit includes: a first switch transistor of which one source/drain electrode is connected to an FD; and a reset transistor that is connected between another source/drain electrode of the first switch transistor and a power supply node. The second pixel unit includes: a second switch transistor of which one source/drain electrode is connected to an FD; a third switch transistor of which one source/drain electrode is connected to another source/drain electrode of the second switch transistor; and a capacitive element that is connected between another source/drain electrode of the third switch transistor and a reference potential node. The respective other source/drain electrodes of the first switch transistor and the second switch transistor are electrically connected with each other.
    Type: Grant
    Filed: April 29, 2022
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventor: Luonghung Asakura
  • Patent number: 12002833
    Abstract: A solid-state imaging device including: a first substrate having a pixel unit, and a first semiconductor substrate and a first wiring layer; a second substrate with a circuit, and a second semiconductor substrate and a second wiring layer; and a third substrate with a circuit, and a third semiconductor substrate and a third wiring layer. The first and second substrates are bonded together such that the first wiring layer and the second semiconductor substrate are opposed to each other. The device includes a first coupling structure for electrically coupling a circuit of the first substrate and the circuit of the second substrate. The first coupling structure includes a via in which electrically-conductive materials are embedded in a first through hole that exposes a wiring line in the first wiring layer and in a second through hole that exposes a wiring line in the second wiring layer or a film-formed structure.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hideto Hashiguchi, Reijiroh Shohji, Hiroshi Horikoshi, Ikue Mitsuhashi, Tadashi Iijima, Takatoshi Kameshima, Minoru Ishida, Masaki Haneda
  • Patent number: 12004403
    Abstract: A display device according to an embodiment of the present technology includes an element substrate, a transparent substrate, a light shielding filter portion, and a transparent adhesive layer. The element substrate includes a first surface, an organic EL element that emits light from a display region of the first surface, and peripheral wiring disposed to overlap in plan view with a peripheral region surrounding the display region. The transparent substrate includes a second surface facing the first surface. The light shielding filter portion includes a first color filter disposed in the peripheral region of the first surface and a second color filter disposed on the second surface to face the first color filter, and shields the peripheral wiring from light. The transparent adhesive layer is provided between the first color filter and the second color filter and bonds the element substrate and the transparent substrate to each other.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: June 4, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Kouhei Sugiyama, Hiroaki Tsuchioka
  • Patent number: 12002831
    Abstract: Effective use is achieved of a region in a proximity of a joining plane of semiconductor substrates in a semiconductor device including a stacked semiconductor substrate in which multilayer wiring layers of a plurality of semiconductor substrates are electrically connected to each other. The stacked semiconductor substrate includes plural semiconductor substrates on each of which a multilayer wiring layer is formed. In this stacked semiconductor substrate, the multilayer wiring layers are joined together and electrically connected to each other. In the proximity of a joining plane of the plurality of semiconductor substrates, a conductor is formed. This conductor is formed such that it is electrified in a direction of the joining plane.
    Type: Grant
    Filed: August 2, 2019
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Hajime Yamagishi, Eiji Sato, Akira Yamazaki, Takayuki Sekihara, Makoto Hayafuchi, Syunsuke Ishizaki
  • Patent number: 12002832
    Abstract: A solid-state image sensor is provided that includes a semiconductor substrate, a charge accumulator disposed in the semiconductor substrate and configured to accumulate charge, a photoelectric converter provided above the semiconductor substrate and configured to convert light to charge, and a through electrode passing through the semiconductor substrate and electrically connecting the charge accumulator with the photoelectric converter. At an end portion on the photoelectric converter side of the through electrode, a cross-sectional area of a conductor positioned at the center of the through electrode in a cut section orthogonal to a through direction of the through electrode gradually increases toward the photoelectric converter along the through direction.
    Type: Grant
    Filed: July 23, 2019
    Date of Patent: June 4, 2024
    Assignees: Sony Corporation, Sony Semiconductor Solutions Corporation
    Inventors: Shinpei Fukuoka, Moe Takeo, Sho Nishida, Hideaki Togashi, Takushi Shigetoshi, Junpei Yamamoto
  • Patent number: 12002826
    Abstract: A solid-state imaging element according to an embodiment of the present disclosure includes a first electrode including a plurality of electrodes, a second electrode opposed to the first electrode, and a photoelectric conversion layer provided between the first electrode and the second electrode, and the first electrode has, at least in a portion, an overlap section where the plurality of electrodes overlap each other with a first insulation layer interposed therebetween.
    Type: Grant
    Filed: December 27, 2022
    Date of Patent: June 4, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Hiroaki Matsuo
  • Patent number: 12002825
    Abstract: A solid-state imaging device of an embodiment of the present disclosure includes a semiconductor substrate having one surface and another surface opposed to the one surface, a photoelectric conversion section formed to be embedded in the semiconductor substrate, a charge holding section provided in the one surface of the semiconductor substrate while being stacked on the photoelectric conversion section, an n-type semiconductor region provided in the one surface of the semiconductor substrate, and a charge-voltage conversion section provided in the one surface of the semiconductor substrate. A charge generated in the photoelectric conversion section is transferred via the n-type semiconductor region to the charge holding section.
    Type: Grant
    Filed: July 26, 2019
    Date of Patent: June 4, 2024
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Ryo Fukui, Takashi Machida
  • Publication number: 20240180002
    Abstract: Provided are a display device and an electronic device in which a level difference between front sub-pixels can be suppressed even if a resonator structure is included, and a method of manufacturing the display device. A display device includes a plurality of sub-pixels corresponding to a plurality of color types, in which each of the sub-pixels includes a light emitting element including a first electrode, an organic layer, and a second electrode, and in at least the sub-pixels corresponding to one color type, a resonator structure that causes emitted light from the organic layer to resonate is formed and a refractive index adjustment layer is included in at least one of the first electrode or the second electrode.
    Type: Application
    Filed: March 4, 2022
    Publication date: May 30, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Tomoyoshi ICHIKAWA
  • Publication number: 20240178093
    Abstract: Provided are a semiconductor device configured to suppress a temperature rise of a semiconductor element and to suppress warpage, a method for manufacturing the semiconductor device including a cooling medium sealing step, and an electronic apparatus including the semiconductor device. The semiconductor device includes: a semiconductor element; a substrate to which the semiconductor element is adhered; and a cooling medium with which a clearance formed when the semiconductor element and the substrate are adhered to each other with an adhesive is filled. The cooling medium is a liquid metal, a metal-coated small sphere, or a liquid metal and a metal-coated small sphere. The cooling medium transmits heat generated by the semiconductor element to the outside to suppress a temperature rise.
    Type: Application
    Filed: March 15, 2022
    Publication date: May 30, 2024
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Takayuki TANAKA
  • Publication number: 20240176026
    Abstract: An illumination circuitry for a time-of-flight module for switching at least two illuminators, wherein the illumination circuitry is configured to: receive an input illumination signal from a time-of-flight sensor; and generate, based on the input illumination signal, synchronized first illumination signals for a first illuminator and second illumination signals for a second illuminator.
    Type: Application
    Filed: March 4, 2022
    Publication date: May 30, 2024
    Applicant: Sony Semiconductor Solutions Corporation
    Inventors: Nicolangelo LOPEZ, Luc BOSSUYT, Camille GIAUX, Victor BELOKONSKIY