Patents Assigned to STMicroelectron S.r.l.
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Patent number: 12195327Abstract: A PMUT device includes a membrane element adapted to generate and receive ultrasonic waves by oscillating, about an equilibrium position, at a corresponding resonance frequency. A piezoelectric element is located over the membrane element along a first direction and configured to cause the membrane element to oscillate when electric signals are applied to the piezoelectric element, and generate electric signals in response to oscillations of the membrane element. A damper is configured to reduce free oscillations of the membrane element, and the damper includes a damper cavity surrounding the membrane element, and a polymeric member having at least a portion over the damper cavity along the first direction.Type: GrantFiled: October 8, 2021Date of Patent: January 14, 2025Assignee: STMicroelectronics S.r.l.Inventors: Domenico Giusti, Marco Ferrera, Fabio Quaglia
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Patent number: 12197557Abstract: According to one aspect, a system-on-a-chip is proposed which includes a memory storage, a computation circuit, a comparison circuit, and a validation circuit. The memory storage is configured to store an external software module. The computation circuit is configured to compute several modified software modules from the external software module and compute check values by iteration until obtaining a final check value. Each check value is computed at least from a given modified software module and a check value previously computed, starting with a predefined initial check value. The comparison circuit is configured to compare the final check value to an expected value stored in the system-on-a-chip. The validation circuit is configured to validate the external software module when the final check value is equal to the expected value.Type: GrantFiled: November 9, 2021Date of Patent: January 14, 2025Assignees: STMicroelectronics S.r.l., STMicroelectronics (Rousset) SASInventors: Antonino Mondello, Stefano Catalano, Cyril Pascal
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Publication number: 20250015708Abstract: Disclosed herein is a DC-DC converter, including a high-side power switch coupled between an input voltage and a switched node and a low-side power switch coupled between the switched node and ground. An inductor is coupled between the switched node and an output node. An output capacitor is coupled between the output node and ground. A control circuit is configured to operate the high-side power switch in a constant charge mode of operation to vary on-time of the high-side power switch to maintain a constant amount of charge being transferred to the output capacitor during each charging cycle, independent of variation of the input voltage.Type: ApplicationFiled: July 6, 2023Publication date: January 9, 2025Applicants: STMicroelectronics S.r.l., Politecnico Di MilanoInventors: Lorenzo CREMONESI, Paolo MELILLO, Alessandro GASPARINI, Massimo GHIONI, Salvatore LEVANTINO
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Patent number: 12190909Abstract: A method includes coupling an electric motor in a hard disk drive to a set of driver circuits. Each driver circuit includes a high-side switch and a low-side switch. The high-side switch has a high-side current flow path between a supply node coupled to a supply voltage and a switching node coupled to a winding of the electric motor. The low-side switch has a low-side current flow path between the switching node and ground. Respective conduction currents are generated through the low-side current flow paths, in response to a command to reduce the motor speed by coupling a drive voltage to the control terminals of the low-side switches. An intensity of at least one of the respective conduction currents is sensed. In response to the sensed current intensity exceeding a current intensity threshold, the control terminals of the low-side switches are coupled to respective ones of the switching nodes.Type: GrantFiled: April 14, 2023Date of Patent: January 7, 2025Assignee: STMicroelectronics S.r.l.Inventors: Ezio Galbiati, Maurizio Ricci
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Patent number: 12187600Abstract: A MEMS actuator includes a semiconductor body with a first surface defining a housing cavity facing the first surface and having a bottom surface, the semiconductor body further defining a fluidic channel in the semiconductor body with a first end across the bottom surface. A strainable structure extends into the housing cavity, is coupled to the semiconductor body at the bottom surface, and defines an internal space facing the first end of the fluidic channel and includes at least a first and a second internal subspace connected to each other and to the fluidic channel. When a fluid is pumped through the fluidic channel into the internal space, the first and second internal subspaces expand, thereby straining the strainable structure along the first axis and generating an actuation force exerted by the strainable structure along the first axis, in an opposite direction with respect to the housing cavity.Type: GrantFiled: September 6, 2022Date of Patent: January 7, 2025Assignee: STMicroelectronics S.r.l.Inventors: Domenico Giusti, Carla Maria Lazzari
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Patent number: 12191850Abstract: In an embodiment a method includes receiving, at an input of a low-voltage section of a gate driver, a PWM control signal with a switching frequency, providing, at an output of a high-voltage section of the gat driver, a gate-driving signal as a function of the PWM control signal to a power stage, wherein the high-voltage section is galvanically isolated from the low-voltage section, receiving, at a feedback input of the high-voltage section, at least one feedback signal indicative of an operation of the power stage, converting, at an ADC module of the high-voltage section, the feedback signal into a digital data stream, providing, to the ADC module, a conversion-trigger signal designed to determine a start of a conversion for acquiring a new sample of the feedback signal and sending, via an isolation communication channel between the low-voltage section and the high-voltage section, the digital data stream to the low-voltage section.Type: GrantFiled: June 2, 2023Date of Patent: January 7, 2025Assignee: STMicroelectronics S.r.l.Inventors: Vittorio D′Angelo, Salvatore Cannavacciuolo, Valerio Bendotti, Paolo Selvo, Diego Alagna
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Patent number: 12187604Abstract: Techniques to be described herein are based upon the combination of a digital lock-in amplifier approach with a numerical method to yield accurate estimations of the amplitude and phase of a sense signal obtained from a movement sensor associated with a resonant MEMS device such as a MEMS mirror. The techniques described herein are efficient from a computational point of view, in a manner which is suitable for applications in which the implementing hardware is to follow size and power consumption constraints.Type: GrantFiled: January 25, 2022Date of Patent: January 7, 2025Assignee: STMicroelectronics S.r.l.Inventors: Raffaele Enrico Furceri, Luca Molinari
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Patent number: 12191869Abstract: In a control circuit for a switching stage of an electronic converter, a phase detector generates a drive signal in response to a phase difference between first and second clock signals. The first and second clock signals are generated by first and second current-controlled oscillators, respectively. An operational transconductance amplifier generates first and second control currents in response to a difference between a reference and a feedback of the electronic converter, with the first and second currents applied to control the first and second current-controlled oscillators. In response to a switching clock having a first state, a switching circuit applies first and second bias currents to the control inputs of the first and second current-controlled oscillators, respectively. Conversely, in response to the switching clock having a second state, the switching circuit applies the second and first bias currents to the control inputs of the first and second current-controlled oscillators, respectively.Type: GrantFiled: November 8, 2022Date of Patent: January 7, 2025Assignee: STMicroelectronics S.r.l.Inventors: Alessandro Bertolini, Alberto Cattani, Alessandro Gasparini
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Patent number: 12184177Abstract: Disclosed herein is a DC-DC converter including a power section and a bootstrap circuit for driving the gate of the high-side transistor of the power section. The bootstrap circuit includes an adaptive clamp circuit that maintains a proper voltage differential across the bootstrap capacitor within the bootstrap circuit for recharge during off-times regardless of whether the mode of operation of the DC-DC converter continuous conduction mode (CCM), discontinuous conduction mode (DCM), or pulse-skip mode. This voltage differential is established as being between a bootstrap voltage and a voltage at a tap between the high and low side transistors of the power section. The adaptive clamp circuit maintains the bootstrap voltage as following the lesser of the output voltage and the voltage at the tap.Type: GrantFiled: November 2, 2022Date of Patent: December 31, 2024Assignee: STMicroelectronics S.r.l.Inventors: Marco Attanasio, Giovanni Bellotti
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Publication number: 20240429132Abstract: A blocking element is provided for connecting an electronic, micro-mechanical and/or micro-electro-mechanical component, in particular for controlling the propulsion of an electric vehicle. The pin blocking element is formed by a holed body having a first end, a second end and an axial cavity configured for fittingly accommodating a connecting pin. A first flange projects transversely from the holed body at the first end and a second flange projects transversely from the holed body at the second end. The first flange has a greater area than the second flange and is configured to be ultrasonically soldered to a conductive bearing plate to form a power module.Type: ApplicationFiled: September 10, 2024Publication date: December 26, 2024Applicant: STMicroelectronics S.r.l.Inventors: Agatino MINOTTI, Francesco SALAMONE, Massimiliano FIORITO, Alessio SCORDIA, Manuel PONTURO
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Publication number: 20240425359Abstract: A MEMS device is formed by a body of semiconductor material which defines a support structure. A pass-through cavity in the body is surrounded by the support structure. A movable structure is suspended in the pass-through cavity. An elastic structure extends in the pass-through cavity between the support structure and the movable structure. The elastic structure has a first and second portions and is subject, in use, to mechanical stress. The MEMS device is further formed by a metal region, which extends on the first portion of the elastic structure, and by a buried cavity in the elastic structure. The buried cavity extends between the first and the second portions of the elastic structure and communicates laterally with the pass-through cavity.Type: ApplicationFiled: September 9, 2024Publication date: December 26, 2024Applicant: STMicroelectronics S.r.l.Inventors: Nicolo' BONI, Lorenzo VINCIGUERRA, Roberto CARMINATI, Massimiliano MERLI
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Patent number: 12176872Abstract: A current sensor architecture is implemented using a trans-resistance amplifier circuit having a low pass filter characteristic. The current sensing resistor and the input resistors for the amplifier circuit are matched thermally so that they have substantially identical temperature coefficients. The feedback resistors, which are coupled in parallel with corresponding capacitors, are implemented using switched capacitor circuits that emulate resistors. With this configuration, the current sensor is temperature insensitive.Type: GrantFiled: June 29, 2021Date of Patent: December 24, 2024Assignee: STMicroelectronics S.r.l.Inventor: Antonio Spina
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Patent number: 12174909Abstract: In an embodiment a method programming floating gate transistors belonging to non-volatile memory cells to multilevel threshold voltages respectively corresponding to the weight factors, performing a sensing operation of the programmed floating gate transistors with a control signal adapted to make the corresponding memory cells become conductive at an instant determined by a respective programmed threshold voltage, performing the convolutional computation by using the input values during an elapsed time for each memory cell to become conductive and outputting output values resulting from the convolutional computation.Type: GrantFiled: July 13, 2021Date of Patent: December 24, 2024Assignees: STMicroelectronics S.r.l., STMicroelectronics (Rousset) SASInventors: Francesco La Rosa, Antonino Conte
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Publication number: 20240413120Abstract: Disclosed herein is a method, including attaching a semiconductor chip to a chip mounting portion on at least one leadframe portion, and attaching a passive component on a passive component mounting portion of the at least one leadframe portion. The method further includes forming a laser direct structuring (LDS) activatable molding material over the semiconductor chip, passive component, and the at least one leadframe portion. Desired patterns of structured areas are formed within the LDS activatable molding material by activating the LDS activatable molding material. The desired patterns of structured areas are metallized to form conductive areas within the LDS activatable molding material to thereby form electrical connection between the semiconductor chip and the passive component. A passivation layer is formed on the LDS activatable molding material.Type: ApplicationFiled: August 19, 2024Publication date: December 12, 2024Applicant: STMicroelectronics S.r.l.Inventors: Giovanni GRAZIOSI, Michele DERAI
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Patent number: 12165037Abstract: An embodiment method comprises applying domain transformation processing to a time-series of signal samples, received from a sensor coupled to a dynamical system, to produce a dataset of transformed signal samples therefrom, buffering the transformed signal samples, obtaining a data buffer having transformed signal samples as entries, computing statistical parameters of the data buffer, producing a drift signal indicative of the evolution of the dynamical system as a function of the computed statistical parameters, selecting transformed signal samples buffered in the data buffer as a function of the drift signal, applying normalization processing to the buffered transformed signal samples, applying auto-encoder artificial neural network processing to a dataset of resealed signal samples, and producing a dataset of reconstructed signal samples and calculating an error of reconstruction.Type: GrantFiled: August 2, 2021Date of Patent: December 10, 2024Assignee: STMicroelectronics S.R.L.Inventor: Angelo Bosco
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Patent number: 12165871Abstract: A method for manufacturing a HEMT device includes forming, on a heterostructure, a dielectric layer, forming a through opening through the dielectric layer, and forming a gate electrode in the through opening. Forming the gate electrode includes forming a sacrificial structure, depositing by evaporation a first gate metal layer layer, carrying out a lift-off of the sacrificial structure, depositing a second gate metal layer by sputtering, and depositing a third gate metal layer. The second gate metal layer layer forms a barrier against the diffusion of metal atoms towards the heterostructure.Type: GrantFiled: October 28, 2020Date of Patent: December 10, 2024Assignee: STMicroelectronics S.r.l.Inventors: Ferdinando Iucolano, Cristina Tringali
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Patent number: 12164000Abstract: Disclosed herein is a single integrated circuit chip including main logic that operates a vehicle component such as a valve driver. Isolated from the main logic within the chip is a safety area that operates to verify proper operation of the main logic. A checker circuit within the chip outside of the safety area serves to verify proper operation of the checker circuit. The checker circuit receives signals from the safety circuit and uses combinatorial logic circuit to verify from those signals that the check circuit is operating properly.Type: GrantFiled: August 30, 2021Date of Patent: December 10, 2024Assignee: STMicroelectronics S.r.l.Inventors: Alessandro Cannone, Enrico Ferrara, Nicola Errico, Gea Donzelli
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Patent number: 12164103Abstract: Disclosed herein is an optical module including a substrate, with an optical detector, laser emitter, and support structure being carried by the substrate. An optical layer includes a fixed portion carried by the support structure, a movable portion affixed between opposite sides of the fixed portion by a spring structure, and a lens system carried by the movable portion. The movable portion has at least one opening defined therein across which the lens system extends, with at least one supporting portion extending across the at least one opening to support the lens system. The optical layer further includes a MEMS actuator for in-plane movement of the movable portion with respect to the fixed portion.Type: GrantFiled: November 23, 2021Date of Patent: December 10, 2024Assignees: STMicroelectronics (Research &Develoment) Limited, STMicroelectronics S.r.l.Inventors: Christopher Townsend, Roberto Carminati
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Patent number: 12165880Abstract: A semiconductor chip is mounted at a first surface of a leadframe and an insulating encapsulation is formed onto the leadframe. An etching mask is applied to a second surface of the leadframe to cover locations of two adjacent rows of electrical contacts as well as a connecting bar between the two adjacent rows which electrically couples the electrical contacts. The second surface is then etched through the etching mask to remove leadframe material at the second surface and define the electrical contacts and connecting bar. The electrical contacts include a distal surface as well as flanks left uncovered by the insulating encapsulation. The etching mask is then removed and the electrical contacts and the connecting bars are used as electrodes in an electroplating of the distal surface and the flanks of the electrical contacts. The connecting bar is then removed from between the two adjacent rows during device singulation.Type: GrantFiled: December 14, 2021Date of Patent: December 10, 2024Assignee: STMicroelectronics S.r.l.Inventors: Fulvio Vittorio Fontana, Michele Derai
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Patent number: 12163997Abstract: A system for testing is provided. The system includes an electronic circuit and an automatic testing equipment (ATE). The electronic circuit includes a voltage monitor including a resistive divider receiving at its voltage input an input voltage and coupled at its output to an input of a comparator. A reference input of the comparator is coupled to a generator supplying a reference voltage setting one or more thresholds of the comparator. The electronic circuit includes a Built In Self Test Module coupled to the ATE and to the inputs and output of the comparator. The BIST module is being configured upon receiving respective commands from the ATE to test a reaction time of the comparator and an offset of the comparator. The ATE performs a respective test of the ratio of the resistor divider by a first voltage measurement and a test of the reference voltage provided by the generator.Type: GrantFiled: January 6, 2023Date of Patent: December 10, 2024Assignee: STMicroelectronics S.r.l.Inventors: Nicola De Campo, Matteo Venturelli, Matteo Brivio, Mauro Foppiani