Abstract: In an embodiment, a phase circuit includes: a bidirectional output stage configured to be coupled between a first battery and a second battery; a memory configured to store a number of active phases, and an identifier; and a synchronization circuit configured to receive a first clock signal and determine a start time of a switching cycle of the bidirectional output stage based on the number of active phases, the identifier, and the first clock signal, where the phase circuit is configured to control the timing of the switching of the bidirectional output stage based on the start time.

Abstract: In accordance with an embodiment, a method includes: producing a set of delayed replicas of a reference clock signal, wherein delayed replicas in the set of delayed replicas have respective signal edges delayed in time by a mutual time delay therebetween; producing a set of edge detecting signals comprising edge detecting signals indicative of respective distances of edges of delayed replicas in the set of delayed replicas from an edge of a clock signal having a clock period; selecting based on edge detecting signals in the set of edge detecting signals a delayed replica in the set of delayed replicas having a distance from the clock signal edge that is shorter than the distance from the clock signal edge of any other delayed replica in the set of delayed replicas.

Abstract: In accordance with an embodiment, a digital-to-analog converter (DAC) includes: a W-2W current mirror that includes a first plurality of MOS transistors having a first width, and second plurality of MOS transistors having a second width that is twice the first width, where ones of the second plurality of MOS transistors are coupled between drains of adjacent ones of the first plurality of MOS transistors; and a bulk bias generator having a plurality of output nodes coupled to corresponding bulk nodes of the first plurality of MOS transistors, wherein the plurality of output nodes are configured to provide voltages that are inversely proportional to temperature.

Abstract: A LED driver chip includes driver circuits, each being coupled to a different pin and including a fault-detection circuit. Each fault-detection circuit includes a force circuit forcing current to a force node, and a sense circuit including a current sensor coupled to the force node, and a comparator comparing a voltage at the force node to a reference voltage to generate a comparison output. Control circuitry, in a pin-to-pin short detection mode, activates the force circuit of a first of the driver circuits and activates thep sense circuit of a second of the driver circuits, in a pin-to-ground short detection mode, activates the force and the sense circuit of the same driver circuits. The comparison output of the comparator of the activated sense circuit, if is higher or if lower of the reference voltage, indicates if short between pin or to ground, respectively, is present.

Abstract: A blocking element is provided for connecting an electronic, micro-mechanical and/or micro-electro-mechanical component, in particular for controlling the propulsion of an electric vehicle. The pin blocking element is formed by a holed body having a first end, a second end and an axial cavity configured for fittingly accommodating a connecting pin. A first flange projects transversely from the holed body at the first end and a second flange projects transversely from the holed body at the second end. The first flange has a greater area than the second flange and is configured to be ultrasonically soldered to a conductive bearing plate to form a power module.

Abstract: A rectifier stage includes a differential input transistor pair coupled between a reference voltage node and an intermediate node, and a load circuit coupled between the intermediate node and a supply voltage node. The differential input transistor pair receives a radio-frequency amplitude modulated signal. A rectified signal indicative of an envelope of the radio-frequency amplitude modulated signal is produced at the intermediate node. An amplifier stage coupled to the intermediate node produces an amplified rectified signal at an output node that is indicative of the envelope of the radio-frequency amplitude modulated signal. The rectifier stage includes a resistive element coupled between the intermediate node and the supply voltage node in parallel to the load circuit.

Abstract: An isolated driver device comprises a first semiconductor die and a second semiconductor die galvanically isolated from each other. The second semiconductor die includes a signal modulator circuit configured to modulate a carrier signal to produce a modulated signal encoding information. A galvanically isolated communication channel implemented in the first semiconductor die and the second semiconductor die is configured to transmit the modulated signal from the second semiconductor die to the first semiconductor die.

Abstract: In embodiments, a method is provided that includes writing a static data image in an invariant part of a non-volatile memory of an integrated circuit used to store an operating system; writing a set of personalization data in the static data image representing data specific to the integrated circuit; storing a subset of the set of personalization data in a reserved area of the non-volatile memory by reserving the reserved area and storing commands for writing the set of personalization data by an application or the operating system; converting the commands with a known code to obtain an inner command script, the inner script including the commands as encoded; storing the inner command script in the reserved area of the non-volatile memory; decoding and executing the inner command script to obtain the commands during an activation of the integrated circuit; and executing the commands by the integrated circuit.

Abstract: An electronic device includes a solid body of SiC having a surface and having a first conductivity type. A first implanted region and a second implanted region have a second conductivity type and extend into the solid body in a direction starting from the surface and delimit between them a surface portion of the solid body. A Schottky contact is on the surface and in direct contact with the surface portion. Ohmic contacts are on the surface and in direct contact with the first and second implanted regions. The solid body includes an epitaxial layer including the surface portion and a bulk portion. The surface portion houses a plurality of doped sub-regions which extend in succession one after another in the direction, are of the first conductivity type, and have a respective conductivity level higher than that of the bulk portion.

Abstract: A MEMS device is formed by a body of semiconductor material which defines a support structure. A pass-through cavity in the body is surrounded by the support structure. A movable structure is suspended in the pass-through cavity. An elastic structure extends in the pass-through cavity between the support structure and the movable structure. The elastic structure has a first and second portions and is subject, in use, to mechanical stress. The MEMS device is further formed by a metal region, which extends on the first portion of the elastic structure, and by a buried cavity in the elastic structure. The buried cavity extends between the first and the second portions of the elastic structure.

Abstract: A system to monitor a MOSFET, the system including a switching arrangement configured to switchably isolate a gate terminal of the MOSFET and a source terminal of the MOSFET from a gate-control voltage source and a test circuit configured to detect a change in a gate-to-source voltage of the MOSFET over a test period, the test period occurring while the gate terminal and the source terminal are isolated.

Abstract: A voltage-controlled oscillator in a phase-locked loop circuit is calibrated via a dichotomous search in a set of candidate frequency bands via a sequence of subsequent halving steps that produce reduced subsets of the set of candidate frequency bands. The reduced subsets have respective upper bound values and lower bound values, as well as central values. The central value of the subset resulting from the halving step of index i in the sequence is a function of the average of the upper bound value and the lower bound value of the subset resulting from the halving step of index i?1 in the sequence.

Abstract: An embodiment method includes rectifying a back electromotive force of a spindle motor in a hard disk drive and energizing a voice coil motor in the hard disk drive using the rectified back electromotive force of the spindle motor via a voice coil motor power stage to retract a head of the hard disk drive to a park position. The head is retracted by moving the head towards the park position during a first retract phase and retaining the head in the park position during a second retract phase by applying a bias voltage to the voice coil motor power stage during a bias interval of the second retract phase. The method also includes producing a saturation signal indicative of onset of saturation in the voice coil motor power stage and controlling the bias voltage during the second retract phase.

Abstract: A method of making a MEMS device including forming a mirror stack on a handle layer, applying a first bonding layer to the mirror stack, and disposing a substrate on the first bonding layer. The handle layer is removed and a second bonding layer is applied. A cap layer is disposed on the second bonding layer. The mirror stack is formed by disposing a silicon layer on the handle layer, disposing a first insulating layer on the silicon layer, etching portions of the first insulating layer, and depositing a first conductive layer on the first insulating layer. The formation also includes depositing a second insulating layer on the first conductive layer, a portion of the second insulating layer to expose a portion of the first conductive layer exposed, and forming a conductive pad on the exposed portion of the first conductive layer.

Abstract: A Single Input Dual Output converter includes a first switch coupling an input to a first inductor terminal, a second switch coupling a second inductor terminal to ground, a third switch coupling the second inductor terminal to a positive output, and a fourth switch coupling the first inductor terminal to a negative output. During time-shared control, the negative and positive outputs are independently served by conversion cycles. Each conversion cycle includes: a positive phase with a positive charge phase (closing only the first and second switches), followed by an additional phase (closing only the first and third switches for a given time duration), and followed by a positive discharge phase (closing only the third and fourth switches). Each conversion cycle further includes a negative phase with a negative charge phase (closing only the first and second switches) followed by a negative discharge phase (closing only the second and fourth switches).

Abstract: An audio electronic system includes a DC switching converter comprising first and second Zeta converters, each comprising an input stage, an output stage, a first switching stage, and a second switching stage. The input stage of each Zeta converter comprises a respective input inductor having a first terminal electrically coupled to the respective first switching stage. The input inductors of the input stages of the first and second Zeta converters are magnetically coupled in such a way that when current enters the terminal of the input inductor of the first Zeta converter that is coupled to the first switch stage of the first Zeta converter, a voltage induced by the coupled current is positive at the terminal of the input inductor of the second Zeta converter that is coupled to the first switching stage of the second Zeta converter.

Abstract: A system, method, and device to test an electronic circuit are disclosed having a stage to supply a driving signal to a load comprising a pull-up switch and a pull-down switch and a pre-driver stage including pre-driver circuits. The electronic circuit including circuits for testing the pre-driver stage under the control of an automatic testing equipment (ATE) to operate a built-in self-test sequence including test commands for the pre-driver stage under the control of an external test signal issued by the ATE. The system includes a time measuring circuit to measure duration of signals at the output of the stage coupled to a pass-fail check circuit, and to evaluate if the duration of signals at the output of the stage to determine whether the output satisfies a pass criterion.

Abstract: According to an embodiment, a circuit includes a biasing and a low-frequency recovery circuit. The biasing circuit includes a voltage digital to analog converter (V-DAC), a differential difference amplifier coupled to the V-DAC, a common-mode feedback (CMFB) amplifier coupled to the differential difference amplifier, and a first pair of transistors arranged as a high-impedance structure and coupled to the differential difference amplifier and the CMFB amplifier. The low-frequency recovery circuit includes a current digital to analog converter (C-DAC), a second pair of transistors arranged as a high-impedance structure and coupled to the first pair of transistors, a pair of resistors having a resistance value equal to half a resistance of the resistive sensor, the pair of resistors arranged between the second pair of transistors and coupled to the C-DAC, and a gain circuit coupled to shared nodes between the second pair of transistors and the pair of resistors.

Abstract: An embodiment LED driver system comprises a power transistor configured to be selectively activated for generating a driving current for an array of LEDs, the power transistor having a first conduction terminal coupled to the array of LEDs and a second conduction terminal coupled to a reference resistor; an operational amplifier having a non-inverting input for receiving a reference voltage, an inverting input coupled to the second conduction terminal of the power transistor, and an output terminal coupled to a first conduction terminal of a transmission gate having a second conduction terminal coupled to a control terminal of the power transistor and a control terminal for receiving an enable signal; and a slew rate control unit configured to control the slew rate of the driving current.

Abstract: A method for concealing a subscription identifier at a user equipment including a mobile equipment and an integrated circuit card storing the subscription identifier, the method including receiving a corresponding request by a server to provide a corresponding subscription identifier, performing an elliptical curve encryption of the subscription identifier generating a concealed subscription identifier, the concealing operation including the mobile equipment sending an identity retrieve command to the card, performing, before receiving the identity retrieve command at the card, a pre-calculation of the ephemeral key pair including an ephemeral private key and ephemeral public key and the shared secret key, and in response to the respective state of completion indicating that completion of the computation of a valid ephemeral key pair or shared secret key, storing the corresponding values of the ephemeral key pair and shared secret key in a table in a memory of the card.