Abstract: An integrated circuit integrator includes a first transconductance amplifier having a gain adjustable based upon a first control signal, and receives, as an input, a signal to be filtered, and generates, as an output, a corresponding amplified signal. The first transconductance amplifier includes an R-C output circuit to filter components from the amplified signal, and an output resistance being adjustable based upon a second control signal. A second transconductance amplifier is matched with the first transconductance amplifier, and has a gain adjustable based upon the first control signal, and a matched output resistance adjustable based upon the second control signal. A circuit is configured to force a reference current through the matched output resistance. An error correction circuit is coupled to the second transconductance amplifier and is configured to generate the second control signal so as to keep constant a voltage on an output of the second transconductance amplifier.
Abstract: A channel equalizer having a filter arranged to filter an input signal, the filter including a plurality of taps, each tap generating an output signal based on a coefficient, an input for receiving the coefficients and an output for outputting a filtered signal; and coefficient generating circuitry including a graduation unit arranged to receive the input signal and an error signal indicating an error in the filtered signal, to accumulate gradient values relating to each of the coefficients based on a plurality of error values of the error signal, each of the gradient values indicating a required change in one of the coefficients, and to sequentially output the gradient values; and coefficient update unit arranged to sequentially update each of the filter coefficients in turn, based on the gradient values.
Abstract: A method and system by which base stations in a Wireless Regional Area Network (WRAN), and more generally transceivers in a cognitive radio (CR) system, can communicate to fairly share transmission and reception of scheduled use (“occupancy”) of frames on a single channel within a frame-based, on demand spectrum contention system. The method and system disclose how a base station can acquire the scheduled use of a share of the frames available in subsequent superframes of the CR system. The method and system assure fair and efficient access to the transmission channel by using a random number based contention process.
Abstract: Perceptual audio coder refers to audio compression schemes that exploit the properties of human auditory perception. The coder allocates the quantization noise below the masking threshold such that even with the bit rate limitation, the noise is imperceptible to the ear. These distortion and bit rate requirement makes the bit allocation-quantization process a considerable computational effort. One method includes incrementally adjusting a global gain according to a gradient. The gradient could be adjusted each time the number of bits used to represent a quantized value is counted. Another method includes limiting a rate controlling parameter to a predetermined number of loops. The method could also include deriving a global gain to ensure exit from the loop. Accordingly, embodiments of the present disclosure provide a fast and efficient method to derive the rate controlling parameter and can be applied to generic perceptual audio encoders where low computational complexity is required.
Type:
Grant
Filed:
August 3, 2007
Date of Patent:
February 12, 2013
Assignee:
STMicroelectronics Asia Pacific Pte, Ltd.
Inventors:
Evelyn Kurniawati, Kim Hann Kuah, Sapna George
Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.
Abstract: A microelectromechanical gyroscope having a supporting structure; a mass capacitively coupled to the supporting structure and movable with a first degree of freedom and a second degree of freedom, in response to rotations of the supporting structure about an axis; driving components, for keeping the mass in oscillation according to the first degree of freedom; a read interface for detecting transduction signals indicating the capacitive coupling between the mass and the supporting structure; and capacitive compensation modules for modifying the capacitive coupling between the mass and the supporting structure. Calibration components detect systematic errors from the transduction signals and modify the capacitive compensation modules as a function of the transduction signals so as to attenuate the systematic errors.
Abstract: Solar thin film modules are provided with reduced lateral dimensions of isolation trenches and contact trenches, which provide for a series connection of the individual solar cells. To this end lithography and etch techniques are applied to pattern the individual material layers, thereby reducing parasitic shunt leakages compared to conventional laser scribing techniques. In particular, there may be series connected solar cells formed on a flexible substrate material that are highly efficient in indoor applications.
Abstract: The present disclosure relates to a method of image preview in an image pickup apparatus. One embodiment is directed to a method that includes acquiring from an image sensor an image of a scene observed by an image sensor of the apparatus, generating a preview image obtained by applying to the acquired image a resolution reduction process to adapt it to the resolution of a display screen of a viewfinder of the image pickup apparatus, displaying the preview image on the display screen, generating an image of an area of the scene by extracting an area from the acquired image, and displaying the area image superimposed on the preview image or alternately with the preview image, the area image displayed having a resolution higher than that of the preview image and inferior or equal to that of the acquired image.
Abstract: An electronic system comprises a resistive sensor structure and an electronic circuit portion whose design is selected such that different resistive sensor structures may be combined within the same electronic circuit. To this end, the resistive sensor structure is used as a voltage/current converter that provides input currents to a current amplifier, which in turn provides an amplified output voltage on the basis of a difference of the input currents. The operating range of the current amplifier is adjusted on the basis of a programmable current source irrespective of the configuration of the resistive sensor structure.
Abstract: A microelectromechanical sensor includes a supporting structure and a sensing mass, which is elastically coupled to the supporting structure, is movable with respect thereto with one degree of freedom in response to movements according to an axis and is coupled to the supporting structure through a capacitive coupling. A sensing device senses, on terminals of the capacitive coupling, transduction signals indicative of displacements of the first sensing mass according to the degree of freedom. The sensing device includes at least one first reading chain, having first operative parameters, one second reading chain, having second operative parameters different from the first operative parameters, and one selective electrical connection structure that couples the first reading chain and the second reading chain to the first terminals.
Abstract: A system having an input and output buffer includes a dynamic driver reference generator to generate dynamic driver reference signals based on a data signal and an IO buffer supply voltage, a level shifter to generate level shifted signals based, in part, on the dynamic driver reference signals, and a driver having at least one stress transistor. The driver dynamically adjusts a voltage across the stress transistor based on at least one of dynamic driver reference signals, the level shifted signals, and a current state of an IO pad.
Abstract: Methods and systems are described for displaying enabling the transmission, formatting, and display of multimedia data after a hot plug event during a start-up dead period. In particular, approaches for transmission, formatting, and display of multimedia data in the absence or non-operation of a hot plug detect system or signal, so that multimedia information can be displayed in a proper format even during the dead period when no hot plug detect signal is received.
Abstract: An analog finite impulse response (AFIR) filter including at least one variable transconductance block having an input for receiving an input voltage and being adapted to sequentially apply each of a plurality of transconductance levels to the input voltage during at least one of a plurality of successive time periods to generate an output current at an output of the variable transconductance block, the at least one variable transconductance block including a plurality of fixed transconductance blocks each receiving the input voltage and capable of being independently activated to supply the output current; and a capacitor coupled to the output of the variable transconductance block to receive the output current and provide an output voltage of the filter.
Type:
Grant
Filed:
January 20, 2010
Date of Patent:
February 5, 2013
Assignee:
STMicroelectronics S.A.
Inventors:
Eoin Ohannaidh, Stéphane Le Tual, Loïc Joet
Abstract: An integrated circuit includes a bandgap reference generator and a voltage regulator. The bandgap reference generator includes a first current path, and a first bipolar transistor with an emitter-collector path in the first current path. The voltage regulator includes a second current path, wherein the second current path mirrors the first current path; a resistor configured to receive a current of the second current path; a second bipolar transistor with a base and a collector of the second bipolar transistor being interconnected; and a third bipolar transistor connected in series with the second bipolar transistor and the resistor. A base and a collector of the third bipolar transistor are interconnected.
Abstract: A system for recovering an architecture register mapping table (ARMT). The system includes a first number of collection circuits and decode circuits, a second number of selection circuits, and an enable circuit. Information related to the mapping between each physical register and an appropriate architecture register is obtained from a physical register mapping table (PRMT) by one and only one collection circuit during only one of a fourth number of instruction cycles. Each decode circuit has its input coupled to the output of one different collection circuit and is capable of converting its input into a third number bit wide binary string selection code at its output. Each selection circuit is configured to receive from each selection code a bit from a bit position associated with that selection circuit. The enable circuit is configured to appropriately enable mapping of information from the PRMT to the ARMT.
Abstract: PSF coding has become well known in recent years. Although it enables significant increases in the depth of field, defocus introduces artifacts in images that are a major detraction from the final image quality. A method is described that enables the deduction or defocus and consequently the removal of these artifacts. The principle of the disclosed techniques involves iteratively adjusting the restoration algorithm according to a chosen image or artifact metric and choosing the defocus parameter that yields the image the lowest level of artifact.
Abstract: A reliable and deterministic video communication protocol is provided. In one aspect, a method of transmitting data, audio or video frames in a basic service set having a plurality of stations in a wireless local area network transmits a transmit opportunity information element to reserve a transmit opportunity time interval. The method further transmits the data, audio or video frames to a number of the stations in the basic service set during the reserved transmit opportunity time interval. In another aspect, a method of transmitting data, audio or video frames in a basic service set having a plurality of stations in a wireless local area network first transmits protection frames to reserve a time interval, then transmits frames during the reserved time interval or during a non-reserved time interval.
Abstract: An image capture unit and its manufacturing method. The image capture unit includes a thinned-down integrated circuit chip having an image sensor on its upper surface side. A wall extends above a peripheral upper surface ring-shaped area, and a lens rests on the high portion of the wall.
Abstract: A method and a circuit for scrambling an RSA-CRT algorithm calculation by an electronic circuit, in which a result is obtained from two modular exponentiation calculations, each providing a partial result, and from a recombination step, and in which a first step adds a digital quantity to at least one first partial result before said recombination step; and a second step cancels the effects of this quantity after the recombination step.
Abstract: The invention relates to a method of bit allocation in a scene change situation during encoding a video sequence. Following a scene change, the picture complexity of the current picture is adjusted so that the bit allocation for the next picture is more accurately estimated.
Type:
Grant
Filed:
October 6, 2000
Date of Patent:
February 5, 2013
Assignee:
STMicroelectronics Asia Pacific PTE Ltd.