Abstract: An integrated imaging device includes a silicon layer provided over a dielectric multilayer. The dielectric multilayer includes a top silicon-dioxide layer, an intermediate silicon-nitride layer and a bottom silicon-dioxide layer. Imaging circuitry is formed at a frontside of the silicon layer. An isolating structure surrounds the imaging circuitry and extends from the frontside through the silicon layer and top silicon-dioxide layer into and terminating within the intermediate silicon-nitride layer. A filter for the imaging circuitry is mounted to a backside of the bottom silicon-dioxide layer. The isolating structure is formed by a trench filled with a dielectric material.

Abstract: The input terminals of an energy-scavenging interface are connectable to a transducer including a storage element, and output terminals of the interface are connectable to an electrical load. The interface includes a first switch that is closed to pass current and store electrical energy in the storage element for a first time interval. The first time interval is based on at least one of a first delay proportional to a time constant of the transducer and sensed current flowing through the first switch reaching a first threshold. The first switch is thereafter opened so to permit the stored electrical energy to be delivered through a first current-conduction element for a second time interval. The second time interval is based on sensed current flowing through the first current-conduction element reaching a second threshold. The first current-conduction element may comprise a second switch actuate out of phase with the first switch.

Abstract: A method of programming memory cells in a nonvolatile memory, includes applying a programming voltage to a first bitline and setting a second bitline in a floating state. The method further includes applying a compensation voltage to a shield conductive line coupled to the bitline set in the floating state, and setting in the floating state a shield conductive line coupled to the bitline receiving the programming voltage. The method is applicable to the reduction of the parasitic programming phenomena of memory cells by capacitive coupling between bitlines.

Abstract: The operation of a FIFO buffer memory includes writing the data at input to the memory in a single write location, and making the single write location available for writing an input datum with a shift of the datum written in the single write location to another location of the memory. At each operation of writing of an input datum in the single write location, there is scheduled shifting of the datum written therein to another location, without waiting for a new write request, thus eliminating the combinational constraint between the two operations.

Abstract: An integrated circuit includes a silicon-on-insulator wafer and interconnect layer providing a support for a coplanar waveguide formed above a top side of the support. A through-silicon via is formed from a back side of the support and passing through the silicon-on-insulator wafer to reach the interconnect layer. A trench is formed from the back side of the support underneath the coplanar waveguide. The trench extends over at least an entire length of the coplanar waveguide. The trench passes through the silicon-on-insulator wafer to reach the interconnect layer and may have a substantially same depth as the through-silicon via.

Abstract: A method for controlling a pixel may include first and second photosites, each having a photodiode and a charge-transfer transistor, a read node, and an electronic read element, all of which are common to all the photosites. The method may include an accumulation of photogenerated charges in the photodiode of the first photosite during a first period, an accumulation of photogenerated charges in the photodiode of the second photosite during a second period shorter than the first period, a selection of the signal corresponding to the quantity of charges accumulated in the photodiode of a photosite having the highest unsaturated intensity or else a saturation signal, and a digitization of the selected signal.

Abstract: The present invention concerns an audio amplifier circuit designed to provide an output signal to an audio transducer, said audio amplifier circuit comprising an audio power amplifier designed to receive an audio signal and designed to generate said output signal, a sensor designed to detect an audible sound having at least one noise component, to generate a detected signal. The audio amplifier circuit also includes a processing block configured to receive said detected signal at its input and to generate an off signal at its output, the latter being located at the input of said audio power amplifier. The processing block processes the detected signal according to said input signal to identify said noise component of said detected signal to generate a reference signal. The processing block generates the off signal when the value of said input signal is lower than the value of said reference signal.

Abstract: An energy scavenging interface has an input port receiving an electrical signal from a storage element of a transducer, and an output port supplying an output signal to an electrical load. The interface includes a first switch receiving the input signal; a second switch that supplying the output signal; and control logic configured to close the first switch and open the second switch for a first time interval having at least a first temporal duration and until current through the first switch reaches a threshold. A scaled copy of a peak value of current through the first switch is obtained during the first time interval. The control logic is further operable to open the first switch and close the second switch to supply current to the electrical load as long as the current of the output signal remains greater than the value of said scaled copy of the peak value.

Abstract: A data interleaving device is provided that includes an input, an output, and a data interleaver coupled to the input and the output. The input receives data originating from a plurality of processing blocks. The output transfers interleaved data to the plurality of processing blocks. The data interleaver includes a controller, at least one interconnection module, and a plurality of memories. The controller prepares a data-to-memory assignment data structure. The at least one interconnection module switches data in parallel according to the data-to-memory assignment data structure and acts identically on all data switched simultaneously in parallel. The plurality of memories store the switched data. The data interleaver interleaves data received from the input and provides the interleaved data at the output.

Abstract: In a method for producing a control signal for regulating a drive current for driving an LED, a current through the LED is sensed, wherein the LED is driven by a power converter output, and wherein an output voltage of the power converter is proportionately controlled by a control signal. Next, a power supply voltage is sensed. The control signal is produced for the power converter, wherein the control signal is proportional to a difference between a reference voltage and the current through the LED. The control signal is then offset in response to the power supply voltage to reduce the current through the LED as the power supply voltage drops.

Abstract: The present disclosure relates to a method for locating the iris in an image of an eye, comprising steps of locating the pupil in the image, of detecting positions of intensity steps of pixels located on a line passing through the pupil and transition zones between the iris and the cornea, on either side of the pupil, and of determining the center and the radius of a circle passing through the detected positions of the transitions.

Abstract: Method for transmitting information in a multi-band OFDM system, comprising delivering according to a given communication standard an initial data stream (IDS), splitting (11) said initial data stream into a chosen number of elementary data streams and simultaneously transmitting (12) said elementary data streams according to said communication standard on said communication medium (MD) within different respective sub-bands (SBi). These sub-bands all blong to the same band group. Proposal based on the MBOA standard.

Abstract: A method that includes forming a first level of active circuitry on a substrate, forming a first probe pad electrically connected to the first level of active circuitry where the first probe pad having a first surface, contacting the first probe pad with a probe tip that displaces a portion of the first probe pad above the first surface, and performing a chemical mechanical polish on the first probe pad to planarize the portion of the first probe pad above the first surface. The method also includes forming a second level of active circuitry overlying the first probe pad, forming a second probe pad electrically connected to the second level of active circuitry, contacting the second probe pad with a probe tip that displaces a portion of the probe pad, and chemically mechanically polishing the second probe pad to remove the portion displaced.

Abstract: A method of estimating a global motion vector representative of the motion of a first digital image with respect to a second digital image, the first and the second image forming part of a sequence of images and being made up of, respectively, a first and a second pixel matrix. The method estimates the global motion vector on the basis of the estimate of at least one motion vector of at least one region of the first image representative of the motion of the at least one region from the first image to the second image and comprising phases of: subdividing the at least one region of the first image into a plurality of pixel blocks, assigning to each block of the plurality a respective weighting coefficient calculated on the basis of a respective inhomogeneity measure, and estimating the at least one motion vector of said at least one region on the basis of the weighting coefficients assigned to each block of the at least one region.

Abstract: A method manufactures an electronic device comprising a MEMS device overmolded in a protective casing. The MEMS device includes an active surface wherein a portion of the MEMS device is integrated, and is sensitive, through a membrane, to chemical/physical variations of a fluid. Prior to the molding step, at least one resin layer is formed on at least one region overlying the active surface in correspondence with the membrane. After, at least one portion of at least one resin layer is removed from at least one region, so that in the region an opening is formed, through which the MEMS device is activated from the outside of the protective casing.

Abstract: A coexistence communications method for use between wireless networks includes adopting a super-frame structure for use in a wireless network having a plurality of frames, wherein a first frame includes a super-frame preamble, a super-frame control header, a data portion, and a regular self-coexistence window, an intermediate frame includes an OFDM symbol, a data portion, and a regular self-coexistence window, and a last frame includes an OFDM symbol, a data portion, and a joining self-coexistence window, using the self-coexistence windows to exchange inter-wireless network co-existence messages, and using a last reserved self-coexistence window to announce intra-wireless network negotiation decisions.

Abstract: Embodiments of the present invention relate to a system for clock synthesis or data timing recovery. No analog continuous time oscillator is required, all the building blocks of a Frequency Locked Loop/Phase Locked Loop belonging in the digital discrete time domain. From a system-level perspective, the system is characterized by its strong non-linear behavior due to the intrinsic nature of some building blocks. This inherent non-linearity is responsible for some unusual, attractive property of the complete system. The system is able to multiply the input frequency clock by an arbitrarily large factor, ensuring in any case the convergence of the algorithm in two reference clock cycles.

Abstract: A micro scale includes one substrate forming a first zone constituting a first terminal, one conducting vibrating beam which has two opposite ends affixed on two supporting areas on the substrate, the conductive beam forming a second terminal; wherein the conductive beam is made of polymer gel having metallic microparticles in low quantity so as to avoid any contamination of a biological material to measure, the density of the metallic microparticles being high enough to achieve electrical conduction of the second terminal. A manufacturing process of such a micro scale circuit is also provided.

Abstract: A processing system, such as typically a CPU, is used for converting a digital signal organized in pixels, such as a video signal, between a first format and a second multiple-description format. The system comprises at least one input register and at least one output register, and is configured via instructions, that can be constituted at least in part by instructions of a SIMD type, so as to: order the pixels of the signal to be converted in a set of input registers; and take selectively the pixels from the aforesaid set of input registers and place them in an orderly way in at least one output register.

Abstract: A method for communications between neighboring wireless cells such as wireless regional area networks operating according to IEEE 802.22 specifications. The method involves scheduling inter-base station communications for over-the-air connections to allow neighboring base stations to communicate in environments where a single available channel is shared between the neighboring cells or where two or more channels used by two or more neighboring cells. In some embodiments, a bridge system, such as a bridge consumer premise equipment (CPE), positioned in an area of coverage overlap between two cells is used for inter-base station communications, and allocation and scheduling of bandwidth on the utilized channels is performed to provide interference free communications between the base stations. Existence announcements are provided in coexistence time slots and requests for bandwidth such as reserved and additional time slots are transmitted between the base stations using the coexistence time slots.