Patents Assigned to STMicroelectronics (Grenoble 2) SAS
  • Publication number: 20190287874
    Abstract: An electronic device includes a carrier wafer having a front side and a back side, with an electrical connection network configured to connect the front side to the back side. An electronic chip is mounted on the front side of the carrier wafer and electrically connected to front pads of the electrical connection network. A sheet of a thermally conductive graphite or a pyrolytic graphite is added to the back side of the carrier wafer. The sheet includes apertures which leave back pads of the electrical connection network uncovered.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 19, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Didier CAMPOS
  • Patent number: 10419432
    Abstract: An apparatus has a data store configured to store access activity information. The access activity information indicates which one or more of a plurality of different access parameter sets is active. The data store is also configured to store access defining information, which defines, at least for each active access parameter set, a number of channels, location information of said channels, and interleaving information associated with said channels.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: September 17, 2019
    Assignees: STMicroelectronics SA, STMicroelectronics (Grenoble2) SAS, STMicroelectronics S.R.L.
    Inventors: Michael Soulie, Riccardo Locatelli, Valerio Catalano, Hajer Ferjani, Giuseppe Maruccia, Raffaele Guarrasi, Giuseppe Guarnaccia
  • Publication number: 20190280130
    Abstract: Encapsulating cover for an electronic package is formed by a cover body having a front wall and, positioned around a through-passage, a mounting face that includes a bearing surface. A mounting face of an optical element bears against the bearing surface. The mounting face includes at least one local void that is set back with respect to the bearing surface to provide a space between the mounting face of the optical element and the bottom of the local void. The local void extends beyond an edge of the optical element. A drop of fastening adhesive extends locally into said local void and has a portion that is covered by the optical element and an uncovered portion that is located beyond the edge of the optical element.
    Type: Application
    Filed: March 7, 2019
    Publication date: September 12, 2019
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Research & Development) Limited
    Inventors: Karine SAXOD, Nicolas MASTROMAURO, Colin CAMPBELL
  • Publication number: 20190267922
    Abstract: Control over the operation of an electrically-controlled motor is supported by an interface circuit between the electrically-controlled motor and a near-field radio frequency communication controller. The interface circuit includes a first circuit that receives at least one control set point through a near-field radio frequency communication issued by the near-field radio frequency communication controller. A second circuit of the interface generates one or more electric signals in pulse width modulation based on the control set point.
    Type: Application
    Filed: February 21, 2019
    Publication date: August 29, 2019
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Rousset) SAS
    Inventors: Gwenael MAILLET, Jean-Louis LABYRE, Gilles BAS
  • Publication number: 20190267349
    Abstract: Individual electronic units are formed by cutting a collective assembly. A collective support plate is provided which includes electronic chips. A collective cover plate is provided which includes ribs defining recesses. The collective assembly is formed by mounting the collective cover plate to the collective support plate in a manner where the electronic chips are located in the recesses and the ribs are located between electronic chips. A bead of glue is interposed between ends of the ribs and the surface of the collective support plate. After the glue is hardened, a cutting operation is performed on the collective assembly by cutting through the ribs and the collective support plate to produce the individual electronic units.
    Type: Application
    Filed: February 22, 2019
    Publication date: August 29, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Marie-Astrid PIN, Karine SAXOD, Jean-Michel RIVIERE
  • Patent number: 10396792
    Abstract: An analog multiplexer includes inputs and one output. A switching circuit is coupled between each input and the output. Each switching circuit includes an NMOS switching module, having an on state and an off state, and a control module supplied by a first supply voltage and operating to reduce leakage currents of the NMOS switching module when in the off state. The control module further operates to make the first NMOS switching module bidirectional irrespective of voltages present at the input and at the output.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: August 27, 2019
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Thierry Masson, Pawel Fiedorow
  • Patent number: 10386414
    Abstract: A device may include a control circuit configured to place, after a normal mode operation of N flip-flops, the N flip-flops in a test mode in which the test input of the first flip-flop of the chain is intended to receive a first sequence of test bits A memory may be configured to store a sequence of N values delivered by the test output of the last flip-flop of the chain. The control circuit may be configured to deliver, at the test input of the first flip-flop of the chain, the sequence of N stored values to restore the state of the N flip-flops before their placement in the test mode.
    Type: Grant
    Filed: May 28, 2015
    Date of Patent: August 20, 2019
    Assignees: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Jean-Marc Daveau, Philippe Roche, Didier Fuin
  • Patent number: 10390019
    Abstract: A method of encoding an initial digital signal in an encoded signal, where the initial digital signal includes a sequence of samples representing a multidimensional space, and each sample may be assigned at least one physical magnitude. The method may include, for at least some of the current samples, locally encoding the signal in encoded local digital signals, with the encodings being performed in local reference frames each including the current sample considered and two reference samples. The reference samples may be chosen based upon a minimum gradient of the at least one physical magnitude, from among the available samples of the sequence, and the encoded signal may include the encoded local digital signals.
    Type: Grant
    Filed: July 29, 2016
    Date of Patent: August 20, 2019
    Assignee: STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Mariano Bona, Fritz Lebowsky
  • Patent number: 10388686
    Abstract: A image sensor includes a semiconductor substrate with a photosensitive region. Metallization layers are stacked over the semiconductor substrate. Each metallization layer includes an etch stop layer and a dielectric layer on the etch stop layer. At least one metallization layer includes one or more microlenses positioned over the photosensitive region. The one or more microlenses are integrally formed by the etch stop layer.
    Type: Grant
    Filed: November 21, 2016
    Date of Patent: August 20, 2019
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventor: Flavien Hirigoyen
  • Publication number: 20190252212
    Abstract: A method for manufacturing a cover for an electronic package includes placing an insert having opposite faces between opposite faces of a cavity of a mold. A coating material is injected in the mold cavity around the insert. The coating material is then set to form a substrate that is overmolded around the insert and produce the cover.
    Type: Application
    Filed: April 25, 2019
    Publication date: August 15, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Benoit BESANCON, Alexandre MAS, Karine SAXOD
  • Patent number: 10379619
    Abstract: A method for controlling an apparatus, includes steps of: determining distance measurements of an object in a first direction, using distance sensors defining between them a second direction different from the first direction, assessing a first inclination of the object in relation to a second direction based on the distance measurements, and determining a first command of the apparatus according to the inclination assessment.
    Type: Grant
    Filed: November 25, 2014
    Date of Patent: August 13, 2019
    Assignees: STMicroelectronics SA, STMicroelectronics (Grenoble 2) SAS
    Inventors: Marc Drader, Jérémie Teyssier, Olivier Pothier
  • Publication number: 20190238779
    Abstract: A method is disclosed for operating an imaging device having a matrix of pixels arranged in rows and columns. A polarization voltage is generated on a gate of a main MOS transistor that is connected as diode. The main MOS transistor is coupled between a power supply voltage and a ground circuit. Prior to reading the pixels of a row of the matrix, a plurality of first capacitors are charged with the polarization voltage. The first capacitors are coupled between the gate of the main transistor and a ground node. Upon reading the pixels of the row, the first capacitors are discharged on respective gates of auxiliary transistors coupled between the columns and the ground node so as to switch on the auxiliary transistors and deliver a substantially identical polarization current to each column.
    Type: Application
    Filed: October 19, 2018
    Publication date: August 1, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: Nicolas Moeneclaey
  • Patent number: 10359800
    Abstract: An integrated circuit includes a first stage configured to receive a bias current. A current regulation loop includes a transimpedance amplifier having a first transistor, and a second transistor having a gate coupled to a gate of the first transistor. The first transistor and the second transistor are configured to compare the bias current with a reference current, and to generate a regulation voltage on an output node of the transimpedance amplifier. A capacitor is coupled between the output node of the transimpedance amplifier and the gates of the first and second transistors.
    Type: Grant
    Filed: August 31, 2017
    Date of Patent: July 23, 2019
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: Serge Ramet, Sandrine Nicolas, Danika Perrin, Cedric Rechatin
  • Patent number: 10353384
    Abstract: A radio-frequency identification (RFID) device includes an RFID block configured to support RFID communication; a memory having a storage area configured to store a list of pulse width modulation (PWM) parameters; a PWM circuit configured to generate a PWM signal based on a PWM parameter received by the PWM circuit; and a configuration and control (CC) circuit coupled to the RFID block, the memory, and the PWM circuit, where the RFID block, the PWM circuit, the CC circuit, and the memory form part of an RFID tag, where the CC circuit is configured to, in an automatic playback mode: sequentially read the list of PWM parameters from a beginning of the list of PWM parameters; and sequentially send the list of PWM parameters to the PWM circuit.
    Type: Grant
    Filed: July 3, 2018
    Date of Patent: July 16, 2019
    Assignees: STMICROELECTRONICS, INC., STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: John Tran, Gwenael Maillet
  • Publication number: 20190214274
    Abstract: An insulating spacer provides electrical connection between first contacts of a package for an electronic chip and second contacts of a connector board. The insulating spacer includes conductive vias having rectilinear axes parallel to one another which extend between the first and second contacts. The package for an electronic chip is mounted to one side of the insulating spacer and the connector board is mounted to an opposite side of the insulating spacer.
    Type: Application
    Filed: January 4, 2019
    Publication date: July 11, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventor: David AUCHERE
  • Patent number: 10346322
    Abstract: An electronic system implements a software application described in the form of a graph of the Kahn network type, and includes actors. At least one of the actors includes a processor, and at least another one of the actors includes a hardware accelerator. Buffer memories are coupled between the actors. A central processor is configured to enable communications between the actors according to a communications and synchronization protocol. The processor and the hardware accelerator are configured to use different individual communications protocols.
    Type: Grant
    Filed: November 18, 2016
    Date of Patent: July 9, 2019
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Arthur Stoutchinin, Didier Fuin, Mario Toma
  • Patent number: 10325784
    Abstract: A method for manufacturing a cover for an electronic package includes placing an insert having opposite faces between opposite faces of a cavity of a mold. A coating material is injected in the mold cavity around the insert. The coating material is then set to form a substrate that is overmolded around the insert and produce the cover.
    Type: Grant
    Filed: August 24, 2017
    Date of Patent: June 18, 2019
    Assignee: STMicroelectronics (Grenoble 2) SAS
    Inventors: Benoit Besancon, Alexandre Mas, Karine Saxod
  • Publication number: 20190179773
    Abstract: A method for writing a set of information for processing by a processing unit of an integrated circuit in an external memory outside the integrated circuit, includes: generating, within the integrated circuit, an encryption key; for each item of information intended to be written at an address of the external memory, first encrypting the address within the integrated circuit by a first encryption/decryption circuit using the encryption key to obtain an encrypted address; second encrypting the item of information within the integrated circuit using a second encryption/decryption circuit using the encrypted address to obtain an encrypted item of information; and writing the encrypted item of information at the address of the external memory, wherein the external memory is not able to be written twice at a same address during a write process
    Type: Application
    Filed: December 3, 2018
    Publication date: June 13, 2019
    Applicant: STMicroelectronics (Grenoble 2) SAS
    Inventors: Dragos Davidescu, Nicolas Anquet
  • Publication number: 20190172795
    Abstract: An integrated circuit includes a solder pad which includes, in a superposition of metallization levels, an underlying structure formed by a network of first regular metal tracks that are arranged for reinforcing the mechanical strength of the underlying structure and electrically connecting between an upper metallization level and a lower metallization level of the underlying structure. The underlying structure further includes a detection electrical path formed by second metal tracks passing between the first metal tracks in the metallization levels, the detection electrical path having an input terminal and an output terminal. Electrical sensing of the detection electrical path is made to supply a measurement which is indicative of the presence of cracks in the underlying structure.
    Type: Application
    Filed: December 5, 2018
    Publication date: June 6, 2019
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Grenoble 2) SAS
    Inventors: Eric SABOURET, Krysten ROCHEREAU, Olivier HINSINGER, Flore PERSIN-CRELEROT
  • Publication number: 20190173427
    Abstract: A quartz crystal resonator is coupled to an electronic circuit. A capacitive or resistive element is provided for adjusting a frequency of the quartz crystal resonator on activation or deactivation of a function of a circuit. Control is made according to a model of an expected variation of a temperature of the quartz crystal resonator.
    Type: Application
    Filed: December 3, 2018
    Publication date: June 6, 2019
    Applicants: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Alps) SAS
    Inventors: Benoit MARCHAND, Francois DRUILHE