Abstract: According to one aspect, a method adds an additional function to a computer program installed on a microcontroller, the computer program using a table configured to associate an identifier of the additional function with a pointer to a memory address. The method includes the microcontroller obtaining a compiled code of the additional function and an identifier of this additional function, the microcontroller recording the compiled code of the additional function in a section of a memory, and recording in memory a pointer in the table, the pointer being aimed at the address of the memory section in which the compiled code of the additional function is recorded, the pointer being associated in the table with the identifier of the additional function.

Abstract: A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

Abstract: A wireless device includes an energy harvester and an energy storage that operate in a sequence of energy harvesting cycles to alternately harvest energy and release energy for supplying the wireless device. The wireless device also includes a processing circuit and a wireless communication circuit. A configuration method for the wireless device includes first step where a base station receives a signal from the wireless device indicating wireless communication circuit entry into a receiving operation mode. In a second step, the base station transmits configuration data to the wireless device. The received configuration data is temporarily stored in a memory area of the wireless communication circuit. In a third step, the temporarily stored configuration data is transmitted from the wireless communication circuit to the processing circuit for storage in a memory area. The second and third steps are carried out during distinct energy harvesting cycles of the wireless device.

Abstract: The present description discloses a secure element and a communication method, configured to implement at least one first application, and including a circuit configured to record routing data and a list and parameters of communication protocols compatible with the first application, verify the compatibility of a first communication protocol used by first messages intended for the first application with the protocols of the list, convert the first messages into second messages by using a second communication protocol in response to the first protocol not being compatible with at least one of the protocols of the list, and direct the second messages to the first application by using the routing data of the first application.

Abstract: A substrate includes electrically-conductive tracks. A semiconductor chip is arranged on the substrate and electrically coupled to selected ones of the electrically-conductive tracks. Containment structures are provided at selected locations on the electrically-conductive tracks, where the containment structures have respective perimeter walls defining respective cavities. Each cavity is configured to accommodate a base portion of a pin holder. These pin holders are soldered to the electrically-conductive tracks within the cavities defined by the containment structures. Each containment structure may be formed by a ring of resist material configured to receive solder and maintain the pin holders in a desired alignment position.

Abstract: A method of authentication of a first device to a second device uses a signature of an analog signal of the first device. The signature corresponds to a time variation of at least one physical quantity associated with the analog signal during the implementation of at least one specific operation. The at least one specific operation may be an implementation of an electronic function or a program.

Abstract: A method for manufacturing a SiC-based electronic device, comprising the steps of: implanting, on a front side of a solid body made of SiC having a conductivity of an N type, dopant species of a P type thus forming an implanted region, which extends in the solid body starting from the front side and has a top surface coplanar with the front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region to temperatures comprised between 1500° C. and 2600° C. so as to form a carbon-rich electrical-contact region at the implanted region. The carbon-rich electrical-contact region forms an ohmic contact.

Abstract: The present disclosure is directed to embodiments of optical sensor packages. For example, at least one embodiment of an optical sensor package includes a light-emitting die, a light-receiving die, and an interconnect substrate within a first resin. A first transparent portion is positioned on the light-emitting die and the interconnect substrate, and a second transparent portion is positioned on the light-receiving die and the interconnect substrate. A second resin is on the first resin, the interconnect substrate, and the first and second transparent portions, respectively. The second resin partially covers respective surfaces of the first and second transparent portions, respectively, such that the respective surfaces are exposed from the second resin.

Abstract: The disclosure concerns a method including the steps of: a) providing a structure comprising a semiconductor substrate and, on the side of a first surface of the substrate, at least one first trench filled with an insulating material, vertically extending in the substrate; b) forming, by anisotropic etching from a second surface of the semiconductor substrate opposite to the first surface, at least one second trench vertically extending in the substrate and emerging onto the at least one first trench; and c) widening the at least one second trench by isotropic etching.

Abstract: A circuit includes a memory array with SRAM cells connected in rows by word lines and in columns by bit lines. A row controller circuit simultaneously actuates, through a word line driver circuit for each row, word lines in parallel for an in-memory compute operation. A column processing circuit processes analog voltages developed on the bit lines in response to the simultaneous actuation to generate a decision output for the in-memory compute operation. A bit line clamping circuit includes a sensing circuit that compares the analog voltages on a given pair of bit lines to a threshold voltage. A voltage clamp circuit is actuated in response to the comparison to preclude the analog voltages on the given pair of bit lines from decreasing below a clamping voltage level.

Abstract: A deep trench isolation structure is formed in a semiconductor material body by opening first and second trenches. The sidewalls and bottoms of the first and second trenches are then lined with an insulating material. A halogen-based polymer material is then deposited to cover at least an upper portion of the insulation material in the first trench without covering a portion insulation material at the bottom of the first trench and further cover the insulation material at the sidewalls and bottom of the second trench. An etch process is then used to remove the portion of the insulation material at the bottom of the first trench and the polymer material is removed from both the first trench and second trench. The trenches are then filled with polysilicon to form a substrate plug in the first trench and a field plate electrode in the second trench.

Abstract: The present disclosure is directed to a MEMS device having a first and a second actuator element, of piezoelectric type and a first and a second arm. The first and a second actuator element are configured to generate respective alternate, approximately linear, movements of an own end portion along a first and, respectively, a second direction, the second direction transverse to the first direction. The first arm has a first end rigid with the end portion of the first actuator element. The second arm extends transversally to the first arm and has a first end coupled rigid with the end portion of the second actuator element and a second end coupled rigid with the first arm. The first and the second actuator elements are configured to be driven in an offset manner, so that the second end of the first arm performs a movement along a closed line.

Abstract: A device includes input data lines associated with a first time domain and output data lines associated with a second time domain. Synchronizing circuitry is coupled between the input data lines and output data lines. The synchronizing circuitry is driven by a synchronizing clock signal generated by clock generating circuitry. The clock generating circuitry is coupled to the input data lines and the synchronizing circuitry. In operation, the clock generating circuitry detects signal transitions on the plurality of input data lines. The clock generating circuitry generates the synchronizing clock signal that drives the synchronizing circuitry based on detected transitions, a clock signal of the first time domain, and a clock signal of the second time domain.

Abstract: A DC-DC boost converter includes an inductor coupled between an input voltage and an input node, a first path coupled between the input node and a first output node at which a first output voltage is generated, and a second path coupled between the input node and a second output node at which a second output voltage is generated. The DC-DC boost converter operates in a first operating phase where the first path boosts the first output voltage and where the second path is kept from boosting the second output voltage by the second path being coupled to the first path, and operates in a second operating phase where the second path boosts the second output voltage and where the first path is kept from boosting the first output voltage by the second path not being coupled to the first path.

Abstract: A first input node receives a first input signal and a second input node receives a second input signal. The first and second input signals are in phase quadrature. An edge detector circuit senses the first input signal and produces a pulsed signal indicative of edges detected in the first input signal. A pulse skip and reset circuit senses the pulsed signal and the second input signal, and produces a reset signal indicative of pulses detected in the pulsed signal while the second input signal is de-asserted. A sampling circuit senses the second input signal and the reset signal, and produces an output signal that is deasserted in response to assertion of the second input signal and is asserted in response to a pulse being detected in the reset signal.

Abstract: The disclosure relates to an optoelectronic device comprising in a stack: one reflection polarizing filter, one phase-shifting element configured to add a ?/4 phase shift in polarization, one active region, one reflector, so that the light radiation rays reflected by the reflector and passing through the phase-shifting element exhibit a new polarization phase-shifted by ?/2 with respect to their initial polarization, the rays then being reflected anew by the polarizing filter in the direction of the active region.

Abstract: A process for a slave device on a serial data bus to make an in-band interrupt request to a master device includes checking whether a backoff time stored by a backoff timer has expired. When the backoff time has not expired, the slave device refrains from initiating the in-band interrupt request to the master device in response to a start condition on the serial bus. However, when the backoff time has expired, the slave device is permitted to initiate the in-band interrupt request to the master device in response to the start condition on the serial bus.

Abstract: A device includes a leadframe with a semiconductor die having a first side facing and electrically coupled to the leadframe and a second side facing away from the leadframe. An encapsulation body containing laser direct structuring (LDS) material covers the semiconductor die and has an outer surface opposite the leadframe. Metal vias are formed through the LDS material between the outer surface and the second side of the semiconductor die, and a metal pad is formed at the outer surface. The metal vias and pad create a thermal dissipation path. The semiconductor die may be mounted in a flip-chip configuration and connected to the leadframe through metal pillars. The metal vias and pad may be formed by laser-activating the LDS material followed by copper plating. The device can be configured as a Quad Flat No-leads (QFN) package, and a heat sink may be mounted on the metal pad.

Abstract: A half bridge circuit includes two GaN high electron mobility transistors (HEMT). A driver circuit generates a high side and low side driver signals corresponding to square wave. A driver deadtime is the period between during which both driver signals are low. A half bridge adjustment circuit is coupled between the driver and the half bridge circuit and generates a modified high side driver signal and a modified low side driver signal, each including a transition from a low voltage to an intermediate voltage during the corresponding deadtime and a transition from the intermediate voltage to a high voltage at an end of the corresponding deadtime. The half bridge adjustment circuit drives the gate terminals of the high side and low side transistors with the modified high side and low side driver signals.

Abstract: A substrate includes a center portion and a peripheral portion connected to the center portion by a flexible coupling region. A first die is mounted to an upper surface of the substrate at the center portion and a second die is mounted to the upper surface of the substrate at the peripheral portion. A heatsink includes a base plate, fins extending from an upper surface of the base plate and tabs extending from a lower surface of the base plate. The tabs of the heatsink are mounted to the upper surface of the substrate at the center portion, and the lower surface of the base plate is thermally coupled to a back of the first die. The peripheral portion is folded relative to the center portion at the flexible coupling region. An outer surface of the fin of the heatsink is thermally coupled to a back of the second device.