Patents Assigned to STMicroelectronics (Research & Development), Limited
  • Patent number: 12211881
    Abstract: An imaging device includes a sensor array with a number of pixels. In an embodiment, the imaging device can be operated by capturing a first low-spatial resolution frame using a subset of pixels of the sensor array and then capturing a second low-spatial resolution frame using the same subset of pixels of the sensor array. A first depth map is generated using raw pixel values of the first low-spatial resolution frame and a second depth map is generated using raw pixel values of the second low-spatial resolution frame. The first depth map can be compared to the second depth map to determine whether an object has moved in a field of view of the imaging device.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: January 28, 2025
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: Neale Dutton
  • Patent number: 12182059
    Abstract: The present disclosure relates to a secondary device comprising a first port receiving a clock signal from a first port of a primary device and a second port connected to a second port of the primary device. The clock signal determines, for each bit transmission, first, second, third and fourth successive phases. The secondary device puts its second port in a high impedance state during the first, second and fourth phases of each bit transmission. During the third phase of each transmission of a bit of data from the secondary device to the primary device, the secondary device discharges its second port when the transmitted bit has a first value and leaves its second port in a high impedance state when the transmitted bit has a second value.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: December 31, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Jeffrey M. Raynor, Sergio Miguez Aparicio, Benjamin Thomas Sarachi
  • Patent number: 12167142
    Abstract: In an embodiment an apparatus includes a scanning photographic sensor configured to acquire an image, according to an integration time of the sensor, of a scene illuminated with periodically emitted light pulses by a source, so that the image has a regular succession of bands with different luminosities when the integration time of the sensor is different from a period of the light pulses, a processor configured to generate a signature vector representative of the regular succession of bands with different luminosities being present in the image acquired by the photographic sensor, wherein the signature vector is independent of a reflectance of an objects of the scene and of a level of light in the scene, determine a frequency of the bands in the image on basis of the generated signature vector and determine the period of the pulses of the source on basis of the determined frequency of the bands in the image, and a controller configured to adjust the integration time of the photographic sensor so that the int
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: December 10, 2024
    Assignees: STMicroelectronics (Research & Development) Limited, STMicroelectronics France
    Inventors: Arnaud Bourge, Tanguy Le Dauphin, Antoine Drouot, Brian Douglas Stewart
  • Publication number: 20240379891
    Abstract: A single photon avalanche diode (SPAD) pixel circuit includes a SPAD, a clamping transistor coupled to the anode of the SPAD, and readout circuitry. The clamping transistor limits the anode voltage to a threshold below the readout circuitry's maximum operating voltage. In one embodiment, quenching and enabling transistors are implemented using single-layer gate oxide technology, while the clamping transistor uses extended drain technology. A regulation circuit generates a voltage clamp control signal for an array of pixels. Another embodiment utilizes a stacked chip design with the SPAD and a cathode-side quenching element on one chip, and the clamping transistor and readout circuitry on another. This incorporates a parasitic capacitance from deep trench isolation. Additional biasing transistors may be used for fine-tuning the clamped anode voltage.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Applicant: STMicroelectronics (Research & Development) Limited
    Inventors: Mohammed AL-RAWHANI, Neale DUTTON, John Kevin MOORE, Bruce RAE, Elsa LACOMBE
  • Patent number: 12143719
    Abstract: A method includes dividing a field of view into a plurality of zones and sampling the field of view to generate a photon count for each zone of the plurality of zones, identifying a focal sector of the field of view and analyzing each zone to select a final focal object from a first prospective focal object and a second prospective focal object.
    Type: Grant
    Filed: September 20, 2023
    Date of Patent: November 12, 2024
    Assignees: STMicroelectronics France, STMicroelectronics, Inc., STMicroelectronics (Research & Development) Limited
    Inventors: Darin K. Winterton, Donald Baxter, Andrew Hodgson, Gordon Lunn, Olivier Pothier, Kalyan-Kumar Vadlamudi-Reddy
  • Patent number: 12135374
    Abstract: A differential correlator filter includes: a pre-pulse region, where first filter coefficients in the pre-pulse region have negative values; and a pulse region including: a rising edge region adjacent to the pre-pulse region, where second filter coefficients in the rising edge region have positive values; an accumulation region adjacent to the rising edge region, where third filter coefficients of the accumulation region have positive values; and a falling edge region adjacent to the accumulation region, where fourth filter coefficients of the falling edge region have positive values, where the accumulation region is between the rising edge region and the falling edge region. The differential correlator filter further includes a post-pulse region adjacent to the pulse region, where the pulse region is between the pre-pulse region and the post-pulse region, where fifth filter coefficients of the post-pulse region have negative values.
    Type: Grant
    Filed: July 6, 2022
    Date of Patent: November 5, 2024
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventor: Andreas Aßmann
  • Patent number: 12123975
    Abstract: An apparatus comprises an array of vertical-cavity surface-emitting lasers. Each of the vertical-cavity surface-emitting lasers is configured to be a source of light. The apparatus also comprises an optical arrangement configured to receive light from a plurality of the vertical-cavity surface-emitting lasers and to output a plurality of light beams.
    Type: Grant
    Filed: October 26, 2023
    Date of Patent: October 22, 2024
    Assignee: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED
    Inventors: Christopher Townsend, Thineshwaran Gopal Krishnan, James Peter Drummond Downing, Kevin Channon
  • Publication number: 20240339464
    Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.
    Type: Application
    Filed: June 14, 2024
    Publication date: October 10, 2024
    Applicants: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SAS
    Inventors: Raul Andres BIANCHI, Marios BARLAS, Alexandre LOPEZ, Bastien MAMDY, Bruce RAE, Isobel NICHOLSON
  • Patent number: 12074242
    Abstract: Disclosed herein is an array of pixels. Each pixel includes a single photon avalanche diode (SPAD) and a transistor circuit. The transistor circuit includes a clamp transistor configured to clamp an anode voltage of the SPAD to be no more than a threshold clamped anode voltage, and a quenching element in series with the clamp transistor and configured to quench the anode voltage of the SPAD when the SPAD is struck by an incoming photon. Readout circuitry is coupled to receive the clamped anode voltage from the transistor circuit and to generate a pixel output therefrom, the threshold clamped anode voltage being below a maximum voltage rating of transistors forming the readout circuitry.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: August 27, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Mohammed Al-Rawhani, Neale Dutton, John Kevin Moore, Bruce Rae, Elisa Lacombe
  • Patent number: 12066678
    Abstract: An electronic device includes a carrier substrate having a front face. An electronic chip is mounted on the front face of the carrier substrate and includes an optical component. An encapsulation cover is mounted on top of the front face of the carrier substrate and bounds a chamber within which the chip is situated. A front opening extends through the cover and is situated in front of the optical component. An optical element, designed to allow light to pass, is mounted within the chamber at a position which covers the front opening of the encapsulation cover. The optical element includes a central region designed to deviate the light and having an optical axis aligned with the front opening and the optical component. A positioning pattern is provided on the optical element to assist with mounting the optical element to the cover and mounting the cover to the carrier substrate.
    Type: Grant
    Filed: February 16, 2023
    Date of Patent: August 20, 2024
    Assignees: STMicroelectronics (Grenoble 2) SAS, STMicroelectronics (Research & Development) Limited
    Inventors: Nicolas Mastromauro, Roy Duffy, Karine Saxod
  • Patent number: 12066539
    Abstract: A method implemented by a first time of flight (ToF) sensor includes generating, by the first ToF sensor, a first depth map in accordance with measurements of reflections of an optical signal emitted by the first ToF sensor; communicating, by the first sensor with a second ToF sensor, the first depth map and a second depth map, the second depth map generated by the second ToF sensor; and determining, by the first ToF sensor, a relative location of the first ToF sensor relative to the second ToF sensor in accordance with the first depth map and the second depth map.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: August 20, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Brent Edward Hearn, Marek Jan Munko
  • Patent number: 12063040
    Abstract: A system-on-a-chip (SOC) within a package includes a reference generator, a matching circuit, a programmable current generator, a PWM controller, an overvoltage/undervoltage detector receiving a high voltage from a third output pad, a multiplexer passing an input signal to a second output pad, and a SPAD receiving the high voltage. Switching circuitry includes a first switch between the reference generator and an input of the programmable current generator, a second switch between the input of the current generator and the output of the matching circuit, a third switch between the reference generator and an input of the matching circuit, a fourth switch between an output of the current generator and a tap of a ladder within the overvoltage/undervoltage detector, a fifth switch between an output of the current generator and the first output pad, and a sixth switch between the output of the PWM controller and the first output pad.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: August 13, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Neale Dutton, Steven Collins
  • Patent number: 12057461
    Abstract: An electronic device includes a stack of a first level having a SPAD, a second level having a quench circuit for said SPAD, and a third level having a circuit for processing data generated by said SPAD. A method for making the device includes: a) forming of the first level; b) bonding, on the first level, by molecular bonding, of a stack of layers including a semiconductor layer; and c) forming the quench circuit of the second level in the semiconductor layer.
    Type: Grant
    Filed: July 24, 2023
    Date of Patent: August 6, 2024
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research & Development) Limited
    Inventors: Francois Guyader, Sara Pellegrini, Bruce Rae
  • Patent number: 12055435
    Abstract: A sensing pixel includes a single photon avalanche diode (SPAD) coupled between a first node and a second node, with a clamp diode being coupled between a turn-off voltage node and the second node. A turn-off circuit includes a sense circuit configured to generate a feedback voltage based upon a voltage at the turn-off voltage node, a transistor having a first conduction terminal coupled to the turn-off voltage node, a second conduction terminal coupled to ground, and a control terminal, and an amplifier having a first input coupled to a reference voltage, a second input coupled to receive the feedback voltage, and an output coupled to the control terminal of the transistor. A readout circuit is coupled to the SPAD by a decoupling capacitor.
    Type: Grant
    Filed: November 15, 2022
    Date of Patent: August 6, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventor: John Kevin Moore
  • Patent number: 12051705
    Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: July 30, 2024
    Assignees: STMICROELECTRONICS (RESEARCH & DEVELOPMENT) LIMITED, STMicroelectronics (Crolles 2) SAS
    Inventors: Raul Andres Bianchi, Marios Barlas, Alexandre Lopez, Bastien Mamdy, Bruce Rae, Isobel Nicholson
  • Patent number: 12025745
    Abstract: A method may include generating, within a device, separate and discrete wavelengths, and generating light intensity profiles based on an interaction between the separate and discrete wavelengths and a multi-wavelength diffractive optic element. The method may include detecting an object from light reflected from the object using the light intensity profiles. The light intensity profiles may include a shorter range light intensity profile and a longer range light intensity profile, each light intensity profile having different energy per solid angle patterns.
    Type: Grant
    Filed: August 28, 2019
    Date of Patent: July 2, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: James Peter Drummond Downing, Adam Caley
  • Patent number: 12015427
    Abstract: An input stage circuit for a sigma-delta analog-to-digital converter circuit receives a digital-to-analog converter generated feedback signal and an analog current input signal to generate a difference signal applied to an integrator circuit. A single bit quantization circuit quantizes an output of the integrator circuit to generate a bit signal that is applied to an input of the digital-to-analog converter. The input stage circuit includes a switched input capacitor controlled by first and second, non-overlapping, clock signals.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: June 18, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Ilina Todorova, Jeffrey M. Raynor
  • Patent number: 12015243
    Abstract: A laser diode driver circuit includes a first pair of contacts and connectors coupled to an anode of the laser diode. An inductance of each of the first pair of contacts and connectors is the same. A second pair of contacts and connectors are coupled to a cathode of the laser diode. An inductance of each of the second pair of contacts and connectors is the same. The laser diode driver circuit also includes current driving circuitry.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: June 18, 2024
    Assignees: STMICROELECTRONICS (RESEARCH & DEVELOPMENT ) LIMITED, STMICROELECTRONICS (GRENOBLE 2) SAS
    Inventors: Denise Tingxi Lee, Neale Dutton, Nicolas Moeneclaey, Jerome Andriot-Ballet
  • Publication number: 20240194815
    Abstract: A single photon avalanche diode (SPAD) includes a PN junction in a semiconductor well doped with a first type of dopant. The PN junction is formed between a first region doped with the first type of dopant and a second region doped with a second type of dopant opposite to the first type of dopant. The first doped region is shaped so as to incorporate local variations in concentration of dopants that are configured, in response to a voltage between the second doped region and the semiconductor well that is greater than or equal to a level of a breakdown voltage of the PN junction, to generate a monotonic variation in the electrostatic potential between the first doped region and the semiconductor well.
    Type: Application
    Filed: February 27, 2024
    Publication date: June 13, 2024
    Applicants: STMicroelectronics (Crolles 2) SAS, STMicroelectronics (Research & Development) Limited
    Inventors: Denis RIDEAU, Dominique GOLANSKI, Alexandre LOPEZ, Gabriel MUGNY
  • Patent number: 12009373
    Abstract: An imaging sensor includes a pixel array containing photodiodes, the photodiodes being isolated from one another by full thickness deep trench isolations. Row control circuitry controls which rows of the pixel array operate in an imaging mode and which rows of the pixel array operate in an energy harvesting mode, on a row-by-row basis. Switch circuitry selectively connects different groups of photodiodes in rows operating in the energy harvesting mode into forward biased series configurations between a voltage output line and a ground line, or into forward biased parallel configurations between the voltage output line and the ground line. In the forward biased series configurations, the cathode of at least one photodiode of a given group of photodiodes is directly electrically connected to ground.
    Type: Grant
    Filed: October 10, 2022
    Date of Patent: June 11, 2024
    Assignee: STMicroelectronics (Research & Development) Limited
    Inventors: Filip Kaklin, Jeffrey M. Raynor