Abstract: In an embodiment a method for managing a low-power mode of an electronic device includes at a first request for transitioning an electronic device to a low-power mode, storing values of a first counter and a second counter of the electronic device on a first edge of a first clock and at a second request for transitioning the electronic device out of the low-power mode calculating a number of periods of a second clock between a second edge of the first clock and the first edge, the second edge being later than the first edge and updating the value of the second counter with a calculated value, wherein the first clock drives the first counter and the second clock drives the second counter, the second clock being faster than the first clock.

Abstract: A method for making a phase change memory includes a step of forming an array of phase change memory cells, with each cell being separated from neighboring cells in the same line of the array and from neighboring cells in the same column of the array, by the same first distance. The method further includes a step of etching one memory cell out of N, with N being at least equal to 2, in each line or each column.

Abstract: A circuit detects zero crosses in an input-signal and includes a low-pass-filter (LPF) receiving the input-signal and introducing a phase-shift dependent on the frequency thereof. Filter circuitry receives the output of the LPF, applies a fixed phase-shift thereto, and adjusts phase and DC-offset thereof based on control signals to produce a filtered output-signal. Control circuitry has a zero-crossing detector receiving the input-signal and the filtered output-signal, detecting zero-crossings of the input-signal and the filtered output-signal, asserting a digital zero cross signal at each zero crossing, and determining a phase-shift and DC-offset between the input-signal and filtered output-signal.

Abstract: An electronic digital system includes a digital core and a Serializer Deserializer module. A FIFO device of the core reads and writes on a set of buses coupled to said Serializer Deserializer module. The Serializer Deserializer module transmits data read from the FIFO architecture device on a set of buses as a corresponding serial signals transmitted by transmitters. The serial signals and corresponding transmitters are logically grouped. The transmitters include PLL circuits generating PLL clocks, using as reference a cluster transmitter reference clock common, to a respective cluster of transmitters controlling a frequency of serialization operation and low frequency clocks obtained by the PLL clocks according to one or more groups corresponding to group of buses.

Abstract: An electronic vehicle includes A DC link capacitor and a traction inverter coupled to the DC link capacitor. The traction inverter includes a first half bridge circuit, a second half bridge circuit, and a third half bridge circuit each coupled between terminals of the DC link capacitor. The traction inverter includes a driver circuit coupled to the traction inverter configured to drive the first, second, and third half bridge circuits to generate an AC voltage in a standard operating mode. The driver circuit is configured to discharge the DC link capacitor responsive to a discharge command by toggling the first half bridge between an open condition and a closed condition while holding the second half bridge circuit and the third half bridge circuit in the open condition.

Abstract: The present disclosure is directed to cough detection for electronic devices, such as wireless headphones. The cough detection utilizes inertial sensors to perform both head movement detection and vocal activity detection. The dual identification of head movement and vocal activity allows improved detection accuracy, and minimal false detections caused by environmental noise.

Abstract: A method, comprising: coupling a set of sensing circuits to a set of electronic devices; sensing, via the sensing circuits, a set of sensing signals indicative of an operating state of the set of electronic devices; applying logic signal processing to the set of sensing signals via coupling a set of signal processing channels to the set of sensing circuits and providing a set of logically combined sensing signals as a result, wherein the logically combined sensing signals are indicative of whether the operating state of the electronic devices in the set of electronic devices is an expected operating state or an unexpected operating state; coupling the set of logically combined sensing signals to a set of input channels of a fault collection and control unit, FCCU; storing at least one data structure comprising data related to the way in which the set of input channels of the FCCU are coupled to the set of sensing circuits via the set of signal processing channels.

Abstract: The present description relates to a method of manufacturing an electronic device comprising a phase-change memory cell, the method comprising: the forming of a first layer made of a resistive material; the forming of a stack of layers on the first layer, the stack comprising at least one second layer made of a phase-change material; the etching of the stack, said etching stopping when the first layer is reached around the location of the memory cell; the forming of a spacer on the side walls of the stack; then an etching of the first layer, so that the stack rests on a central portion of the first layer and that the spacer rests on a peripheral portion of the first layer.

Abstract: A MOSFET transistor with a semiconductor body including a drain region of a first conductivity type, delimited by a front surface, and at least one cell including: a pair of gate structures laterally offset parallel to a first axis and each including a respective gate dielectric region, arranged on the front surface, and a respective gate conductive region, arranged on the corresponding gate dielectric region; a body structure of a second conductivity type, which includes a body region, which extends inside the drain region starting from the front surface and contacts portions of the gate dielectric regions, and a strengthening region, which extends below the body region; and a pair of source regions of the first conductivity type, which extend inside the body region starting from the front surface.

Abstract: A process for forming a high electron mobility transistor (HEMT) includes forming a semiconductor heterostructure including a channel layer of the HEMT, forming a gate layer of GaN on the channel layer, and patterning the gate layer to form a first gate finger, a second gate finger, and a gate arc connecting the first gate finger and the second gate finger. The process includes forming an isolation mask covering an active region of the semiconductor heterostructure and the gate arc and performing an ion bombardment process on an inactive region of the semiconductor heterostructure exposed by the isolation mask.

Abstract: A bipolar transistor includes a common collector region comprising a buried semiconductor layer and an annular well. A well region is surrounded by the annular well and delimited by the buried semiconductor layer. A first base region and a second base region are formed by the well region and separated from each other by a vertical gate structure. A first emitter region is implanted in the first base region, and a second emitter region is implanted in the second base region. A conductor track electrically couples the first emitter region and the second base region to configure the bipolar transistor as a Darlington-type device. Structures of the bipolar transistor may be fabricated in a co-integration with a non-volatile memory cell.

Abstract: A band-gap circuit for generating a bandgap reference signal includes a first bipolar transistor and a second bipolar transistor of a same type among PNP and NPN types. The first and second bipolar transistors are configured to generate a current varying proportionally with the temperature. A capacitor is connected between a base and an emitter of one or both of the first and second bipolar transistors.

Abstract: A system to sanitize a surface includes an emitter. The emitter of the system to sanitize the surface includes: a light source configured to generate light at a sanitizing wavelength; a receiver configured to receive a wireless signal; and a processing circuit for the emitter configured to turn the light source on, turn the light source off, and adjust an intensity of light generated by the light source depending on the wireless signal. The system to sanitize the surface further includes a sensor. The sensor of the system to sanitize the surface includes: a photoelectric transducer configured to convert light at the sanitizing wavelength to a current; and a processing circuit for the sensor powered by the current and in communication with a transmitter to transmit the wireless signal, the processing circuit for the sensor being configured to control emission of the wireless signal depending on a power level supplied by the current.

Abstract: An electronic device includes a carrier substrate having a front face and an electronic chip mounted on the front face. An encapsulation cover is mounted above the front face and bounds a chamber in which the chip is situated. A front opening is provided in front of an optical component of the chip. An optical element, designed to allow light to pass, is mounted on the cover in a position which covers the front opening of the cover. The optical element includes a central region designed to deviate light and a positioning pattern that is visible through the front opening. An additional mask is mounted on the encapsulation cover in a position which extends in front of the optical element. A local opening of the additional mask is situated in front of the optical component.

Abstract: System, method, and circuitry for generating content for a programmable computing device based on user-selected configuration information. A settings registry is generated based on the user's selections. The settings registry and the user selected configuration information is utilized to generate the content, such as code, data, parameters, settings, etc. When the content is provided to the programmable computing device, the content initializes, configures, or controls one or more software and hardware aspects of the programmable computing device, such as boot sequence configurations, internal peripheral configurations, states of the programmable computing device, transitions between states of the programmable computing device, etc., and various combinations thereof.

Abstract: An electronic device includes a base substrate having a mounting face. An electronic chip is fastened onto the mounting face of the base substrate. A transparent encapsulation structure is bonded onto the base substrate. The transparent encapsulation structure includes a housing with an internal cavity defining a chamber housing the electronic chip. The encapsulation structure has an external face that supports a light-filtering optical wafer located facing an optical element of the electronic chip. An opaque cover covers the transparent encapsulation structure and includes a local opening facing the light-filtering optical wafer.

Abstract: The present description concerns a method of verification, implemented by an electronic device, of a matrix used for the implementation of a data cipher algorithm comprising, for the generation of the matrix, the use of a first function and of a second function, the verification method comprising a verification using a final portion of the output data of the first function.

Abstract: An avalanche photodiode includes first semiconductor region of a first conductivity type in a semiconductor substrate and a second semiconductor region of a second conductivity type in the semiconductor substrate which forming a PN junction to be reverse-biased. A third semiconductor region of the second conductivity type in the semiconductor substrate is positioned such that the second region is closer to the first region than the third region. A fourth semiconductor region of the second conductivity type in a semiconductor substrate is in contact with the second and third regions. A dopant concentration of the fourth region is less than dopant concentrations of the second and third regions. The fourth region is arranged to at least partially surround the second region, and the third region is arranged to at least partially surround the fourth region.

Abstract: A pressure sensor has a body having a first chamber and a second chamber hermetically separated from the first chamber; a first detection structure which is arranged in the first chamber, has a first deformable element and a first buried cavity within the first detection structure, wherein the first deformable element is configured to undergo a deformation as a function of a pressure difference between the first chamber and the first buried cavity. The sensor also has a second detection structure which is arranged in the second chamber, has a second deformable element and a second buried cavity within the second detection structure, wherein the second deformable element is configured to undergo a deformation as a function of a pressure difference between the second chamber and the second buried cavity.

Abstract: A thermoelectric generator includes a thermoelectric converter and a thermal coupling structure, configured to thermally couple the thermoelectric converter to a first body at a first temperature and to a second body at a second temperature, lower than the first temperature. The thermoelectric converter includes a support body, having a structural layer and a thermal insulation layer, and a plurality of thermopiles arranged on the thermal insulation layer and thermally coupled to the thermal coupling structure. The thermal insulation layer has a thickness such as to thermally insulate the thermopiles from the structural layer and the support body is continuous and without cavities between the thermopiles and a face of the structural layer opposite to the thermopiles.