Abstract: The present description concerns a method of manufacturing an insulating trench in a substrate, for an electronic device, comprising the following successive steps: (a) filling a trench formed in the substrate with a first insulating material; (b) depositing a first etch stop layer on the first material; (c) depositing a second layer of a second insulating material on the first etch stop layer; (d) etching down to the etch stop layer; and (e) depositing a third layer made of a third tight material.

Abstract: An IMC circuit includes a memory cells arranged in matrix. Computational weights for an IMC operation are stored in groups of cells. Each row of groups of cells includes a positive and negative word linen. Each column of groups of cells includes a bit line. The IMC operation includes a first elaboration where a word line signal is applied to the positive/negative word line of the group of cells depending on the positive/negative sign, respectively, of the coefficient data, with a positive MAC output on the bit line. In a second elaboration, a word line signal is applied to the negative/positive word line of the group of cells depending on the positive/negative sign, respectively, of the coefficient data, with a negative MAC output on the bit line. The IMC operation result is obtained from a difference between the positive and negative MAC operations.

Abstract: The present description concerns an optical filter intended to be arranged in front of an image sensor comprising a plurality of pixels, the filter comprising, for each pixel, at least one resonant cavity comprising a transparent region having a first refraction index and laterally delimited by a reflective peripheral vertical wall, and at least one resonant element formed in said region.

Abstract: A semiconductor die is arranged at a die mounting location of an electrically conductive substrate. The electrically conductive substrate includes an array of electrically conductive leads having openings at the periphery of the electrically conductive substrate. An electrically conductive clip is arranged in a bridge-like position between the semiconductor die and an electrically conductive lead in the array of electrically conductive leads to provide electrical coupling therebetween. The electrically conductive clip has an end coupled to the electrically conductive lead, wherein the end includes: a planar proximal portion configured to contact the electrically conductive lead proximally of the openings, and a distal portion projecting beyond the proximal portion distally thereof, the distal portion provided with sculpturing configured to engage the openings to facilitate immobilizing the electrically conductive clip in the bridge-like position between the semiconductor chip and electrically conductive lead.

Abstract: A reception element receives an analog signal. The received analog signal is converted by a reception chain into a digital signal. Based on the digital signal and a first filtering operation, a correction chain generates a correction digital signal reconstituting dynamic nonlinearities generated by the reception chain. A corrected signal from which the reconstituted dynamic nonlinearities have been removed is then generated by subtracting the correction digital signal from the digital signal.

Abstract: An integrated circuit semiconductor dice has first and second opposed surfaces. First and second electrically conductive patterns extending at the first and second opposed surfaces provide electrical coupling to the semiconductor die. An electrical component, such as a capacitor, having a length transverse to the first and second opposed surfaces of the semiconductor die, extends bridge-like between the first and second opposed surfaces. Opposed electrical contact end terminals of the electrical component are coupled to the first and second electrically conductive patterns. The electrical component is thus electrically coupled to the semiconductor die via the first and second electrically conductive patterns at the first and second opposed surfaces.

Abstract: A non-volatile memory includes current sectors and a substitution sector. The non-volatile memory is controlled to store data into the sectors and to erase data stored in one of the sectors by erasing all the data stored in that sector at once. The current sectors include a first current sector storing at least one first valid data element and a second current sector storing at least one second valid data element. A determination is made that one of the current sectors is to be erased. One sector among the current sectors is selected. Valid data in the selected current sector is then copied into the substitution sector. All data in the selected current sector then erased.

Abstract: A method is presented for monitoring a tampering state of closed container wherein a first electrically conductive wire extends across a slot between two portions of the closed container. The method includes applying a voltage across the first electrically conductive wire, sensing a voltage at one end of the first electrically conductive wire, and generating a signal indicating the tampering state of the closed container in response to the sensed voltage. The sensed voltage has a first voltage value if the first electrically conductive wire has been severed by tampering, and this tampered state is then reported using near field communication. The near field communication is blocked if it is sensed that the severed first electrically conductive wire has been repaired.

Abstract: A memory array includes memory cells arranged in rows and columns where each row includes a word line connected to memory cells of the row and each column includes a bit line connected to memory cells of the column. Each memory cell stores a bit of weight data for an in-memory computation operation. A row controller circuit coupled to the word lines through drive circuits is configured to simultaneously actuate multiple word lines during the in-memory computation operation. A column processing circuit includes a discharge time sensing circuit for each column that generates an analog signal indicative of a time taken during the in-memory computation operation to discharge the bit line from a precharge voltage to a threshold voltage. The analog signals are converted to digital signal and a computation circuitry performs digital signal processing calculations on the digital signals to generate a decision output for the in-memory computation operation.

Abstract: A body of semiconductor material has a surface and accommodates an active area, conductive regions, a first deep insulation structure extending in the active area from the surface of the body in a first trench, and a second deep insulation structure extending in the active area from the surface of the body in a second trench and surrounding the conductive regions. The first deep insulation structure has insulation walls surrounding a conductive filling portion. The second deep insulation structure has a solid insulating region filling the second trench. The first deep insulation region has a first width and a first depth and the second deep insulation structure has a second width and a second depth. The second width is smaller than the first width and the second depth is smaller than the first depth.

Abstract: A method includes generating a voltage proportional to absolute temperature, generating an uncorrected voltage complementary to absolute temperature, and generating a correction voltage. The method further includes selectively sampling the voltage proportional to absolute temperature, the uncorrected voltage complementary to absolute temperature, and the correction voltage, providing those sampled voltages to inputs of an integrator, and then quantizing outputs of the integrator to produce a bitstream. The method continues with causing the integrator to integrate the voltage proportional to absolute temperature or causing the integrator to add the correction voltage to the uncorrected voltage complementary to absolute temperature to produce a corrected voltage complementary to absolute temperature and then integrate the corrected voltage complementary to absolute temperature, depending upon a most recent bit of the bitstream.

Abstract: An AFSM core includes a destination state-cell generating a destination state-signal, and a source state-cell generating a source state-signal and causing transition of the source state-signal in response to an acknowledgement indicating transition of the destination state-signal. The acknowledgment is communicated through a delay. A state-overlap occurs between transition of the destination state-signal and transition of the source state-signal. An output-net includes a balanced logic-tree receiving inputs, including the destination state-signal, from the core, and an additional logic-tree cascaded with the balanced logic-tree to form an unbalanced logic-tree so an input to the additional logic-tree is provided by output from the balanced logic-tree and another input receives the source state-signal. Tree propagation time occurs between receipt of a transition in the destination state-signal by the balanced logic-tree and a resulting transition of the output from the balanced logic-tree.

Abstract: In accordance with an embodiment, a timing sequence generation circuit includes: a ring oscillator having a plurality of clock signal outputs configured to provide clock signals delayed in time with respect to one another; a first shift register comprising a flip-flop having a clock input coupled to a clock signal input of the first shift register and an output coupled to an output of the first shift register; and a first circuit configured to: select a clock signal from among the clock signals; and deliver the selected clock signal to the clock signal input of the first shift register

Abstract: In an embodiment a method for measuring ambient light includes successively synchronizing optical signal acquisition phases with extinction phases of a disruptive light source, wherein the disruptive light source periodically provides illumination phases and the extinction phases, accumulating, in each acquisition phase, photo-generated charges by at least one photosensitive pixel comprising a pinned photodiode, wherein an area of the pinned photodiode is less than or equal to 1/10 of an area of the at least one photosensitive pixel, transferring, for each pixel, the accumulated photo-generated charges to a sensing node, converting, for each pixel, the transferred charges to a voltage at a voltage node and converting, for each pixel, the transferred charges to a digital number.

Abstract: An embodiment method for operating an electronic device includes transmitting, from a controller, a tearing effect (TE) signal to a touchscreen over a first period of time, the first period of time occurring during a first frame and having a duration that is shorter than a period of the first frame, the TE signal being configured to restrict image data from being displayed on the touchscreen during the first period of time; displaying the first frame of a plurality of frames of the image data on a display of the touchscreen over a second period of time within the period of the first frame other than during the first period of time; and detecting, at the controller, a first touch by performing a first self-sensing scan during the first period of time.

Abstract: A circuit for decoding a pulse width modulated (PWM) signal generates an output signal switching between a first and second logic values as a function of a duty-cycle of the PWM signal. Current generating circuitry receives the PWM signal and injects a current to and sinks a current from an intermediate node as a function of the values of the PWM signal. A capacitor coupled to the intermediate node is alternatively charged and discharged by the injected and sunk currents, respectively, to generate a voltage. A comparator circuit coupled to the intermediate node compares the generated voltage to a comparison voltage and drives the logic values of the output signal as a function of the comparison.

Abstract: A bipolar transistor includes a collector. The collector is produced by a process wherein a first substantially homogeneously doped layer is formed at the bottom of a cavity. A second gradually doped layer is then formed by diffusion of dopants of the first substantially homogeneously doped layer.

Abstract: A method of managing an integrated circuit memory includes identifying a set of allocated regions and a set of empty regions spanning a memory space of an integrated circuit card, selecting the biggest empty region of the set of empty regions, determining that an allocated memory block of an allocated region immediately adjacent to the biggest empty region is larger than the biggest remaining empty region of the memory space, storing the allocated memory block in a temporary list of skipped memory blocks, removing the allocated memory block from the set of allocated memory regions, and swapping the allocated memory block with a remaining empty region to widen the biggest empty region.

Abstract: An optical sensor includes pixels. Each pixel has a photodetector. A readout circuit performs a process over an exposure time where the photodetector is connected to a reverse bias voltage supply to reset a voltage across the photodetector, and the photodetector is disconnected from the reverse bias voltage supply until that the voltage across the photodetector decreases in response to received ambient light. An ambient light level is then determine an based on a number of times the voltage across the photodetector is reset over the exposure time.

Abstract: A system on chip includes a non-volatile memory and a processor configured to execute an operating system which receives data according to a first communication protocol and program installation software that communicates with the non-volatile memory according to a second communication protocol. The operating system functions to: determine whether data received according to the first communication protocol is program data, make the program data available to the installation software, and inform the installation software that program data has been received. The installation software then stores the program data in the non-volatile memory.