Abstract: Disclosed herein is an electronic device including an integrated circuit substrate, with a pixel array area within the integrated circuit substrate. A first deep trench isolation structure is formed in the integrated circuit substrate about a perimeter of the pixel array area. First, second, third, and fourth pixels are within the pixel array area and spaced apart from one another. A storage capacitor area is within the integrated circuit substrate and interior to the first deep trench isolation structure. A second deep trench isolation structure is formed in the integrated circuit substrate about a perimeter of the storage capacitor area. The second deep trench isolation structure may serve to electrically isolate the storage capacitor area from the first, second, third, and fourth pixels.

Abstract: A circuit may include a first circuit configured to generate a voltage signal for generating an optical pulse, the voltage signal being generated based on a phase control signal, and an array of single photon avalanche diode (SPAD) cells configured to detect a phase of the optical pulse. The circuit may include a phase control circuit configured to generate the phase control signal based upon a target phase value and the detected phase of the optical pulse.

Abstract: An electronic device disclosed herein includes a single photon avalanche diode (SPAD) configured to detect an incoming photon and to generate a first pulse signal in response thereto. Pulse shaping circuitry is configured to generate a second pulse signal from the first pulse signal by high pass filtering the first pulse signal. The pulse shaping circuitry includes a transistor drain-source coupled between a first node and a reference node, and a capacitor coupling the first node to an anode of the SPAD.

Abstract: SPADs detect photons of a return light pulse and output corresponding pulse signals. First and second counters, when enabled in response to phase measurement value, are configured to count the pulse signals. The phase measurement value is set for a subsequent iteration of the return light pulse in response to processing of first and second count values of the first and second counters, respectively, for a current iteration. If the first count value exceeds the second count value by more than a difference threshold limit, the phase measurement value is decremented for the subsequent iteration. Otherwise, the phase measurement value is incremented for the subsequent iteration. If the difference threshold limit is not satisfied, the phase measurement value may be maintained for the subsequent iteration, but one of the counters is preloaded for the subsequent iteration with a value equal to a magnitude of the difference between the count values.

Abstract: A pixel is formed by two or more photodiodes and at least one transfer gate. The transfer gate is configured to transfer charge from each of the photodiodes to a common sense node, such that charge from the photodiodes is combined at the common sense node.

Abstract: A Single-Photon Avalanche Diode (SPAD) is disclosed. The SPAD may include an active region for detection of incident radiation, and a cover configured to shield part of the active region from the incident radiation. An array is also disclosed and includes SPADs arranged in rows and columns. A method for making the SPAD is also disclosed.

Abstract: An electronic device disclosed herein includes a first integrated circuit die having formed therein photodiodes and readout circuitry for the photodiodes, with the readout circuitry including output pads exposed on a surface of the first integrated circuit die. A second integrated circuit die has formed therein storage capacitor structures for the photodiodes and digital circuitry for performing image processing on data stored in the storage capacitor structures, with the storage capacitor structures including input pads exposed on a surface of the second integrated circuit die. The first and second integrated circuit die are in a face to face arrangement such that the output pads of the first integrated circuit die face the input pads of the second integrated circuit die. An interconnect couples the output pads of the first integrated circuit die to the input pads of the second integrated circuit die.

Abstract: The present disclosure relates to solid state image sensors in digital imaging systems, more particularly to an image quality learning method and system for solid state image sensors. One of the advantages of the method according to an embodiment of the present disclosure is to allow the implementation of a digital machine vision system with a faster convergence of an Image Quality algorithm, which results in a shorter delay for the user. According to an embodiment of the present disclosure, the method is performed as a recursive algorithm which tends to converge to an Image Quality setting satisfying image quality criteria.

Abstract: A method includes receiving image information related to a first plurality of pixels at a first data pathway, receiving image information related to a second plurality of pixels at a second data pathway, where the first plurality of pixels and the second plurality of pixels include a shared plurality of pixels. The method also includes performing image processing in dependence on image information related to the shared plurality of pixels, and combining data output from the first and second data pathways into a stream of data where the stream output is generated using a first clock frequency which is substantially the same as that used in the first and second data pathways.

Abstract: A time of flight detector includes an electromagnetic radiation emitter configured to emit a beam of radiation. A first optical element receives the beam of radiation and generates a collimated beam of radiation. A second optical element defines a narrow imaging field of view sufficient to capture reflected electromagnetic radiation from the collimated beam. An electromagnetic radiation sensor then senses the captured reflected electromagnetic radiation from the collimated beam in the narrow imaging field of view. Further narrowing of the imaging field of view is accomplished by selective enabling a sub-array of photosensitive elements with the electromagnetic radiation sensor.

Abstract: A sensing apparatus includes a sensor and a processor. The sensor includes at least one light sensitive detector. The processor determines a first control value to control a voltage differential across the at least one light sensitive detector, and compares the first control value with a reference value associated with a reference temperature. Based on the comparison, the processor provides adjustment information for adjusting at least one output of the sensing apparatus, and an operating parameter of the sensing apparatus other than the voltage differential.

Abstract: Photoluminescence from a sample detector is detected using an array of photo-sensitive detectors. At least one first photo-sensitive detector of the array is provided with a first type of linear polarization filter and at least one second photo-sensitive detector is provided with a second type of linear polarization filter. The first type of linear polarization filter has a plane of polarization which is at angled with respect to a plane of polarization of said second type of polarization filter.

Abstract: A hybrid analog-digital pixel circuit is fabricated on two wafers. A first wafer includes the analog pixel circuitry and a second wafer includes the digital control and processing circuitry. Externally accessible contact structures for electrically interconnecting the two wafers are arranged in groups. Each group includes externally accessible contact structures for carrying signals associated solely with operation of a corresponding pixel.

Abstract: A pixel arrangement includes a photodiode, a reset transistor configured to be controlled by a reset signal and coupled to a reset input voltage, a transfer gate transistor configured to transfer charge from the photodiode to a node, wherein the transfer gate transistor is controlled by a transfer gate voltage, and a source follower transistor controlled by the voltage on the node and coupled to a source follower voltage. A capacitor is coupled between the node and an input voltage. During a read operation the input voltage is increased to boost the voltage at the node. The increased input voltage may, for example, be one the reset input voltage, said source follower voltage, said transfer gate voltage and a boosting voltage.

Abstract: An optical module for use in a device includes an array of pixels configured to capture image data and a memory. The memory is configured to store identification information associated with said optical module. The identification information enables retrieval of information for controlling said optical module from a source outside said device.

Abstract: Photoluminescence from a sample detector is detected using an array of photo-sensitive detectors. At least one first photo-sensitive detector of the array is provided with a first type of linear polarization filter and at least one second photo-sensitive detector is provided with a second type of linear polarization filter. The first type of linear polarization filter has a plane of polarization which is at angled with respect to a plane of polarization of said second type of polarization filter.

Abstract: An input device may include an image sensor having an imaging surface that includes an array of pixels, and an optical waveguide layer carried by the imaging surface and having an exposed user surface and a first refractive index associated therewith. The input device may also include a substrate between the optical waveguide layer and the image sensor and having a second refractive index associated therewith that is lower than first refractive index. A collimation layer may be between the image sensor and the substrate. A light source may be configured to transmit light into the optical waveguide so that the light therein undergoes a total internal reflection. The optical waveguide may be adjacent the imaging surface so that an object brought into contact with the exposed user surface disturbs the total internal reflection resulting in an image pattern on the imaging surface.

Abstract: An optical electronic device may include a plurality of different optical sources, and a global shutter sensor including an array of global shutter pixels, with each global shutter pixel including a plurality of storage elements. A controller may be coupled to the plurality of optical sources and the global shutter sensor and configured to cause a first optical source to illuminate and a first storage element in each global shutter pixel to store optical data during a first integration period, cause a second optical source to illuminate and a second storage element in each global shutter pixel to store optical data during a second integration period, and output the stored optical data from the first and second storage elements of the global shutter pixels after the first and second integration periods.

Abstract: Disclosed herein is an electronic device having a substrate, and an integrated circuit disposed within the substrate and having a top surface. The integrated circuit may be a laser emitting integrated circuit or a reflected light detector. A first interconnect layer is formed on the top surface of the substrate. A first optically transparent layer is formed on the top surface of the substrate and covering the top surface of the integrated circuit. A second interconnect layer is formed on a top surface of the first optically transparent layer. The second interconnect layer is patterned so as to not obstruct light traveling to or from the top surface of the integrated circuit through the first optically transparent layer.

Abstract: A pixel array includes pixels arranged in columns. A pair of column lines is provided for each column of pixels. A current source circuit is coupled to each pair of column lines. The current source circuit provides current to the pair of column lines in a first mode of operation such that when one column line in a pair of column lines is being provided with a first current the other column line in the pair of column lines is being provided with a second current which is less than the first current.