Abstract: In an embodiment a memory cell includes a first doped well of a first conductivity type in contact with a second doped well of a second conductivity type, the second conductivity type being opposite to the first conductivity type, a third doped well of the second conductivity type in contact with a fourth doped well of the first conductivity type, a first wall in contact with the second and fourth wells, the first wall including a conductive or semiconductor core and an insulating sheath, a stack of layers including a first insulating layer, a first semiconductor layer, a second insulating layer and a second semiconductor layer at least partially covering the second and fourth wells and a third semiconductor layer located below the second and fourth wells and the first wall.

Abstract: In an embodiment, a method includes: receiving data signals from a plurality of pixels of an array of pixels; generating a plurality of signal-to-noise ratios by determining signal-to-noise ratios for each respective pixel of the plurality of pixels on the basis of the data signals received from the respective pixel; and filtering the data signals received from each pixel of the plurality of pixels by using an adaptive filter configured on the basis of the plurality of the signal-to-noise ratios to generate filtered data signals.

Abstract: A hardware accelerator includes functional circuits and streaming engines. An interface is coupled to the plurality of streaming engines. The interface, in operation, performs stream cipher operations on data words associated with data streaming requests. The performing of a stream cipher operation on a data word includes generating a mask based on an encryption ID associated with a streaming engine of the plurality of streaming engines and an address associated with the data word, and XORing the generated mask with the data word. The hardware accelerator may include configuration registers to store configuration information indicating a respective security state associated with functional circuits and streaming engine of the hardware accelerator, which may be used to control performance of operations by the hardware accelerator.

Abstract: A system includes a host processor, a memory, a hardware accelerator and a configuration controller. The host processor, in operation, controls execution of a multi-stage processing task. The memory, in operation, stores data and configuration information. The hardware accelerator, in operation preforms operations associated with stages of the multi-stage processing task. The configuration controller is coupled to the host processor, the hardware accelerator, and the memory. The configuration controller executes a linked list of configuration operations, for example, under control of a finite state machine. The linked list consists of configuration operations selected from a defined set of configuration operations. Executing the linked list of configuration operations configures the plurality of configuration registers of the hardware accelerator to control operations of the hardware accelerator associated with a stage of the multi-stage processing task.

Abstract: Provided are techniques for protecting a transaction in near-field communication. Provided is an electronic device including a processor hosting an application, a near-field communication module, and a secure element distinct from the processor. The near-field communication module is configured to identify the type of terminal emitting a polling frame, addressed to the application, that the communication module receives by analyzing the type of the polling frame. The device is configured to compare the result of the analysis with at least one command received from the terminal during the implementation of an NFC transaction.

Abstract: A field effect transistor has a semiconductor layer with a top surface extending in a horizontal plane, and an active area defined in which are trench gate regions, which extend in depth with respect to the top surface and have an insulating coating layer and a conductive inner layer, and source regions, adjacent to the trench gate regions so as to form a conductive channel extending vertically. The trench gate regions have a plurality of first gate regions, which extend in length in the form of stripes through the active area along a first direction of the horizontal plane, and moreover a plurality of second gate regions, which extend in length in the form of stripes through the same active area along a second direction of the horizontal plane, orthogonal to, and crossing, the first gate regions. In particular, the first gate regions and second gate regions cross in the active area, joining with a non-zero curvature radius.

Abstract: A microfluidic device for continuous ejection of fluids includes: a semiconductor body that laterally delimits chambers; an intermediate structure which forms membranes each delimiting a top of a corresponding chamber; and a nozzle body which overlies the intermediate structure. The device includes, for each chamber: a corresponding piezoelectric actuator; a supply channel which traverses the intermediate structure and communicates with the chamber; and a nozzle which traverses the nozzle body and communicates with the supply channel. Each actuator is configured to operate i) in a resting condition such that the pressure of a fluid within the corresponding chamber causes the fluid to pass through the supply channel and become ejected from the nozzle as a continuous stream, and ii) in an active condition, where it causes a deformation of the corresponding membrane and a consequent variation of the pressure of the fluid, causing a temporary interruption of the continuous stream.

Abstract: The present disclosure relates to a near-field communication device including a near-field communication controller. The near-field communication controller includes at least one first demodulator, adapted to apply a first type of demodulation to a first signal modulated according to a first or a second type of modulation; and at least one second demodulator, adapted to apply a second type of demodulation to the first signal.

Abstract: An electronic device includes a processor and one or more secure elements. The processor executes a first high-level operating system and a first application. The one or more secure elements execute a first low-level operating system to verify a reliability, an authenticity, or a reliability and an authenticity of the first high-level operating system, and execute a second low-level operating system to execute a second application and to perform wireless communication with the first application. At each booting of the electronic device, the first low-level operating system performs a verification of the reliability, of the authenticity, or of the reliability and the authenticity of the first high-level operating system. In response to a request from the first application to the second application, the second low-level operating system requests a result of the verification from the first low-level operating system, and transmits the result to the second application.

Abstract: An electronic device includes a secure element and an application programming interface. The secure element, in operation, executes a first application. The application programming interface, in operation, verifies a reliability of a received command directed to the first application, and transmits the command and a result of the verification to the first application.

Abstract: A method of manufacturing a redistribution layer includes: forming an insulating layer on a wafer, delimited by a top surface and a bottom surface in contact with the wafer; forming a conductive body above the top surface of the insulating layer; forming a first coating region extending around and above the conductive body, in contact with the conductive body, and in contact with the top surface of the insulating layer in correspondence of a bottom surface of the first coating region; applying a thermal treatment to the wafer in order to modify a residual stress of the first coating region, forming a gap between the bottom surface of the first coating region and the top surface of the insulating layer; forming, after applying the thermal treatment, a second coating region extending around and above the first coating region, filling said gap and completely sealing the first coating region.

Abstract: In accordance with embodiments, methods and systems for utilizing multiple threshold checkers are provided. A range sensor collects measurement data. The range sensor examines the measurement data based on multiple threshold checkers to determine satisfaction of a trigger condition. In response to the satisfaction of the trigger condition, the range sensor provides the measurement data to a host computing device of the range sensor.

Abstract: An analysis unit formed by an analysis body housing an analysis chamber and having a sample inlet and a supply channel configured to fluidically connect the sample inlet to the analysis chamber. Dried assay reagents are arranged in the analysis chamber and are contained in an alveolar mass. For instance, the alveolar mass is a lyophilized mass formed by excipients and by assay-specific reagents.

Abstract: System, method, and circuitry for utilizing a synchronization message to create fixed transmission windows for multiple priority data in half-duplex communication systems. A first computing device includes a first master controller and a first slave radio, and a second computing device includes a second slave controller and a second master radio. The first controller and the second radio may share a transmit mode during a transmission window, and the first radio and the second controller radio may share a receive mode during that same transmission window, which are defined by the synchronization message. The first controller can transmit outbound data to the first radio, the second radio can transmit outbound data to the second controller, and the second radio can transmit inbound data to the first radio during this transmission window.

Abstract: The present disclosure relates to a circuit for testing a random number generator adapted to delivering a series of random bits and comprising at least one test unit configured to detect a defect in the series of random bits, said test circuit being adapted to verifying whether, after the detection of a first defect by the test unit, the number of random bits, generated by the random number generator without the detection of a second defect by said unit test, is smaller than a first threshold.

Abstract: A manufacturing method of an anchorage element of a passivation layer, comprising: forming, in a semiconductor body made of SiC and at a distance from a top surface of the semiconductor body, a first implanted region having, along a first axis, a first maximum dimension; forming, in the semiconductor body, a second implanted region, which is superimposed to the first implanted region and has, along the first axis, a second maximum dimension smaller than the first maximum dimension; carrying out a process of thermal oxidation of the first implanted region and second implanted region to form an oxidized region; removing said oxidized region to form a cavity; and forming, on the top surface, the passivation layer protruding into the cavity to form said anchorage element fixing the passivation layer to the semiconductor body.

Abstract: The device has a first support element forming a first thermal dissipation surface and carrying a first power component; a second support element forming a second thermal dissipation surface and carrying a second power component, a first contacting element superimposed to the first power component; a second contacting element superimposed to the second power component; a plurality of leads electrically coupled with the power components through the first and/or the second support elements; and a thermally conductive body arranged between the first and the second contacting elements. The first and the second support elements and the first and the second contacting elements are formed by electrically insulating and thermally conductive multilayers.

Abstract: A method of producing electronic components including at least one circuit having coupled therewith electrical connections including metallic wire bondable surfaces encased in a packaging, the method including bonding stud bumps, in particular copper stud bumps, at determined areas of said wire bondable surfaces.

Abstract: Method to provide a TOF estimate by a TOF device. The method comprises: generating an electric echo signal indicative of an ultrasonic echo signal returned by a target body by the ultrasonic source signal; determining an envelope signal indicative of an envelope of the electric echo signal; generating a first TOF estimate by processing the electric echo signal; determining an envelope signal portion of the envelope signal based on a non-PSOA hyperparameter; and generating a second TOF estimate by processing the envelope signal portion through PSOA, the second TOF estimate having a measurement accuracy value greater than that of the first TOF estimate. PSOA is optimized based on a PSOA hyperparameter set. The non-PSOA hyperparameter and the PSOA hyperparameter set are selected among a plurality of choices based on the first TOF estimate, so as to obtain the second TOF estimate which has greater accuracy than the first TOF estimate.

Abstract: A power device for surface mounting has a leadframe including a die-attach support and at least one first lead and one second lead. A die, of semiconductor material, is bonded to the die-attach support, and a package, of insulating material and parallelepipedal shape, surrounds the die and at least in part the die-attach support and has a package height. The first and second leads have outer portions extending outside the package, from two opposite lateral surfaces of the package. The outer portions of the leads have lead heights greater than the package height, extend throughout the height of the package, and have respective portions projecting from the first base.