Abstract: A random access memory (RAM) includes an array of arranged in rows and columns. The rows of the storage elements correspond to respective memory locations of the RAM. The storage elements of a row have a common gated-clock input and respective data inputs, and each row of the array of storage elements includes a plurality of D type latches. In operation, an address input of the RAM receives a memory address identifying a memory location in the RAM. Clock gating circuitry of the RAM, generates respective gated-clock signals for the rows of the array of storage elements based on the memory address received at the address input. Memory operation are performed using storage elements of the array based on the gated-clock signals.

Abstract: A power transmitter includes: a first switch coupled between a first node and a reference voltage node; a second switch configured to be coupled between a power supply and the first node; a coil and a capacitor coupled in series between the first node and the reference voltage node; a first sample-and-hold (S&H) circuit having an input coupled to the first node; and a timing control circuit configured to generate a first control signal, a second control signal, and a third control signal that have a same frequency, where the first control signal is configured to turn ON and OFF the first switch alternately, the second control signal is configured to turn ON and OFF the second switch alternately, and where the third control signal determines a sampling time of the first S&H circuit and has a first pre-determined delay from a first edge of the first control signal.

Abstract: Embodiments are directed towards a hardware accelerator engine that supports efficient mapping of convolutional stages of deep neural network algorithms. The hardware accelerator engine includes a plurality of convolution accelerators, and each one of the plurality of convolution accelerators includes a kernel buffer, a feature line buffer, and a plurality of multiply-accumulate (MAC) units. The MAC units are arranged to multiply and accumulate data received from both the kernel buffer and the feature line buffer. The hardware accelerator engine also includes at least one input bus coupled to an output bus port of a stream switch, at least one output bus coupled to an input bus port of the stream switch, or at least one input bus and at least one output bus hard wired to respective output bus and input bus ports of the stream switch.

Abstract: A method includes preserving custom objects and system objects of an application during an operative system update operation in a secure element. The custom objects and system objects are saved. The application is uninstalled and a new instance of the application is created. The saved custom objects and the saved system objects are recovered, and the new instance of the application is updated with the recovered custom objects and system objects. Saving a system object includes acquiring information content of fields of the system object, encoding and storing the information content into a data serialization format in a reserved area of a non-volatile memory of the secure element. Recovering the saved system object includes reading and decoding the encoded information content from the reserved area of the non-volatile memory of the secure element. The system object is recovered using the obtained information content of the fields.

Abstract: The present disclosure is directed to a sensor die with an embedded light sensor and an embedded light emitter as well as methods of manufacturing the same. The light emitter in the senor die is surrounded by a resin. The sensor die is incorporated into semiconductor device packages as well as methods of manufacturing the same. The semiconductor device packages include a first optically transmissive structure on the light sensor of the sensor die and a second optically transmissive structure on the light emitter of the sensor die. The first optically transmissive structure and the second optically transmissive structure cover and protect the light sensor and the light emitter, respectively. A molding compound is on a surface of a sensor die and covers sidewalls of the first and second optically transmissive structures on the sensor die.

Abstract: An electrode structure includes a pad of conductive material, and a conductive strip having a first end physically and electrically coupled to the pad. The pad includes an annular element internally defining a through opening. The first end of the conductive strip is physically and electrically coupled to the annular element by a transition region so that, when the conductive strip undergoes expansion by the thermal effect, a stress spreads from the conductive strip to the annular element by the transition region.

Abstract: Radiation sensor including a detection assembly and a chopper assembly, which are mechanically coupled to delimit a main cavity; and wherein the chopper assembly includes: a suspended movable structure, which extends in the main cavity; and an actuation structure, which is electrically controllable to cause a change of position of the suspended movable structure. The detection unit includes a detection structure, which faces the main cavity and includes a number of detection devices. The suspended movable structure includes a first shield of conductive material, which shields the detection devices from the radiation, the shielding of the detection devices being a function of the position of the suspended movable structure.

Abstract: The present description concerns a device including phase-change memory cells, each memory cell including a first resistive element in lateral contact with a second element made of a phase-change material.

Abstract: A device includes one or more inertial sensors and fusion circuitry coupled to the one or more inertial sensors. The inertial sensors, in operation, generate inertial sensor data with respect to a plurality of axes of movement. The fusion circuitry, in a polar fusion mode of operation, applies a plurality of polar rotation operations to the generated inertial sensor data to rotate the generated inertial sensor data onto an axis of the plurality of axes of movement. A fused data signal is generated based on a result of the plurality of polar rotation operations. The plurality of inertial sensors may include bone-conduction sensors.

Abstract: An HEMT includes: a heterostructure; a dielectric layer on the heterostructure; a gate electrode, which extends throughout the thickness of the dielectric layer; a source electrode; and a drain electrode. The dielectric layer extends between the gate electrode and the drain electrode and is absent between the gate electrode and the source electrode. In this way, the distance between the gate electrode and the source electrode can be designed in the absence of constraints due to a field plate that extends towards the source electrode.

Abstract: A system on chip includes a programmable logic array. The system on chip also includes a signal conditioner coupled to a data input of the programmable logic array and configured to condition a data signal prior to processing the data signal with the programmable logic array. The signal conditioner can selectively condition the signal by one or both of synchronizing the data signal with a clock signal of the programmable logic array and generating a pulse from the data signal with an edge detector.

Abstract: In at least one embodiment, a Geiger-mode avalanche photodiode, including a semiconductor body, is provided. The semiconductor body includes a semiconductive structure and a front epitaxial layer on the semiconductive structure. The front epitaxial layer has a first conductivity type. An anode region having a second conductivity type that is different from the first conductivity type extends into the front epitaxial layer. The photodiode further includes a plurality of gettering regions in the semiconductive structure.

Abstract: An embodiment voltage converter includes a first transistor connected between a first node of the converter and a second node configured to receive a power supply voltage, a second transistor connected between the first node and a third node configured to receive a reference potential, a first circuit configured to control the first and second transistors, and a comparator configured to compare a first voltage with a threshold, the first voltage being equal, during a first period, to a first increasing ramp and, during a second period, to a second decreasing ramp, the threshold having a first value during the first period and a second value during the second period, the first and second values being variable.

Abstract: A semiconductor MOS device having an epitaxial layer with a first conductivity type formed by a drain region and by a drift region. The drift region accommodates a plurality of first columns with a second conductivity type and a plurality of second columns with the first conductivity type, the first and second columns alternating with each other and extending on the drain region. Insulated gate regions are each arranged on top of a respective second column; body regions having the second conductivity type extend above and at a distance from a respective first column, thus improving the output capacitance Cds of the device, for use in high efficiency RF applications.

Abstract: An integrated circuit includes a plurality of flip-flops and a global reset network for resetting the flip-flops. The integrated circuit includes a synchronous clock delay circuit that delays, responsive to a global reset signal, a transition in a clock signal provided to the flip-flops. The delay in the transition of the clock signal ensures that all of the flip-flops receive the global reset signal within a same delayed clock cycle and that the flip-flops do not receive the global reset signal during a rising or falling edge of the clock signal.

Abstract: A thermographic sensor is proposed. The thermographic sensor includes a plurality of sensing elements each comprising at least one thermo-couple. The thermographic sensor is integrated on a semiconductor on insulator body that is patterned to define a grid suspended from a substrate; for each sensing element, the grid has a frame with the cold joint of the thermo-couple, a plate with the hot joint of the thermo-couple and one or more arms sustaining the plate from the frame. The frames include one or more conductive layers of thermally conductive material for thermally equalizing the cold joints with the substrate. Moreover, each sensing element may also include a processing circuit for the thermo-couple that is integrated on the corresponding frame. A thermographic device including the thermographic sensor and a corresponding signal processing circuit, and a system including one or more thermographic devices are also proposed.

Abstract: A battery management system includes: a controller; a master battery management integrated circuit (BMIC) device coupled to the controller and configured to communicate with the controller through a standard Serial Peripheral Interface (SPI) protocol; and a first slave BMIC device and a second slave BMIC device that are connected in a daisy chain configuration and communicating through Isolated SPI interfaces, where the first slave BMIC device is coupled to the master BMIC through an Isolated SPI interface, where the Isolated SPI interface uses a differential signal comprising a positive signal and a complementary negative signal, where a bit frame of the positive signal includes a bit period followed by an idle period having a same duration as the bit period, where the first slave BMIC device and the second slave BMIC device are configured to be coupled to a first battery pack and a second battery pack, respectively.

Abstract: Capacitive, MEMS-type acoustic transducer, having a sound collection part and a transduction part. A substrate region surrounds a first chamber arranged in the sound collection part and open towards the outside; a fixed structure is coupled to the substrate region; a cap region is coupled to the fixed structure. A sensitive membrane is arranged in the sound collection part, is coupled to the fixed structure and faces the first chamber. A transduction chamber is arranged in the transduction part, hermetically closed with respect to the outside and accommodates a detection membrane. An articulated structure extends between the sensitive membrane and the detection membrane, through the walls of the transduction chamber. A fixed electrode faces and is capacitively coupled to the detection membrane. Conducive electrical connection regions extend above the substrate region, into the transduction chamber.

Abstract: A method to drive a digital to analog converter (DAC), the method including setting a reference current for the DAC with a reference current source, a base voltage being responsive to changes in a reference voltage at a reference node coupled with the reference current source; sensing a change in the reference voltage; and adaptively steadying the base voltage based on the change in the reference voltage to maintain proportionality between an output current of the DAC and the reference current.

Abstract: A method for manufacturing a SiC-based electronic device, that includes implanting, at a front side of a solid body of SiC having a conductivity of N type, dopant species of P type, thus forming an implanted region that extends in depth in the solid body starting from the front side and has a top surface co-planar with said front side; and generating a laser beam directed towards the implanted region in order to generate heating of the implanted region at temperatures comprised between 1500° C. and 2600° C. so as to form an ohmic contact region including one or more carbon-rich layers, for example graphene and/or graphite layers, in the implanted region and, simultaneously, activation of the dopant species of P type.