Abstract: An error-correction code memory includes memory locations for storing data. The memory is programmed to store one or more intentionally invalid words. Testing of an error correction circuit for the memory is performed by accessing the one or more intentionally invalid words and performing an error detection and error correction operation.

Abstract: First and second memory arrays have common word lines driven by a row decoder in response to a row address. A first word line encoder associated with the first memory array encodes signals on the word lines to generate a first encoded value, and a second word line encoder associated with the second memory array encodes signals on the word lines to generate a second encoded value. Comparison circuitry compares the first encoded value to a first expected value (e.g., a first portion of the row address) and compares the second encoded value to a second expected value (e.g., a second portion of the row address). An error flag is asserted to indicate presence of a word line fault based upon a lack of match between the first encoded value and the first expected value and/or a lack of match between the second encoded value and the second expected value.

Abstract: A sensor is driven at a first heating power value. The sensor generates a sensing signal that is indicative of a sensed entity. A possible onset of a sensor contamination condition is detected as a function of the sensing signal generated by the sensor. If such detecting fails to indicate onset of a sensor contamination condition, the sensor continues to be driven at the first heating power value. However, if such detecting indicates onset of a sensor contamination condition, a protection mode is activated. In the protection mode, the sensor is driven at a second heating power value for a protection interval, where the second heating power value is lower than the first heating power value. Furthermore, the operation may refrain from supplying power to the sensor for a further protection interval, wherein the further protection interval is longer than the protection interval.

Abstract: A light sensor includes a first pixel and a second pixel. Each pixel has a photoconversion area. A band-stop Fano resonance filter is arranged over the first pixel. The second pixel includes no Fano resonance filter. Signals output from the first and second pixels are processed to determine information representative of the quantity of light received by the light sensor during an illumination phase in a rejection band of the band-stop Fano resonance filter.

Abstract: A circuit is operated by receiving an input reference signal at an input node, determining a scaling ratio based on the input reference signal, generating a digital input signal as a function of the determined scaling ratio, converting the digital input signal into an analog signal that is a scaled replica of the input reference signal, and providing the analog signal at an output node of the circuit and then, after a duration of time, coupling the input reference signal to the output node.

Abstract: A method for manufacturing electronic chips includes forming, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, trenches laterally separating the integrated circuits. At least one metal connection pillar per integrated circuit is deposited on the side of the upper face of the substrate, and a protective resin extends in the trenches and on an upper face of the integrated circuits. The method further includes forming, from an upper face of the protective resin, openings located across from the trenches and extending over a width greater than or equal to that of the trenches, so as to clear a flank of at least one metal pillar of each integrated circuit. The integrated circuits are separated into individual chips by cutting.

Abstract: A hybrid coupler operating in a power divider mode includes two inputs, two outputs, a capacitive module coupled between the inputs and the outputs or on each input and each output. The capacitive module has an adjustable capacitive value making it possible to adjust the central frequency. A calibration method includes: delivering a first reference signal having a first reference frequency on the first input of the hybrid coupler, measuring the peak value of a first signal delivered to the first output of the coupler and measuring the peak value of a second signal delivered to the second output of the coupler. The two peak values are compared and an adjustment of the capacitive value of the capacitive module is made until an equality of the peak values is obtained to within a tolerance.

Abstract: Various embodiments provide optical lenses that include phase shift layers that transmit incident light with four or more distinct phase quantizations. In one embodiment, a lens includes a substrate, a first immersion material layer on the substrate, and a plurality of anti-reflective phase shift layers on the first immersion material layer. The phase shift layers define a first anti-reflective phase shift region that transmits received light without a phase shift, a second anti-reflective phase shift region configured to transmit the received light with a first phase shift, a third anti-reflective phase shift region configured to transmit the received light with a second phase shift, and a fourth anti-reflective phase shift region configured to transmit the received light with a third phase shift. The first, second, and third phase shifts are different from one another.

Abstract: A power supply interface includes a first switch that couples an input terminal to an output terminal. A voltage dividing bridge is coupled to receive a supply potential. A comparator has a first input connected to a first node of the bridge and a second input configured to receive a constant potential. A digital-to-analog converter generates a control voltage that is selectively coupled by a second switch to a second node of the bridge. A circuit control controls actuation of the second switch based on operating mode and generates a digital value input to the converter based on a negotiated set point of the supply potential applied to the input terminal.

Abstract: A method for manufacturing electronic chips includes depositing, on a side of an upper face of a semiconductor substrate, in and on which a plurality of integrated circuits has been formed, a protective resin. The method includes forming, in the protective resin, at least one cavity per integrated circuit, in contact with an upper face of the integrated circuit. Metal connection pillars are formed by filling the cavities with metal. The integrated circuits are separated into individual chips by cutting the protective resin along cut lines extending between the metal connection pillars.

Abstract: In various embodiments, the present disclosure provides semiconductor devices, packages, and methods. In one embodiment, a device includes a die pad, a lead that is spaced apart from the die pad, and an encapsulant on the die pad and the lead. A plurality of cavities extends into at least one of the die pad or the lead to a depth from a surface of the at least one of the die pad or the lead. The depth is within a range from 0.5 ?m to 5 ?m. The encapsulant extends into the plurality of cavities. The cavities facilitate improved adhesion between the die pad or lead and the encapsulant, as the cavities increase a surface area of contact with the encapsulant, and further increase a mechanical interlock with the encapsulant, as the cavities may have a rounded or semi-spherical shape.

Abstract: A substrate and a covering structure coupled to the substrate form a chamber. The chamber houses an emitter configured to emit a radiation, a resonant reflector, a detector, and a fixed reflector. First and second windows extend through the covering structure. The emitter, the first reflector and the second reflector are reciprocally arranged such that radiation emitted from the emitter is reflected by the fixed reflector towards the MEMS reflector for further reflection towards the first window to form an output signal. The detector and the second window are reciprocally arranged such that an incoming radiation passing through the second window is received by the detector. The electronic module can be used for a 3D sensing application.

Abstract: A detection device includes a pressure sensor, which provides a pressure signal indicative of an ambient pressure in an operating environment. An electrostatic-charge-variation sensor provides a charge-variation signal indicative of a variation of electrostatic charge associated with the operating environment, and processing circuitry is coupled to the pressure sensor and to the electrostatic-charge-variation sensor so as to receive the pressure signal and the charge-variation signal, and jointly processes the pressure signal and the charge-variation signal for detecting a variation between a first operating environment and a second operating environment for the detection device. The second operating environment is different from the first operating environment.

Abstract: An optoelectronic device includes an emitter of light rays and a receiver of light rays. The emitter is encapsulated in a transparent block. An opaque conductive layer is applied to a top surface and a side surface of the transparent block. The receiver is mounted to the opaque conductive layer at the top surface. An electrical connection is made between the receiver and the opaque conductive layer. A conductive strip is also mounted to the side surface of the transparent block and isolated from the opaque conductive layer. A further electrical connection is made between the receiver and the conductive strip.

Abstract: A system and method for wireless charging a wireless earbud. The wireless earbud having a body that includes a passive magnetic shield and a coil. The coil is wound around a portion of the body comprising the passive magnetic shielding. The wireless earbud receiving wireless energy in response to the placement of the body within an electromagnetic field, which results in the charging of a battery of the wireless earbud.

Abstract: A system includes a plurality of items of master equipment, each having a programing interface, and a plurality of slave equipment. An interconnect circuit is coupled between the items of master equipment and the items of slave equipment. Each transaction is assigned an attribute capable of taking on at least two attribute values corresponding to at least two states for the master equipment. Each item of slave equipment is associated with an identifier capable of taking on at least two values corresponding respectively to at least two properties for the slave equipment. Each item of master equipment automatically inherits the property of its programing interface. A filtering circuit is configured to, in the presence of a transaction intended for an item of slave equipment, compare the corresponding attribute value with an identifier value of the intended slave equipment and reject or not reject the transaction based on the comparison.

Abstract: The disclosure relates to microbattery devices and assemblies. In an embodiment, a device includes a plurality of microbatteries, a first flexible encapsulation film, and a second flexible encapsulation film. Each of the microbatteries includes a first contact terminal and a second contact terminal spaced apart from one another. The first flexible encapsulation film includes a first conductive layer electrically coupled to the first contact terminal of each of the microbatteries, and a first insulating layer on the first conductive layer. The second flexible encapsulation film includes a second conductive layer electrically coupled to the second contact terminal of each of the microbatteries, and a second insulating layer on the second conductive layer.

Abstract: A semiconductor substrate has a front face and a back face. A first contact and a second contact, spaced apart from each other, are located on the front face. An electrically conductive wafer is located on the back face. A detection circuit is configured to detect a thinning of the substrate from the back face. The detection circuit including a measurement circuit that takes a measurement of a resistive value of the substrate between said at least one first contact, said at least one second contact and said electrically conductive wafer. Thinning is detected in response to the measured resistive value.

Abstract: A driver circuit for a resonant converter includes a comparator that generates a first control signal indicating when a resonant current changes sign. A first ramp generator circuit outputs a first ramp signal, and a comparison circuit determines whether the first ramp signal reaches a reference threshold. The driver circuit drives a half-bridge via drive signals during consecutive first second switching semi-periods, each of which ends when the comparison circuit indicates the first ramp signal has reached a reference threshold. A control circuit generates in each of the first and the second switching semi-periods control signals indicating a first interval and a second interval. A correction circuit modifies the first ramp signal to have a first gradient value during the first interval and a second gradient value during the second interval. Alternatively, the correction circuit modifies a reference threshold by adding a second ramp signal to an initial threshold value.

Abstract: First and second n-channel FETs are connected in series between first and second terminals with an intermediate switching node. First and second driver circuits drive gates of the first and second n-channel FETs, respectively, in response to drive signals. The first driver circuit does not implement slew-rate control. A first resistor and capacitor are connected in series between the output of the first driver circuit and an intermediate node. A first electronic switch is connected between the intermediate node and the first terminal. A second electronic switch is connected between the intermediate node and the gate terminal of the first n-channel FET. A second resistor and a third electronic switch are connected in series between the gate terminal of the first n-channel FET and the switching node. A control circuit generates the drive signals and a first, second and third control signal for the first, second and third electronic switch.