Abstract: A method and system for managing the power supply of a component and of a memory cooperating with the component are disclosed. The component and the memory are powered with a first variable power supply source having a first power supply voltage level greater than a minimum operating voltage of the memory. When a voltage level of the first power supply source drops and reaches a threshold that is greater than or equal to the minimum operating voltage of the memory, the power supply of the memory is toggled to a second power supply source having a second voltage level that is greater than or equal to the minimum operating voltage of the memory.

Abstract: In an embodiment, a channel estimator includes first and second stages. The first stage is configurable to generate an observation scalar for a communication path of a communication channel, and the second stage is configurable to generate channel-estimation coefficients in response to the first observation scalar. For example, such a channel estimator may use a recursive algorithm, such as a VSSO Kalman algorithm, to estimate the response of a channel over which propagates an OFDM signal that suffers from ICI due to Doppler spread. Such a channel estimator may estimate the channel response more accurately, more efficiently, with a less-complex algorithm, and with less-complex software or circuitry, than conventional channel estimators. Furthermore, such a channel estimator may be able to dynamically account for changes in the number of communication paths that compose the channel, changes in the delays of these paths, and changes in the signal-energy levels of these paths.

Abstract: A process is described for integrating two closely spaced thin films without deposition of the films through deep vias. The films may be integrated on a wafer and patterned to form a microscale heat-trimmable resistor. A thin-film heating element may be formed proximal to a thin-film resistive element, and heat generated by the thin-film heater can be used to permanently trim a resistance value of the thin-film resistive element. Deposition of the thin films over steep or abrupt topography is minimized by using a process in which the thin films are deposited in a sequence that falls between depositions of thick metal contacts to the thin films.

Abstract: The present disclosure provides a system and method for relieving stress and providing improved heat management in a 3D chip stack of a multichip package. A stress relief apparatus is provided to allow the chip stack to adjust in response to pressure, thereby relieving stress applied to the chip stack. Additionally, improved heat management is provided such that the chip stack adjusts in response to thermal energy generated within the chip stack to remove heat from between chips of the stack, thereby allowing the chips to operate as desired without compromising the performance of the chip stack.

Abstract: The present disclosure provides a system and method for detecting motion vectors in an image frame using a recursive hierarchical process with a non-rasterized vector-scanning motion to reduce erroneous motion vectors in an image frame of a digital video sequence. In general, a resolution hierarchy is generated for an image frame, wherein the resolution hierarchy comprises the original image frame and one or more copy image frames each having a different, lower resolution than the original image frame. Each image frame in the hierarchy is partitioned into image patches disposed in columns and rows, and the image patches are scanned in a non-rasterized motion to detect motion vectors in each image patch. The disclosed system and method provides faster convergence and improved accuracy by converging motion vectors in multiple directions and minimizing erroneous motion vectors in the image sequence.

Abstract: A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block forming an anode. The first block and the second block are supported on the substrate, and are separated from each other by a channel insulating zone also supported on the substrate. A gate dielectric zone is supported on at least the channel insulating zone, and a gate is supported on the gate dielectric zone.

Abstract: A processing system includes a plurality of processing resources capable of executing a plurality of objects. The objects include a client object and one or more server objects. The client object is capable of requesting a service provided by at least one of the one or more server objects. The processing system also includes at least one hardware engine capable of receiving a request for the service from the processing resource executing the client object, formatting one or more messages associated with the requested service, and communicating the one or more messages to the processing resource executing at least one of the one or more server objects that provides the requested service.

Abstract: The invention relates to microelectromechanical systems (MEMS), and more particularly, to MEMS switches using magnetic actuation. The MEMS switch may be actuated with no internal power consumption. The switch is formed in an integrated solid state MEMS technology. The MEMS switch is micron and/or nanoscale, very reliable and accurate. The MEMS switch can be designed into various architectures, e.g., a cantilever architecture and torsion architecture. The torsion architecture is more efficient than a cantilever architecture.

Abstract: An analog-digital converter for converting an analog signal into a digital signal includes a first configuration register for configuring a first group of channels and a second configuration register for configuring a second group of channels. The conversion result of the channels of the first group is transferred to a memory via a direct memory access. Each channel of the second group of channels has an associated respective data register and the conversion results of the channels of the second group are stored in the respective data registers.

Abstract: A system comprises a memory storing data at addresses associated with pixels in images, each address being linked by a function to coordinates of a pixel in an ordered image reference frame, a device for processing the data associated with the pixels, where a pixel being processed is referenced by an associated vector relative to a reference pixel, and an interface device providing data to the processing device. A data request indicates a vector associated with a pixel being processed. The coordinates of the reference pixel are determined by applying the function to an address associated with the reference pixel. Next the coordinates of the pixel being processed are obtained based on the coordinates of the reference pixel and on the vector. Then the address of the data associated with the pixel being processed is determined by applying the inverse function of the function to the coordinates of the pixel being processed.

Abstract: A half bridge switching dc-dc converter an input dc voltage to an output dc voltage. The converter includes a switching circuit for receiving the input dc voltage and generating a periodic square wave voltage oscillating from a high value corresponding to the input dc voltage to a low value corresponding to a reference voltage. The periodic square wave voltage oscillates at a main frequency with a main duty cycle equal to about 50% when the converter operates in a steady state. The converter further includes a conversion circuit for providing the output dc voltage from the square wave voltage based on the main frequency and on the main duty cycle. The converter still further comprises a switching control circuit controlling the switching circuit for temporarily varying the main duty cycle during at least one period of the square wave after a power on of the converter.

Abstract: A current sensing circuit for a pulse width modulation (PWM) application may include first and second input terminals to be coupled to ends of a sensing resistance, an output terminal, and first and second internal circuit nodes. The current sensing circuit further may include an input block comprising a first transconductance amplifier to be coupled to a supply voltage. The first transconductance amplifier may be coupled to the first and second input terminals and to the first and second internal circuit nodes. The current sensing circuit may also include an amplifier block comprising an amplifier to be coupled to a reference voltage, and coupled to the first and second internal circuit nodes and the output terminal, and a feedback block comprising a second transconductance amplifier to be coupled to the supply voltage and being coupled to the output terminal and the first and second internal circuit nodes.

Abstract: An integrated circuit includes a substrate of semiconductive material, a first circuit environment made from the substrate which includes an output terminal and a first pair of power supply terminals for receiving a first power supply voltage applicable between the terminals. The integrated circuit also includes a second circuit environment made from the semiconductor substrate which includes an input terminal electrically coupled to the output terminal and also includes a second pair of power supply terminals for receiving a second power supply voltage applicable between the second pair of terminals of said second pair. The circuit further includes a device providing protection from electrostatic discharges which includes an integrated resistive device coupled between the input and output terminals.

Abstract: Programs having a given instruction-set architecture are executed on a multiprocessor system comprising a plurality of processors, for example of a VLIW type, each of said processors being able to execute, at each processing cycle, a respective maximum number of instructions. The instructions are compiled as instruction words of given length executable on a first processor. At least some of the instruction words of given length are converted into modified-instruction words executable on a second processor. The operation of modifying comprises in turn at least one operation chosen in the group consisting of: splitting the instruction words into modified-instruction words; and entering no-operation instructions in the modified-instruction words.

Abstract: Method for manufacturing a semiconductor pressure sensor, wherein, in a silicon substrate, trenches are dug and delimit walls; a closing layer is epitaxially grown, that closes the trenches at the top and forms a suspended membrane; a heat treatment is performed so as to cause migration of the silicon of the walls and to form a closed cavity underneath the suspended membrane; and structures are formed for transducing the deflection of the suspended membrane into electrical signals.

Abstract: An embodiment of a discharge circuit comprises an output circuit with one output connected to an electrical load to absorb a discharge current given by the load when a logic signal commands a discharge of the load. The discharge circuit also comprises a control circuit to give the output circuit an appropriate control signal so that a slope of an output potential of the output circuit diminishes gradually when the logic signal commands a discharge of the load. Limiting the slope of the output potential gradually (and not suddenly) may limit the electromagnetic radiation generated by these variations.

Abstract: A method manufactures a vertical power MOS transistor on a semiconductor substrate comprising a first superficial semiconductor layer of a first conductivity type, comprising: forming trench regions in the first semiconductor layer, filling in said trench regions with a second semiconductor layer of a second conductivity type, to form semiconductor portions of the second conductivity type contained in the first semiconductor layer, carrying out an ion implantation of a first dopant type in the semiconductor portions for forming respective implanted body regions of said second conductivity type, carrying out an ion implantation of a second dopant type in one of the implanted body regions for forming an implanted source region of the first conductivity type inside one of the body regions, carrying out an activation thermal process of the first and second dopant types with low thermal budget suitable to complete said formation of the body and source regions.

Abstract: A frequency divider having a plurality of programmable latches connected in a feedback shift register configuration. A programmable latch of said plurality of latches comprises a program input to receive a program signal configured to select a polarity of the programmable latch among two opposite polarities. The frequency divider having a configuration module structured to provide at least the program signal to the program input to modify a divisor parameter of the frequency divider.

Abstract: The integrated circuit comprises an analog block and a digital block in and/or on the same substrate. At least part of a first integrated-circuit portion (BA2) corresponding to the analog block is produced in a native technology and a second integrated-circuit portion (BN2) corresponding to said digital block, is produced in a shrunk technological version associated with said native technology.

Abstract: A low profile chip scale module and method of making of the same. The low profile chip scale module includes embedded SMD and integrated EM shielding. An adhesive layer is arranged on a substrate, e.g., chip carrier. Dies and SMDs are arranged on the adhesive layer. An etched frame and molding is attached to the substrate. Inputs/outputs (I/O) are formed and the substrate is coated with a dielectric material. Metal lines and connections among bond pads are formed and another layer of dielectric material is applied as a protective layer. The substrate is cut into various predetermined sizes and a lens is attached to form the chip scale module.