Abstract: An embodiment of a resistor formed by at least one first portion and one second portion, electrically connected to one another and with different crystalline phases. The first portion has a positive temperature coefficient, and the second portion has a negative temperature coefficient. The first portion has a first resistivity, and the second portion has a second resistivity, and the portions are connected so that the resistor has an overall temperature coefficient that is approximately zero.

Abstract: A method for following hand movements in an image flow, includes receiving an image flow in real time, locating in each image in the received image flow a hand contour delimiting an image zone of the hand, extracting the postural characteristics from the image zone of the hand located in each image, and determining the hand movements in the image flow from the postural characteristics extracted from each image. The extraction of the postural characteristics of the hand in each image includes locating in the image zone of the hand the center of the palm of the hand by searching for a pixel of the image zone of the hand the furthest from the hand contour.

Abstract: The device for generating a reference current proportional to absolute temperature comprises processing means connected to the terminals of a core and designed to equalize the voltages across the terminals of the core, the core being designed to then be traversed by an internal current proportional to absolute temperature, and an output module designed to deliver to an output terminal the said reference current on the basis of the said internal current; the processing means comprise a self-biased amplifier possessing at least one first stage arranged according to a folded setup and comprising first PMOS transistors arranged in a setup of the common-gate type, and a feedback stage whose input is connected to the output of the amplifier and whose output is connected to the input of the first stage as well as to at least one terminal of the core.

Abstract: An electronic trimming circuit carries out a trimming operation on portions of an integrated device. The circuit includes N trimmable interconnected resistances, each connected in parallel to a respective shunt fuse. N trimming transistors are each connected to a respective one of the shunt fuses to force therethrough substantially the whole current flowing in the respective trimming transistor. N bias networks are each functionally connected to a control terminal of a respective one of the trimming transistors to directly bias an active junction thereof. An externally driven heating device is thermally coupled with the active junctions of the trimming transistors adapted to raise the temperature thereof.

Abstract: A circuit for generating a temperature-stable reference voltage, including, between two terminals of application of a D.C. voltage: a current source and at least two parallel branches, each comprising a resistive element and one or several transistors, the transistors being different form one another and the reference voltage being sampled between the terminals of said branches.

Abstract: Generating an adjustable bandgap reference voltage comprises generating a current proportional to absolute temperature comprising an equalization of the voltages across the terminals of a core designed to then be traversed by the said current proportional to absolute temperature, generating a current inversely proportional to absolute temperature, summing these two currents and generating said bandgap reference voltage on the basis of the said sum of currents; the said equalization comprises a connection across the terminals of the core of a first fed-back amplifier possessing at least one first stage arranged as a folded setup and comprising first PMOS transistors arranged according to a common-gate setup, and a biasing of the said first stage on the basis of the said current inversely proportional to absolute temperature, the said summation of the two currents being performed in the feedback stage of the first amplifier.

Abstract: An adjustable bandgap reference voltage comprises means for generating current proportional to absolute temperature comprising first means connected to terminals of a core and designed to equalize voltages across the terminals, means for generating a current inversely proportional to absolute temperature connected to the core, and an output module designed to generate the reference voltage; the first processing means comprise a first amplifier possessing a stage, biased by the current inversely proportional to absolute temperature, arranged according to a folded setup and comprising first PMOS transistors arranged according to a common-gate setup, and a stage whose input is connected to the amplifier output and whose output is connected to the first stage input and to a terminal of the core, the second generating means comprise a follower amplifier setup connected to a terminal of the core and separated from the first amplifier, the output module is connected to the feedback stage.

Abstract: Described herein are various principles for operating a transmitter circuit to reduce noise affecting a signal being generated and reducing jitter. In some embodiments, a circuit is operated in a way that switching occurs at or above a bit rate of transmission, such that at least one switch changes state at least for every bit. Operating the circuit in such a way leads to a switching rate that is above a resonant frequency of the circuit and prevents large oscillations and noise from being inserted into the signal and causing communication problems.

Abstract: An electronic system, an integrated circuit and a method for display are disclosed. The electronic system contains a first device, a memory and a video/audio compression/decompression device such as a decoder/encoder. The electronic system is configured to allow the first device and the video/audio compression/decompression device to share the memory. The electronic system may be included in a computer in which case the memory is a main memory. Memory access is accomplished by one or more memory interfaces, direct coupling of the memory to a bus, or direct coupling of the first device and decoder/encoder to a bus. An arbiter selectively provides access for the first device and/or the decoder/encoder to the memory based on priority. The arbiter may be monolithically integrated into a memory interface. The decoder may be a video decoder configured to comply with the MPEG-2 standard. The memory may store predicted images obtained from a preceding image.

Abstract: A decision feedback equalizer includes an input path for receiving a bitstream with inter-symbol interference, and a feedback signal path is coupled to the input path for correcting a sampled value of an incoming bit of the bitstream based on inter-symbol interference of a preceding bit. The feedback signal path includes a controllable delay circuit for receiving the preceding bit. A feedback path controller is coupled to the controllable delay circuit to regulate a delay introduced to the preceding bit. The delay is a function of an accumulated value of data of early-late events of a sampling instant of the bitstream for different data pulse patterns.

Abstract: The memory cell is of SRAM type with four transistors provided with a counter-electrode. It comprises a first area made from semiconductor material with a first transfer transistor and a first driver transistor connected in series, their common terminal defining a first electric node. A second transfer transistor and a second driver transistor are connected in series on a second area made from semiconductor material and their common terminal defines a second electric node. The support substrate comprises first and second counter-electrodes. The first and second counter-electrodes are located respectively facing the first and second semiconductor material areas. The first transfer transistor and second driver transistor are on a first side of a plane passing through the first and second electric nodes whereas the first driver transistor and second transfer transistor are on the other side of the plane.

Abstract: An integrated microelectromechanical structure is provided with: a driving mass, anchored to a substrate via elastic anchorage elements and moved in a plane with a driving movement; and a first sensing mass, suspended inside, and coupled to, the driving mass via elastic supporting elements so as to be fixed with respect to the driving mass in the driving movement and to perform a detection movement of rotation out of the plane in response to a first angular velocity; the elastic anchorage elements and the elastic supporting elements cause the detection movement to be decoupled from the driving movement. The elastic supporting elements are coupled to the first sensing mass at an end portion thereof, and the axis of rotation of the detection movement extends, within the first sensing mass, only through the end portion.

Abstract: The trimming circuit includes a plurality of trimmable resistances that may be coupled among them, each resistance being connected in parallel to a respective fuse. The trimming circuit allows burning any number of fuses according to a fixed trimming sequence using only one or two dedicated pins because it includes an input diode-connected transistor and a plurality of trimming transistors of different sectional area, each connected to force current throughout a respective one of the shunt fuses and coupled to the input diode-connected transistor such to mirror the current flowing therethrough. The fuses of the trimming circuit may be burnt by applying a trimming voltage to the diode-connected input transistor with a voltage generator connected between a dedicated pin of the circuit and a terminal at a reference potential, such to force a current therethrough as long as the mirrored currents flowing throughout the fuses burn them.

Abstract: The semiconductor device for protection from electrostatic discharges comprises several modules (MDi) for protection from electrostatic discharges comprising triggerable elements (TRi) coupled with triggering means, the said modules being connected between two terminals by the intermediary of a resistive network (R). A common semiconductor layer contacts all of the modules, each triggerable element (TRi) having at least one gate (GHi), and the triggering means comprise a single triggering circuit (TC) common to all of the triggerable elements and whose output is connected to the gates of all of the triggerable elements.

Abstract: An embodiment of a receiver includes signal- and data-recovery units. The signal-recovery unit is configured to recover a first component of a first signal that is received simultaneously with a second signal having a second component, the first and second components including approximately a frequency. And the data-recovery unit is configured to recover data from the first signal in response to the recovered first component. For example, such a receiver may be able to receive simultaneously, and over the same channel space, multiple orthogonal-frequency-division-multiplexed (OFDM) signals that include one or more of the same subcarrier frequencies, and to recover data from one or more of the OFDM signals despite the frequency overlap. A receiver with this capability may allow an increase in the effective bandwidth of the channel space, and thus may allow more devices (e.g., smart phones) to simultaneously share the same channel space.

Abstract: An electronic MEMS device is formed by a chip having with a main face and bonded to a support via an adhesive layer. A cavity extends inside the chip from its main face and is closed by a flexible film covering the main face of the chip at least in the area of the cavity. The support has a depressed portion facing the cavity and delimited by a protruding portion facing the main face of the chip. Inside the depressed portion, the adhesive layer has a greater thickness than the projecting portion so as to be able to absorb any swelling of the flexible film as a result of the expansion of the gas contained inside the cavity during thermal processes.

Abstract: Disclosed is a low drop-out voltage regulator circuit with a distributed output network coupled to a pixel array for use in image sensor circuitry. The regulator circuit comprises voltage regulating circuitry and a distributed output network, wherein the distributed output network comprises drive transistors disposed along and connected between a supply track and an output track. The spatial distribution of the drive transistors improves heat dissipation within the regulator circuit, and a combination of low current flow and regulated output voltage reduces IR drop across the output track. The improved heat dissipation increases device lifespan and performance, whereas the reduction in IR drop across the output track provides better pixel response, readout uniformity, and image quality.

Abstract: A current sensor includes input modules each including an amplifier having a first input coupled to a respective winding of a regulator; a transistor having a control input coupled to the amplifier output, a first terminal coupled to a second input of the operational amplifier, and a second terminal configured to provide a sense current representing an unbalance of a phase current with respect to an average current of a winding; a current generator configured to bias the transistor; and an output resistor coupling the first terminal to an intermediate node. An output stage includes an output amplifier having a first input coupled to the intermediate node, and an output transistor having a control terminal coupled to the output amplifier output, a first terminal coupled to a second input of the output amplifier, and a second terminal providing another sense current representing a total current of the regulator.

Abstract: A circuit comprises a frequency divider coupled to receive an oscillating signal generated by an oscillator and a division ratio and configured to divide the oscillating signal by the division ratio into a clock signal; a temperature compensation circuit configured to measure a temperature of the oscillator and generate a division ratio to be provided to the frequency divider and a first value on the basis of the measured temperature; and a control system configured to control connection between a calibration element and the oscillator based on the first value and the oscillating signal of the oscillator.

Abstract: An embodiment of a method is disclosed for encoding a digital video signal including a first video sequence and a second video sequence jointly forming a stereo-view digital video signal. The method includes: subjecting the first video sequence to discrete cosine transform, quantization and run-length coding to produce a sequence of blocks of non-zero digital levels representative of the first video sequence, subjecting the second video sequence to discrete cosine transform, quantization, run-length coding and variable length coding to produce digital messages representative of the second video sequence, merging the bits of the digital messages into the sequence of blocks of digital levels by substituting the bits of the digital messages for respective Least Significant Bits of e.g. the last digital level in the blocks representative of the first video sequence to produce an encoded digital video signal representative of the first video sequence and the second video sequence.