Abstract: A MOEMS apparatus for scanning an optical beam is formed from a double active layer silicon on insulator (DSOI) substrate that includes two active layers separated by an insulating layer. The apparatus includes an electro-static comb drive having a stator formed in a first of the two active layers and a rotor formed in a second of the two active layers. The electro-static comb drive is operative to impart a tilting motion to a micro-mirror formed in the second active layer. The MOEMS apparatus is designed such that: a) at least one of the distances created between a tooth belonging to the rotor and an adjacent tooth belonging to the stator is less than 7 ?m; and the aspect ratio of the apparatus is higher than 1:20.

Abstract: An oscillator comprises an inverter, with a resonator connected between an input and an output of the inverter. A transistor external to the inverter is connected in a current mirror mode with a transistor of the inverter so that the inverter's transistor copies the current of the external transistor. The external transistor has its drain terminal connected to the gate terminals of the inverter's transistor and of the external transistor. A current source is connected to the gate terminal of the inverter's transistor, and a switch is connected between the drain and gate terminals of the external transistor. Circuitry controls the switch so as to open the connection between the drain and gate terminals of the external transistor at the beginning of a start-up phase of the oscillator.

Abstract: A single-stage integrated circuit drives LED sources in a constant power mode to eliminate the need for LED current sensing, while reshaping the waveform of the inductor current near line zero crossing to achieve high power factor. The integrated circuit achieves substantially constant input power by maintaining a constant voltage at a power factor corrector controller through an input voltage feedforward system. Accordingly, the disclosed circuit provides a high power factor, high efficiency, simple, and cost-effective solution with substantially consistent input power for both isolated and non-isolated offline LED applications.

Abstract: A divider of an input multiphase signal by a given division factor so as to obtain an output multiphase signal, the divider having a circuit adapted to divide a first signal component of an input multiphase signal by an given division factor to obtain a first component of a output multiphase signal, and a plurality of N?1 devices including a first device adapted to sample the first component with a component of the input multiphase signal to obtain the component of the output multiphase signal corresponding to the one component of the input multiphase signal. Every other device of the plurality of N?1 devices is adapted to sample the component of the output multiphase signal of the preceding device with another component of the input multiphase signal, phase shifted by a further constant factor to obtain the corresponding component of the output multiphase signal.

Abstract: Fuel cells are formed in a single layer of conductive monocrystalline silicon including a succession of electrically isolated conductive silicon bodies separated by narrow parallel trenches etched through the whole thickness of the silicon layer. Semicells in a back-to-back configuration are formed over etch surfaces of the separation trenches. Each semicell formed on the etch surface of one of the silicon bodies forming an elementary cell in cooperation with an opposite semicell formed on the etch surface of the next silicon body of the succession, is separated by an ion exchange membrane resin filling the separation trench between the opposite semicells forming a solid electrolyte of the elementary cell. Each semicell includes a porous conductive silicon region permeable to fluids, extending for a certain depth from the etch surface of the silicon body, at least partially coated by a non passivable metallic material.

Abstract: Process for manufacturing a semiconductor power device, wherein a trench is formed in a semiconductor body having a first conductivity type; the trench is annealed for shaping purpose; and the trench is filled with semiconductor material via epitaxial growth so as to obtain a first column having a second conductivity type. The epitaxial growth is performed by supplying a gas containing silicon and a gas containing dopant ions of the second conductivity type in presence of a halogenide gas and occurs with uniform distribution of the dopant ions. The flow of the gas containing dopant ions is varied according to a linear ramp during the epitaxial growth; in particular, in the case of selective growth of the semiconductor material in the presence of a hard mask, the flow decreases; in the case of non-selective growth, in the absence of hard mask, the flow increases.

Abstract: The disclosure relates to a sense amplifier comprising a cascode transistor and means for biasing the cascode transistor, supplying a control voltage to a gate terminal of the cascode transistor. The means for biasing the cascode transistor comprise means for isolating the gate terminal of the cascode transistor from the output of the voltage generator during a first period of the precharge phase, so as to boost the bitline voltage, then for linking the gate terminal to the output of the voltage generator during a second period of the precharge phase. Application in particular to sense amplifiers for non-volatile memories.

Abstract: A low-pass filter includes an integrator having an adjustable unity frequency. The integrator includes a first input, first output and feedback loop between the first input and output of the integrator. The first input is connected to a branch that includes a first impedance, to which is applied a first input voltage of the low-pass filter. The feedback loop includes a second impedance and the first output of the integrator is the first output of the low-pass filter.

Abstract: An image sensor has a per-column ADC arrangement including first and second capacitors allowing a comparator circuit to perform correlated double sampling. The capacitors are continuously connected to, respectively, the analog pixel signal and a ramp signal without use of a hold operation. The comparator circuit comprises a differential input being connected to the junction of the two capacitors and being biased by a reference signal. The reference signal is preferably sampled and held from a reference voltage. The use of a differential input as first stage of the comparator addresses problems arising from ground voltage bounce when a large pixel array images a scene with low contrast. Connectivity of the differential input stage allows the ramp signal to see a constant capacitive load thus reduce image artifacts referred to as smear.

Abstract: Semiconducting device for protecting at least one node of an integrated circuit against electrostatic discharges, comprising a doublet of floating gate thyristors connected in parallel and head-to-foot, the two thyristors having respectively two distinct gates and a common gate formed by a common semiconducting layer, the anode of a first thyristor of the doublet and the cathode of the second thyristor of the doublet forming a first terminal of the doublet designed to be connected to a cold point and the cathode of the first thyristor of the doublet and the anode of the second thyristor of the doublet forming a second terminal of the doublet designed to be connected to the said node to be protected.

Abstract: A transducer converts energy coming from an energy source into an electrical signal for storage as electrical energy on a first storage element. A switch is selectively actuated to pass electrical energy from the first storage element to a second storage element. The selective actuation of the switch is driven by sensing electrical energy stored in the second storage element. The switch is closed when electrical energy in the second storage element is sensed to fall below a first threshold. The switch is opened when electrical energy in the second storage element is sensed to rise above a second threshold.

Abstract: A rectifier circuit includes a first, second, third and fourth parasitic diodes electrically connected to form a full-wave diode-bridge rectifier. A first switch and a second switch are connected in parallel, respectively, to the first and second parasitic diodes, and a third switch and a fourth switch connected in parallel, respectively, to the third and fourth parasitic diodes. A first biasing network is configured to drive in conduction the first and second switches, during turning-on of the rectifier circuit, using a first turning-on signal that is a function of the input signal. A second biasing network is configured to close the third and fourth switches, during turning-on of the rectifier circuit, using a second turning-on signal that is a function of the input signal.

Abstract: A biasing circuit may include an input configured to receive a supply voltage, a value of which is higher than a limit voltage. The biasing circuit may also include a control stage configured to generate first and second control signals with mutually complementary values, equal alternatively to a first value, in a first half-period of a clock signal, or to a second value, in a second half-period of the clock signal. The first and second values may be a function of the supply and limit voltages. The biasing circuit may also include a biasing stage configured to generate a biasing voltage as a function of the values of the first and second control signals. The first and second control signals may control transfer transistors for transferring the supply voltage to respective outputs, while the biasing voltage may be for controlling protection transistors to reduce overvoltages on the transfer transistors.

Abstract: Microelectronic chip including a semiconductor substrate; at least one area of its surface which is suitable to be electrically connected to a metal frame designed to accommodate the chip; at least one interconnect area formed by a copper-based conductive layer and comprising a connecting device, the interconnect area being connected to the area by a conductor, wherein the area is formed by a layer forming a copper diffusion barrier inserted between interconnect area and the substrate.

Abstract: A level-shifter circuit may include a pair of inputs which receive a first and a second low-voltage phase signal having a first voltage dynamic with a first maximum value. The level-shifter circuit may also include a pair of outputs which supply a first high-voltage phase signal and a second high-voltage phase signal, level-shifted with respect to the low-voltage signals and having a second voltage dynamic with a second maximum value, higher than the first maximum value. The level-shifter circuit may further include transfer transistors coupled between one of a first reference terminal and a second reference terminal, which are set at one of a first reference voltage and a second reference voltage, and the first output or second output. Protection elements may be coupled to a respective transfer transistor to protect from overvoltages between at least one of the corresponding conduction terminals and control terminals.

Abstract: A DC-DC converter independently supplies electrical loads. The converter includes a charge switch and a discharge switch connected between an input supply and a reference. An inductor has a first terminal connected between the charge switch and the discharge switch and a second terminal. Coupling switches are provided between the inductor second terminal and the electrical loads. An adaptive-control circuit acquires, during supply of each electrical load, a signal indicating the voltage value across the inductor and generates a first time interval as a function of the signal indicating the voltage value detected. Each electrical load is supplied during the first time interval, and completely discharged during a second time interval subsequent to the first time interval.

Abstract: An apparatus for displaying images. The apparatus comprises: an LCD panel comprising a plurality of pixels for displaying the images; and a backlight comprising a plurality of light sources. Each of the plurality of light sources is associated with one of a plurality of zones and each of the plurality of zones comprises a plurality of grid points. A controller coupled to the LCD panel and the backlight is configured to retrieve contour data associated with each of the plurality of light sources. The contour data is associated with a 3-D contour shape comprising a plurality of facets, each facet associated with at least one of the plurality of grids. The controller is configured to determine a brightness level of at least one pixel in a first grid based on a slope value associated with a first facet associated with the first grid.

Abstract: An enhanced sensitivity radio frequency (RF) front end circuit includes a transformer configured to convert a balanced transmit signal to an unbalanced transmit signal and to convert a second filtered receive signal to a balanced receive signal. A switch in a first state receives the unbalanced transmit signal from the transformer and transfers the unbalanced transmit signal to an amplifier circuit and receives an amplified transmit signal from the amplifier circuit and transfers the amplified transmit signal to a filter. In a second state, the switch receives a first filtered receive signal from the filter and transfers the first filtered receive signal to the amplifier circuit and receives a second filtered receive signal from the amplifier circuit and transfers the second filtered receive signal to the transformer.

Abstract: A memory system for use with a master-slave type bus such as an AHB bus has a memory, a bus interface to allow memory access from the bus, and a direct memory access interface to allow memory access from a DMA controller without occupying the bus. The system can reduce occupancy of the bus, it can allow dedicated DMA access protocols faster than the bus protocol to be used, and can remove or reduce the need for bus arbitration and associated circuitry and delays. An arbiter can arbitrate between the memory accesses and give priority to DMA accesses.

Abstract: Vertical dithering is performed for vertical droop compensation in image processing using Linear Feedback Shift Registers (LFSRs). Line memories are not used. A compensation circuit includes a signature reload input signal coupled to the input of five LFSRs. Each LFSR includes a signature store. The output of each LFSR provides a sequence output signal that is gated with a corresponding enable signal in a first logic circuit. The output of all of the first logic circuits are combined in a second logic circuit to provide a control signal output.