Patents Assigned to Sumco Corporation
  • Patent number: 11648574
    Abstract: Provided is a spray chamber including a sample introduction port portion into which a gas flow containing sample droplets that have been atomized by a nebulizer is introduced, a discharge port portion that discharges at least a part of the gas flow introduced into the sample introduction port portion to the outside, and a flow passage tube portion that has the sample introduction port portion on one end portion thereof and the discharge port portion on the other end portion thereof and serves as a flow passage for the introduced gas flow, wherein the flow passage tube portion includes a first tube portion having the discharge port portion on one end portion thereof and a second tube portion having the sample introduction port portion on one end portion thereof, the spray chamber includes a double tube portion.
    Type: Grant
    Filed: April 24, 2018
    Date of Patent: May 16, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Taisuke Mizuno, Kazumi Inagaki, Shin-ichiro Fujii
  • Publication number: 20230133472
    Abstract: A silicon wafer is provided in which a dopant is phosphorus, resistivity is from 0.5 m?·cm to 1.2 m?·cm, and carbon concentration is 3.0×1016 atoms/cm3 or more. The carbon concentration is decreased by 10% or more near a surface of the silicon wafer compared with a center-depth of the silicon wafer.
    Type: Application
    Filed: June 29, 2022
    Publication date: May 4, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Kohtaroh KOGA, Yasuhito NARUSHIMA, Naoya NONAKA, Toshiaki ONO, Masataka HOURAI
  • Publication number: 20230132859
    Abstract: A silicon wafer is provided in which a dopant is phosphorus, resistivity is 1.2 m?·cm or less, and carbon concentration is 3.5×1015 atoms/cm3 or more. The carbon concentration is decreased by 10% or more near a surface of the silicon wafer compared with a center-depth of the silicon wafer.
    Type: Application
    Filed: November 3, 2022
    Publication date: May 4, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Kohtaroh KOGA, Yasuhito NARUSHIMA, Naoya NONAKA
  • Patent number: 11640907
    Abstract: An epitaxial wafer that includes a silicon wafer and an epitaxial layer on the silicon wafer. The silicon wafer contains hydrogen that has a concentration profile including a first peak and a second peak. A hydrogen peak concentration of the first peak and a hydrogen peak concentration of the second peak are each not less than 1×1017 atoms/cm3.
    Type: Grant
    Filed: July 28, 2021
    Date of Patent: May 2, 2023
    Assignee: SUMCO CORPORATION
    Inventor: Ryosuke Okuyama
  • Patent number: 11639560
    Abstract: A deposit removing device disclosed herein removes a deposit that adheres to an exhaust pipe through which gas is exhausted from a chamber that manufactures a semiconductor crystal. The deposit removing device includes: a valve that opens and closes an exhaust outlet that communicates with the exhaust pipe; a sealing cover and a fixed table configured to store the valve, into which an inert gas is introduceable, and configured to isolate the exhaust outlet from the outside; and an exhaust outlet opening/closing portion that includes a cylinder for driving the valve and a cylinder for driving the sealing cover or the fixed table. The cylinder drives the valve to open and close the exhaust outlet, and the cylinder drives the sealing cover or the fixed table to introduce the atmosphere into the sealing cover.
    Type: Grant
    Filed: May 28, 2020
    Date of Patent: May 2, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Fukuo Ogawa, Takuya Yotsui, Koichi Maegawa
  • Patent number: 11634833
    Abstract: A production method of monocrystalline silicon includes: measuring an emissivity of an inner wall surface of a top chamber; and determining a target resistivity of monocrystalline silicon based on the emissivity measured in the measuring, thereby producing the monocrystalline silicon. In determining the target emissivity on a crystal center axis at a position for starting formation of a straight body of the monocrystalline silicon in the producing, when the emissivity is 0.4 or less, the target resistivity is determined to be less than a resistivity value of 3.0 m?·cm when the dopant is arsenic.
    Type: Grant
    Filed: November 19, 2021
    Date of Patent: April 25, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Shinichi Kawazoe, Toshirou Kotooka, Yuuji Tsutsumi
  • Patent number: 11628534
    Abstract: A silicon wafer single-side polishing method that can significantly improve the stepped minute defect occurrence rate is provided. The silicon wafer single-side polishing method comprises: a first polishing step of performing polishing on one side of a silicon wafer under a first polishing condition; and a second polishing step of performing polishing on the silicon wafer under a second polishing condition in which at least one of an applied pressure and a relative speed in the first polishing condition is changed, after the first polishing step, wherein a polishing rate ratio according to the first polishing condition is higher than a polishing rate ratio according to the second polishing condition.
    Type: Grant
    Filed: December 2, 2016
    Date of Patent: April 18, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Toshiharu Nakajima, Kazuaki Kozasa, Katsuhisa Sugimori, Syunya Kobuchi
  • Patent number: 11626331
    Abstract: Provided is a method of evaluating a silicon wafer manufacturing process for mass-producing multiple silicon wafers. Lifetime measurement to silicon wafers mass-produced in the silicon wafer manufacturing process is performed in different locations within a surface of each of the silicon wafers and multiple measurement values are obtained. The representative value is determined for each of the silicon wafers from the multiple measurement values. The determination threshold is obtained for each wafer group including multiple silicon wafers using the representative value for each of the silicon wafers included in the wafer group. Whether the wafer group includes a silicon wafer having a lifetime outlier determined on the basis of the determination threshold among the multiple measurement values obtained for each of the silicon wafers is determined, and whether the manufacturing process may cause a defective product to be produced is determined.
    Type: Grant
    Filed: July 2, 2018
    Date of Patent: April 11, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Shigeru Daigo, Shuhei Matsuda
  • Patent number: 11626492
    Abstract: Provided is a method of producing a semiconductor epitaxial wafer having enhanced gettering ability. The method of producing a semiconductor epitaxial wafer includes: a first step of irradiating a surface of a semiconductor wafer with cluster ions containing carbon, hydrogen, and nitrogen as constituent elements to form a modified layer that is located in a surface portion of the semiconductor wafer and contains the constituent elements of the cluster ions as a solid solution; and a second step of forming an epitaxial layer on the modified layer of the semiconductor wafer.
    Type: Grant
    Filed: February 7, 2020
    Date of Patent: April 11, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Akihiro Suzuki, Takeshi Kadono, Ryo Hirose
  • Publication number: 20230106784
    Abstract: In a double-side polishing apparatus includes at least one work thickness measuring instrument in real time during double-side polishing of the work; an inner circumferential surface defined by the through hole in said one of the upper plate and the lower plate is provided with a metal cylindrical member; and either of: a lower window provided in a lower part of the cylindrical member provided in the upper plate and an upper window provided in an upper part of the cylindrical member provided to cover the upper side of the through hole provided in the upper plate, or an upper window provided in an upper part of the cylindrical member provided in the lower plate and a lower window provided to cover the lower side of the through hole provided in the lower plate.
    Type: Application
    Filed: December 28, 2020
    Publication date: April 6, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Yuji MIYAZAKI, Masaru MORITA
  • Patent number: 11618971
    Abstract: A crystal puller apparatus comprises a pulling assembly to pull a crystal from a silicon melt at a pull speed; a crucible that contains the silicon melt; a heat shield above a surface of the silicon melt; a lifter to change a gap between the heat shield and the surface of the silicon melt; and one or more computing devices to determine an adjustment to the gap using a Pv-Pi margin, at a given length of the crystal, in response to a change in the pull speed. The computer-implemented method by a computing device comprises determining a pull-speed command signal to control a diameter of the crystal; determining a lifter command signal to control a gap between a heat shield and a surface of a silicon melt from which the crystal is grown; and determining an adjustment to the gap, in response to a different pull-speed, using a Pv-Pi margin.
    Type: Grant
    Filed: September 29, 2020
    Date of Patent: April 4, 2023
    Assignee: SUMCO Corporation
    Inventors: Keiichi Takanashi, Ippei Shimozaki
  • Patent number: 11598019
    Abstract: A crucible-supporting pedestal includes a fitting recess portion into which a divided graphite member is fittable. An opening edge of the fitting recess portion is formed such that a contact area between the opening edge and the divided graphite member is provided at a position higher than a surface of a solidified product of a silicon melt which remains in a quartz crucible after a silicon single crystal is grown, and a force, which is applied to the divided graphite member by an expansion of the silicon melt when the silicon melt is solidified, is applied to a position lower than the contact area.
    Type: Grant
    Filed: May 31, 2018
    Date of Patent: March 7, 2023
    Assignee: SUMCO CORPORATION
    Inventor: Kenji Munezane
  • Patent number: 11598023
    Abstract: A semiconductor wafer including a single crystal doped with a dopant, wherein a resistivity of the wafer is 0.7 m?-cm or less, and wherein a striation height of the wafer is 6 mm or more. The resistivity of the wafer may be 0.8 m?-cm or less, and the striation height may be 13 mm or more. The resistivity of the wafer may be 0.7 m?-cm or less, and the striation may be 22 mm or more. Example features relate to a method of making a semiconductor wafer that includes adding a dopant to a silicon melt, rotationally pulling a crystal from the silicon melt, and applying a magnetic field of 3000 G or more such that the semiconductor wafer has a resistivity that is equal to or less than 0.8 m?-cm and a striation height that is equal to or more than 13 mm.
    Type: Grant
    Filed: June 29, 2020
    Date of Patent: March 7, 2023
    Assignee: SUMCO CORPORATION
    Inventors: Yasuhito Narushima, Masayuki Uto
  • Publication number: 20230061603
    Abstract: Provided is a susceptor which makes it possible to increase the circumferential flatness uniformity of an epitaxial layer of an epitaxial silicon wafer. A susceptor 100 is provided with a concave counterbore portion on which a silicon wafer W is placed, and the radial distance L between the center of the susceptor and an opening edge of the counterbore portion varies at 90° periods in the circumferential direction. Meanwhile, when the angle at which the radial distance L is minimum is 0°, the radial distance L is a minimum value L1 at 90°, 180°, and 270°; and the radial distance L is a maximum value L2 at 45°, 135°, 225°, and 315°. Accordingly, the pocket width Lp also varies in conformance with the variations of the radial distance L. The opening edge 110C describes four elliptical arcs being convex radially outward when the susceptor 100 is viewed from above.
    Type: Application
    Filed: October 13, 2022
    Publication date: March 2, 2023
    Applicant: SUMCO Corporation
    Inventor: Kazuhiro Narahara
  • Patent number: 11587792
    Abstract: A method for manufacturing an ingot block in which an ingot of a silicon single crystal pulled up by a Czochralski process is cut and subjected to outer periphery grinding to manufacture an ingot block of the silicon single crystal, the method including: a step of measuring a radial center position of the ingot at one or more locations along a longitudinal direction of the ingot, a step of setting a reference position at which an offset amount of the measured radial center position of the ingot is equal to or less than a predetermined eccentricity amount, a step of cutting the ingot into the ingot blocks based on the set reference position, and a step of performing outer periphery grinding on each of the cut ingot blocks.
    Type: Grant
    Filed: October 22, 2018
    Date of Patent: February 21, 2023
    Assignee: SUMCO CORPORATION
    Inventor: Yasuhiro Saito
  • Patent number: 11579092
    Abstract: The sample introduction device includes a nebulizer that atomizes a sample liquid; a spray chamber that has one end into which a spray port part of the nebulizer is inserted and the other end from which at least a part of liquid droplets of the sample liquid sprayed from the spray port part is discharged to an outside; and a heating electromagnetic wave radiation unit that is arranged outside the spray chamber, wherein the heating electromagnetic wave radiation unit performs radiation of heating electromagnetic waves from the outside of the spray chamber toward at least a part of the spray chamber other than a part into which the spray port part of the nebulizer is inserted.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: February 14, 2023
    Assignees: SUMCO CORPORATION, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Taisuke Mizuno, Kazumi Inagaki, Shinichiro Fujii, Shinichi Miyashita
  • Publication number: 20230042102
    Abstract: In a side view, when an angle ?1 formed between the light axis of light incident on a surface of a silicon wafer and the surface (or an imaginary plane corresponding to the surface) is 67° to 78° and an angle formed between the surface of the silicon wafer (or an imaginary plane corresponding to the surface) and the detection optical axis of a photodetector is ?2, ?1??2 is ?6° to ?1° or 1° to 6°.
    Type: Application
    Filed: September 29, 2020
    Publication date: February 9, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Naoyuki WADA, Takehiro TSUNEMORI
  • Publication number: 20230044686
    Abstract: A method of producing an epitaxial silicon wafer, including: loading a wafer into a chamber; performing epitaxial growth; unloading the epitaxial silicon wafer from the chamber; and then cleaning the inside of the chamber using hydrochloric gas. After the cleaning is performed, whether components provided in the chamber are to be replaced or not is determined based on the cumulative amount of the hydrochloric gas supplied. The components have a base material that includes graphite and is coated with a silicon carbide film.
    Type: Application
    Filed: October 28, 2020
    Publication date: February 9, 2023
    Applicant: SUMCO CORPORATION
    Inventor: Motoki GOTO
  • Publication number: 20230033913
    Abstract: Provided is a cleaning apparatus and a cleaning method for semiconductor wafers that can hinder a mist of a cleaning solution from being adhered to a surface of a semiconductor wafer during cleaning of the semiconductor wafer. In a cleaning apparatus 1 for a semiconductor wafer, a spin cup 20 has an annular side wall portion 21; an inclined portion 22 that is inclined toward the rotating table 13; and an annular bent portion 23. The height position h21 of the upper end portion 21c of the side wall portion 21 is set at a position lower than the height position h14a of the upper end portion 14a of the wafer retainer portion 14, and the inclination angle ?22 of the inclined portion to a horizontal plane and the width w of the inclined portion satisfy a formula (A): ?22(°)??0.65×w (mm)+72.
    Type: Application
    Filed: August 17, 2020
    Publication date: February 2, 2023
    Applicant: SUMCO CORPORATION
    Inventors: Kaito NODA, Kazuhiro OHKUBO, Yuki NAKAO, Michihiko TOMITA
  • Publication number: 20230033545
    Abstract: Provided is a method of transferring a semiconductor wafer to a single-side polishing apparatus without forming scratches on the surface of the semiconductor wafer. The method includes: starting to splay the liquid from each spray hole; placing the semiconductor wafer on the retainer portion to hold a surface of the semiconductor wafer by suction without contact, and raising the tray to attach the semiconductor wafer to the polishing head, wherein a period of time from a point at which the semiconductor wafer is held by the retainer portion to a point at which the attaching of the semiconductor wafer W to the polishing head is completed is 5 s or more, or wherein a ratio of a total area of the protrusions to an area of the semiconductor wafer is 15% or more.
    Type: Application
    Filed: October 13, 2020
    Publication date: February 2, 2023
    Applicant: SUMCO CORPORATION
    Inventor: Ryoya TERAKAWA