Abstract: A susceptor for use in an epitaxial growth apparatus and method where a plurality of circular through-holes are formed in the bottom wall of a pocket in an outer peripheral region a distance of up to about ½ the radius toward the center of the circular bottom wall. The total opening surface area of these through-holes is 0.05 to 55% of the surface area of the bottom wall. The opening surface area of each of the through-holes provided at this outer peripheral region is 0.2 to 3.2 mm2 and the density of the through-holes is 0.25 to 25 per cm2. After a semiconductor wafer is mounted in the pocket, epitaxial growth is carried out while source gas and carrier gas (i.e., reactive gas) is made to flow on the upper surface side of the susceptor and carrier gas is made to flow on the lower surface side.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: A method of manufacturing a semiconductor wafer, including a step of differentiating the glossiness of a front surface from that of a rear surface of the wafer by holding the semiconductor wafer in a wafer holding hole formed in a carrier plate, and simultaneously polishing a front and back surface of said semiconductor wafer by driving said carrier plate to make a circular motion associated with no rotation on its own axis within a plane parallel with a surface of said carrier plate between a pair of polishing members disposed to face to each other, by using an abrasive body with a semiconductor wafer sink rate different in polishing from that of an abrasive body for one of a polishing member on an upper surface plate and a polishing member on a lower surface plate so as to simultaneously polish both the front and rear surfaces of the semiconductor wafer, or differentiating by differentiating the rotating speed of the upper surface plate from that of the lower surface plate.

Abstract: Disclosed are high resistivity silicon wafers, wherein the interstitial oxygen concentration thereof is 8×1017 atoms/cm3 (ASTM F121-1979) or less, BMD (Bulk Micro Defect) density—oxygen precipitate within wafer—is 5×107 pieces/cm3 or less, and an electric resistivity thereof is 100 ?·cm or more. And further disclosed are high resistivity silicon wafers having an electric resistivity of 100 ?·cm or more, which are cut from crystal region where no COP (Crystal Originated Particle) exist, and in which neither COP (Crystal Originated Particle) nor oxygen precipitate exist at the area from wafer surface to the depth of 5 ?m or more owing to high temperature treatment. It is preferable that, in said high resistivity wafers, carbon concentration in wafers is 1×1016 atoms/cm3 or more (ASTM F123-1981), and/or nitrogen concentration is 1×1013 atoms/cm3 or more.

Abstract: To provide a technique for rotating a plurality of carriers 500 between an upper and a lower rotary surface plates to simultaneously polish both surfaces of a plurality of works 400. The work 400 is merged with the carrier 500 outside a polishing apparatus main body 110. The work 400 is supplied onto a lower rotary surface plate 111 of the polishing apparatus main body 110 while remaining merged with the carrier 500. The present invention enables the work 400 on the lower rotary surface plate 111 to be perfectly automatically supplied. After double side polishing has been completed and when an upper rotary surface plate, a liquid such as a water is injected from the upper rotary surface plate to hold the plurality of works 400 to have both surfaces thereof polished, on the lower rotary surface plate 111. The present invention enables the works 400 to be automatically ejected from the lower rotary surface plate 111.

Abstract: A silicon single crystal wafer for a particle monitor is presented, which wafer has an extremely small amount in the surface density of light point defects and is capable of still maintaining a small surface density even after repeating the SC-1. The wafer is prepared by slicing a silicon single crystal ingot including an area in which crystal originated particles are generated, and the surface density of particles having a size of not less than 0.12 mum is not more than 15 counts/cm2 after repeating the SC-1. More preferably, a silicon single crystal wafer having a nitrogen concentration of 1×1013 1×1015 atoms/cm3 provides a surface density of not more than 1 counts/cm2 for the particles having a diameter of not less than 0.12 mum even after repeating the SC-1. Hence, a high quality wafer optimally used for a particle monitor can be obtained and a very small number of defects in the wafer make it possible to produce devices.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: A semiconductor structure and a method of manufacturing a silicon on insulator (SOI) structure having a silicon germanium (SiGe) layer interposed between the silicon and the insulator. According to one manufacturing method, a first SiGe layer, a silicon layer, and a second SiGe layer are epitaxially grown in sequence over a first substrate, and then an insulating layer is formed on the second SiGe layer. Then, impurity ions are implanted into a predetermined location of the first substrate underlying the first SiGe layer to form an impurity implantation region. A second substrate is bonded to the insulating layer on the first substrate. After the first substrate is separated along the impurity implantation region and removed, the first SiGe layer remaining on the surface of the separated region is removed so that the surface of the silicon layer may be exposed.

Abstract: A method for manufacturing a silicon wafer includes a step of annealing a silicon wafer which is sliced from a silicon single crystal ingot, thereby forming a DZ layer in a first surface and in a second surface of the silicon wafer and a step of removing either a portion of the DZ layer in the first surface or a portion of the DZ layer in the second surface.

Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017-17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016-15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104-5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500-1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C.-1380° C. for 1 to 10 hours.

Abstract: A wafer etching and impurity analysis method is presented in which a wafer is held in a vessel having gas introduction and exhaust ports, a solution including a mixture of hydrofluoric acid and nitric acid alone or together with sulfuric acid is bubbled with a carrier gas without being heated, which generates a gas containing vaporized hydrofluoric acid and nitric acid, and the inside of the vessel is purged so that the amount of gas supplied is kept constant at all times. All or a specific portion of the wafer is cooled to a specific temperature. Consequently, the gas is condensed on the surface of the wafer, which allows the required portion of the wafer to be etched. The method reduces the amount of liquid needed for residue recovery, the amount of admixed silicon during impurity analysis, and the concentration time.

Abstract: An ultra-pure ozone water comprising an increased amount of an organic carbon capable of suppressing the reduction of the half-life period of ozone; and a method for producing the ultra-pure ozone water which comprises adding an organic solvent containing the above organic carbon to an ultra-pure ozone water containing a trace amount of the organic carbon. The above ultra-pure ozone water exhibits an increased half-life period of ozone, and thus, when used in cleaning a semiconductor substrate, allows the cleaning with an ozone water having an enhanced content of ozone, which results in exhibiting an enhanced cleaning capability and cleaning efficiency for an organic impurities, metallic impurities and the like adhered to the substrate, due to enhanced oxidizing action of ozone.

Abstract: A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.

Abstract: A method of polishing the double sides of a plurality of works simultaneously by rotating a plurality of carriers between upper and lower rotating surface plates, comprising the steps of forming the works (400) integrally with the carriers (500) on the outside of a polishing device main body (110), feeding the works (400) onto a rotating surface plate (111) on the underside of the polishing device main body (110) with the works formed integrally with the carriers (500), injecting liquid such as water from the upper side rotating surface plate when the upper side rotating surface plate is raised after the double sides are polished, holding the plurality of works (400) on the lower side rotating surface plate (111) after the double sides are polished, enabling the works (400) to be discharged automatically from the lower side rotating surface plate (111), providing a brush storage part (180) and a dresser storage part (190) near the polishing device main body (110), and frequently treating a polishing cloth ins

Abstract: A method for manufacturing a semiconductor device includes the steps of: forming a trench in a semiconductor substrate; and forming an epitaxial film on the substrate including a sidewall and a bottom of the trench so that the epitaxial film is filled in the trench. The step of forming the epitaxial film includes a final step before the trench is filled with the epitaxial film. The final step has a forming condition of the epitaxial film in such a manner that the epitaxial film to be formed on the sidewall of the trench has a growth rate at an opening of the trench smaller than a growth rate at a position of the trench, which is deeper than the opening of the trench.

Abstract: A method of manufacturing a semiconductor wafer, comprising the step of differentiating the glossiness of a front surface from that of a rear surface of the wafer by using an abrasive cloth with a semiconductor wafer sink rate different in polishing from that of the other abrasive cloth for one of a polishing cloth (14) on an upper surface plate (12) and a polishing cloth (15) on a lower surface plate (13) so as to simultaneously polish both the front and rear surfaces of the semiconductor wafer (W), or differentiating by differentiating the rotating speed of the upper surface plate from that of the lower surface plate.

Abstract: An active layer side silicon wafer is heat-treated in an oxidizing atmosphere to thereby form a buried oxide film therein. The active layer side silicon wafer is then bonded to a supporting side wafer with said buried oxide film interposed therebetween thus to fabricate an SOI wafer. Said oxidizing heat treatment is carried out under a condition satisfying the following formula: [Oi]?2.123×1021exp(?1.035/k(T+273)), where, T is a temperature of the heat treatment, and [Oi] (atmos/cm3) is an interstitial oxygen concentration.

Abstract: A silicon wafer is thermal-annealed in an atmosphere to form new vacancies therein by thermal annealing and the atmosphere in the thermal annealing contains a nitride gas having a lower decomposition temperature than a decomposable temperature of N2 so that the thermal annealing is carried out at a lower temperature or for a short time to suppress generation of slip and to provide satisfactory surface roughness.

Abstract: During polishing of the semiconductor wafer by using a double-sided polisher, a larger difference as compared to the prior art is created between a frictional resistance acting on a front surface of a silicon wafer from an upper surface plate side and a frictional resistance acting on a back surface of the silicon wafer from a lower surface plate side. Thereby, respective wafers can be rotated at as 0.1 - 1.0 rpm within corresponding wafer holding holes. Accordingly, the rotation of the wafer would not be suspended even if there were any defective condition induced during polishing. Further, partial variation or deviation in polishing volume particular in the outer periphery of the wafer would be hard to occur. Therefore, the polish-sagging is suppressed and thus the improved degree of flatness of the wafer could be obtained.

Abstract: The apparatus for manufacturing a silicon single crystal includes: a crucible for storing molten silicon; a pulling-up device for pulling up a silicon single crystal from the molten silicon in the crucible to grow; a detecting device for detecting a position of the crucible in a vertical direction; and a control device for controlling a pulling rate for the silicon single crystal by the pulling-up device, based on the detected position of the crucible.