Abstract: Provided is a method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the chamfered wafer, a mild lapping step for abrading away part of processing distortions on the rear surface of the wafer left after chamfering and lapping, a rear-surface mild polishing step for abrading away part of roughness on the rear surface of the wafer, an etching step for alkali-etching the remains of processing distortions on the front and rear surfaces of the wafer, a front-surface mirror-polishing step for mirror-polishing the front surface of the etched wafer, and a cleaning step for cleaning the mirror-polished wafer.

Abstract: A high-resistance silicon wafer is manufactured in which a gettering ability, mechanical strength, and economical efficiency are excellent and an oxygen thermal donor is effectively prevented from being generated in a heat treatment for forming a circuit, which is implemented on the side of a device maker. A heat treatment for forming an oxygen precipitate nucleus is performed at 500 to 900° C. for 5 hours or more in a non-oxidizing atmosphere and a heat treatment for growing an oxygen precipitate is performed at 950 to 1050° C. for 10 hours or more on a high-oxygen and carbon-doped high-resistance silicon wafer in which resistivity is 100 ?cm or more, an oxygen concentration is 14×1017 atoms/cm3 (ASTM F-121, 1979) or more and a carbon concentration is 0.5×1016 atoms/cm3 or more. By these heat treatments, a remaining oxygen concentration in the wafer is controlled to be 12×1017 atoms/cm3 (ASTM F-121, 1979) or less.

Abstract: Provided are a bonding substrate whose defective bonding portion in a peripheral region of an active layer has been removed by a polishing applied thereto after a surface grinding, a manufacturing method of the same substrate and wafer periphery pressing jigs. After the surface grinding, a periphery removing polishing is applied from an active layer wafer side of a bonding wafer so that a peripheral region of the active layer may be removed and a central region thereof may be left un-removed. Consequently, a periphery grinding and a periphery etching according to the prior art can be eliminated. Furthermore, an etch pit on a circumferential face of a wafer which could be caused by the periphery etching and a contamination or a scratching in an SOI layer which could be caused by a silicon oxide film left un-ground-off can be prevented, thereby achieving high yield and low cost.

Abstract: The apparatus for manufacturing a silicon single crystal includes: a crucible for storing molten silicon; a pulling-up device for pulling up a silicon single crystal from the molten silicon in the crucible to grow; a detecting device for detecting a position of the crucible in a vertical direction; and a control device for controlling a pulling rate for the silicon single crystal by the pulling-up device, based on the detected position of the crucible.

Abstract: A wafer etching and impurity analysis method is presented in which a wafer is held in a vessel having gas introduction and exhaust ports, a solution including a mixture of hydrofluoric acid and nitric acid alone or together with sulfuric acid is bubbled with a carrier gas without being heated, which generates a gas containing vaporized hydrofluoric acid and nitric acid, and the inside of the vessel is purged so that the amount of gas supplied is kept constant at all times. All or a specific portion of the wafer is cooled to a specific temperature. Consequently, the gas is condensed on the surface of the wafer, which allows the required portion of the wafer to be etched. The method reduces the amount of liquid needed for residue recovery, the amount of admixed silicon during impurity analysis, and the concentration time.

Abstract: When a two-division structure heat treatment jig for semiconductor substrate that includes a silicon first jig that comes into direct contact with a semiconductor substrate that is heat treated and supports the semiconductor substrate, and a second jig (holder) that holds the first jig and is mounted on a heat treatment boat is adopted as a heat treatment boat of a vertical heat treatment furnace, the stress concentrated during the heat treatment on a particular portion of the semiconductor substrate can be reduced; in the case of a semiconductor substrate large in the tare stress and having an outer shape of 300 mm being heat treated, or even in the case of the heat treatment being carried out under very high temperature conditions, the slips can be suppressed from occurring. The present invention can be widely applied as a stable heat treatment method of semiconductor substrates.

Abstract: A method for manufacturing a SOI wafer includes a step of forming a SOI wafer including a silicon support, an insulating layer containing oxide, and a superficial silicon layer arranged in that order and also includes a step of introducing hydrogen into the interface between the insulating layer and the superficial silicon layer. The SOI wafer is heat-treated in an atmosphere containing hydrogen or water in the hydrogen-introducing step. A method for manufacturing a SOI wafer includes a step of forming a SOI wafer including a silicon support, an insulating layer containing oxide, and a superficial silicon layer arranged in that order; a step of introducing hydrogen into the interface between the insulating layer and the superficial silicon layer by forming a film on an oxide layer present on the SOI wafer using a reaction to generate hydrogen; and a step of removing the film.

Abstract: The apparatus for manufacturing a silicon single crystal includes: a crucible for storing molten silicon; a pulling-up device for pulling up a silicon single crystal from the molten silicon in the crucible to grow; a detecting device for detecting a position of the crucible in a vertical direction; and a control device for controlling a pulling rate for the silicon single crystal by the pulling-up device, based on the detected position of the crucible.

Abstract: A heat shielding member is provided in a device pulling up a silicon single crystal rod from a silicon melt stored in a quartz crucible, and equipped with a tube portion which shields radiant heat from the heater surrounding the outer peripheral face of the silicon single crystal rod, a swelling portion provided at the lower portion of the tube portion, and a ring-shape heat accumulating portion provided at the inside of the swelling portion. The heat accumulating portion is a thermal conductivity of 5 W/(m·° C.) or less, its inner peripheral face is a height (H1) of 10 mm or more and d/2 or less when the diameter of the silicon single crystal rod is referred to as d and the minimum distance (W1) between the outer peripheral face of the silicon single crystal rod and the inner peripheral face of the heat accumulating portion is formed so as to be 10 mm or more and 0.

Abstract: It is an object of the present invention to provide an epitaxial wafer with fewer pit defects in the epitaxial layer of a silicon monocrystalline wafer that has been doped with arsenic. Pit defects tend to occur when gas etching is performed prior to epitaxial film formation, but this tendency is reversed and a sound epitaxial layer is obtained by setting the crystal plane orientation to (100) and specifying the range of the tilt angle for the angle ? in the [001] direction or [001] direction or the angle ? in the [010] direction or [010] direction with respect to the [100] axis.

Abstract: A silicon annealed wafer having a sufficient thick layer free from COP defects on the surface, and a sufficient uniform BMD density in the inside can be produced by annealing either a base material wafer having nitrogen at a concentration of less than 1×1014 atoms/cm3, COP defects having a size of 0.1 ?m or less in the highest frequency of occurrence and no COP defects having a size of 0.2 ?m or more, oxygen precipitates at a density of 1×104 counts/cm2 or more, and BMDs (oxygen precipitates), where the ratio of the maximum to the minimum of the BMD density in the radial direction of the wafer is 3 or less, or a base material wafer grown at specific average temperature gradients within specific temperature ranges and specific cooling times for a single crystal at a nitrogen concentration of less than 1×1014 atoms/cm3, employing the Czochralski method.

Abstract: An apparatus is used to pull a single crystal, wherein a flow of an inert gas to the single crystal to be grown, a pressure in an apparatus body, and a temperature environment are always kept constant by keeping a melt level at a prescribed position in spite of changes in volume of a quartz crucible between batches and thermal deformation of the quartz crucible, so that high quality single crystals can be pulled.

Abstract: Firstly, a silicon ingot in which boron and germanium were doped is sliced to prepare a silicon wafer and then the wafer is thermally processed by oxidation to form the thermal oxidation film on the surface layer portion of the wafer. Thereby, the concentration of germanium is enhanced in the vicinity of the interface with the thermal oxidation film of the wafer. Then, the thermal oxidation film is removed from the surface layer portion of the wafer. Further, an epitaxial layer consisting of a silicon single crystal in which a lower concentration of boron than the concentration of boron in the wafer was doped is grown on the shallow surface layer portion of the wafer by an epitaxial growth method. According to the present invention, the doping amount of germanium is reduced and the generation of misfit dislocations is suppressed.

Abstract: A method for manufacturing a SOI wafer includes a step of heat-treating a wafer in a furnace to form an SOI wafer including a silicon support, an insulating layer containing oxide, and a superficial silicon layer arranged in that order and a step of unloading the SOI wafer from the furnace maintained at a temperature of 250° C. to 800° C. to transfer the SOI wafer to an atmosphere containing hydrogen or water. The steps are performed in that order.

Abstract: A plurality of recessed portions having different depths is formed in a surface of the active layer wafer or in a bonding surface of the supporting substrate wafer. Those wafers are bonded to each other with an insulation film interposed therebetween. This allows a cavity of higher dimensional precision to be buried therein. A plurality of cavities may be formed simultaneously in a plurality of locations within the plane of the substrate, which allows the thickness of the SOI layer to be set arbitrarily. Accordingly, such a semiconductor device can be fabricated easily in which a MOS type element and a bipolar element are formed on the same chip in a mixed manner.

Abstract: A single crystal ingot is cut to an axial direction so as to including the central axis, a sample for measurement including regions [V], [Pv], [Pi] and [I] is prepared, and a first sample and second sample are prepared by dividing the sample into two so as to be symmetrical against the central axis. A first transition metal is metal-stained on the surface of the first sample and a second transition metal different from the first transition metal is metal-stained on the surface of the second sample. The first and second samples stained with the metals are thermally treated and the first and second transition metals are diffused into the inside of the samples. Recombination lifetimes in the whole of the first and second samples are respectively measured, and the vertical measurement of the first sample is overlapped on the vertical measurement of the second sample.

Abstract: A thermal processing operation is performed for a silicon wafer W (silicon single-crystal layer) in an atmosphere gas which is formed by a hydrogen gas or an inert gas or a mixture gas of these gases at a temperature in a range of 600° C. to 950° C. (here, the temperature should not be greater than 950° C.). By doing this, a quality of a surface of the silicon single-crystal layer is improved.

Abstract: A high resistivity p type silicon wafer with a resistivity of 100 ?cm or more, in the vicinity of the surface being formed denuded zone, wherein when a heat treatment in the device fabrication process is performed, a p/n type conversion layer due to thermal donor generation is located at a depth to be brought into contact with neither any device active region nor depletion layer region formed in contact therewith or at a depth more than 8 ?m from the surface, and a method for fabricating the same. The high resistivity silicon wafer can cause the influence of thermal donors to disappear without reducing the soluble oxygen concentration in the wafer, whereby even if various heat treatments are performed in the device fabrication process, devices such as CMOS that offer superior characteristics can be fabricated. The wafer has wide application as a substrate for a high-frequency integrated circuit device.

Abstract: Provided is an improved method for producing a silicon wafer whose surfaces exhibit precise flatness and minute surface roughness, and which allows one to visually discriminate between the front and rear surfaces, the method comprising a slicing step of slicing a single-crystal ingot into thin disc-like wafers, a chamfering step of chamfering the wafer, a lapping step for flattening the wafer, an etching step for removing processing distortions on the wafer surfaces, a mirror-polishing step for mirror-polishing the surface of the wafer, and a cleaning step for cleaning the wafer. The etching step further comprises a first acid-etching phase and a second alkali-etching phase, and a rear surface mild polishing step is introduced between the first and second etching phases in order to abrade part of roughness formed on the rear surface of the wafer as a result of the first etching phase.

Abstract: To suppress a fluctuation in resistivity around a target value to thereby stably manufacture high resistivity silicon single crystals having almost the same resistivity values in a manufacturing method wherein a silicon raw material is molten to manufacture a high resistivity silicon single crystal in the range of from 100 to 2000 ? cm with a CZ method. In a case where poly-silicon produced with a Siemens method using trichlorosilane as raw material is used as the silicon raw material, an impurity concentration in the silicon raw material is selected so as to be controlled in the range of from ?5 to 50 ppta method in terms of (a donor concentration—an acceptor concentration) and the selected poly-silicon is used. In a case of a MCZ method, the poly-silicon is selected in the range of from ?25 to 20 ppta and the selected poly-silicon is used. Instead of the raw material, poly-silicon produced with a Siemens method using monosilane as raw material is used.