Abstract: A heat treatment jig for supporting silicon semiconductor substrates by contacting, being loaded onto a heat treatment boat in a vertical heat treatment furnace, comprises; the configuration of a ring or a disc structure with the wall thickness between 1.5 and 6.0 mm; the deflection displacement of 100 ?m or less at contact region in loaded condition; the outer diameter which is 65% or more of the diameter of said substrate; and the surface roughness (Ra) of between 1.0 and 100 ?m at the contact region. The use of said jig enables to effectively retard the slip generation and to avoid the growth hindrance of thermally oxidized film at the back surface of said substrate, diminishing the surface steps causing the defocus in photolithography step in device fabrication process, thereby enabling to maintain high quality of silicon semiconductor substrates and to substantially enhance the device yield.

Abstract: An active layer wafer having a larger diameter is placed over a stationary supporting substrate wafer having a smaller diameter. A pusher plate is pressed against an orientation flat of the larger wafer to move the wafer substantially in the horizontal direction. In the course of the pressing operation, the pusher plate is also pressed against the orientation flat of the smaller wafer so as to move the two wafers together. Then, as a result of each of the cut sections for alignment of the wafer being pressed against an aligning plate, the larger wafer and the smaller wafer can be bonded to each other with their centerlines and orientation flats aligned with respect to each other.

Abstract: A silicon single crystal ingot is pulled at a pull rate so that the interior of the ingot results in a perfect region in which agglomerates of interstitial silicon-type point defects and agglomerates of vacancy-type point defects are absent, while rotating a quartz crucible for storing a silicon melt at a predetermined rotation speed and rotating the ingot pulled from the silicon melt in the opposite direction to the rotation of the quartz crucible at a predetermined rotation speed. An average rotation speed CRTAV of the quartz crucible during the pulling of a top ingot portion is set to be faster than an average rotation speed CRTAV of the quartz crucible during the pulling of a bottom ingot portion of the silicon single crystal ingot.

Abstract: This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.

Abstract: In a semiconductor substrate, a field effect transistor, and methods for producing the same, in order to lower threading dislocation density and also to lower surface roughness, a step of repeating, a plurality of times, a process of epitaxially growing a SiGe gradient composition layer of which a Ge composition ratio is gradually increased from a Ge composition ratio of a base material and a process of epitaxially growing a SiGe constant-composition layer on the gradient composition layer at a final Ge composition ratio of the gradient composition layer, thereby depositing a SiGe layer of which a Ge composition ratio changes in a film deposition direction, in a step-like manner with a gradient, a heat treatment step of performing heat treatment at a temperature exceeding a temperature of the epitaxial growth either during or after formation of the SiGe layer, and a polishing step of polishing to remove irregularities on a surface of the SiGe layer which arise in the heat treatment after formation of the SiGe

Abstract: A silicon single crystal rod (24) is pulled from a silicon melt (13) made molten by a heater (17), and a change in diameter of the silicon single crystal rod every predetermined time is fed back to a pulling speed of the silicon single crystal rod and a temperature of the heater, thereby controlling a diameter of the silicon single crystal rod. A PID control in which a PID constant is changed on a plurality of stages is applied to a method which controls the pulling speed of the silicon single crystal rod so that the silicon single crystal rod has a target diameter and a method which controls a heater temperature so that the silicon single crystal rod has the target temperature. A set pulling speed for the silicon single crystal rod is set so that V/G becomes constant, and an actual pulling speed is accurately controlled so as to match with the set pulling speed, thereby suppressing a fluctuation in diameter of the single crystal rod.

Abstract: A thickness of a wafer during polishing operation is detected to accurately perform the polishing. A thickness measuring method, which measures the thickness of the wafer of wafer 7 in polishing a surface, comprises the steps of irradiating the thin film-like material during the surface polishing from a backside with probe light, measuring a reflectance spectrum with a dispersion type multi-channel spectroscope using a photodiode array which has particularly high sensitivity to light having a wavelength ranging from 1 to 2.4 ?m, and calculating the thickness on the basis of a wave form of the reflectance spectrum. The surface polishing is performed while the thickness of the wafer 7 is measured by the above-described thickness measuring method, and the polishing is finished when the thickness of the wafer 7 reaches a target thickness.

Abstract: In a device and a method for measuring the position of the liquid surface of a melt while a single crystal is being pulled, two measuring-lines are defined in an image of a fusion ring which is captured by means of a two-dimensional CCD camera, the intersections of the respective measuring lines and the fusion ring, on the opposite sides of the fusion ring, are detected, and the central position of the single crystal is calculated based on the intervals between the intersections on the opposite sides of the fusion ring, whereby the position of the liquid surface of the melt is determined.

Abstract: This invention provides a heat treatment jig for semiconductor silicon substrates, which, in respective heat treatment of hydrogen annealing or argon annealing, can handle enlargement of the diameter of wafers to be treated and can also prevent slipping and dislocations that occur as a result of the stress caused by the weight of the wafer itself or the deflection of the heat treatment jig itself.

Abstract: A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11×1017–17×1017 atoms/cm3 (OLD ASTM) and within a range of 1×1016–15×1016 atoms/cm3 (NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1×104–5×106 counts/cm2, when a heat treatment is carried out at a temperature of 500–1000° C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100° C.–1380° C. for 1 to 10 hours.

Abstract: A semiconductor substrate, a field effect transistor and their manufacturing methods provided with, in order to lower penetrating dislocation density and reduce surface roughness to a practical level, an Si substrate 1, a first SiGe layer 2 on the Si substrate, and a second SiGe layer 3 arranged on the first SiGe layer either directly or with an Si layer in between; wherein, the first SiGe layer has a film thickness that is thinner than twice the critical film thickness, which is the film thickness at which dislocation occurs resulting in lattice relaxation due to increased film thickness, the Ge composition ratio of the second SiGe layer is at least lower than the intralayer maximum value of the Ge composition ratio in the first SiGe layer or in the first SiGe layer at the contact surface with the Si layer, and the second SiGe layer has an incremental composition region in which the Ge composition ratio gradually increases towards the surface at least in a portion thereof.

Abstract: An inspection method is provided for accurate measurement of conductive materials as defects within a silicon oxide film base material embedded in a SOI wafer sample. In the method, the internal state of a sample 2 is inspected by measuring an conductive material within an insulating base material 11 formed upon the sample 2. Ions or electrons are irradiated upon the surface of the inspection region of the base material 11. A surface image is imaged with secondary electrons emitted from the surface 11a and the vicinity of the surface. The inspection region is etched and a surface image is imaged successively with secondary electrons emitted from a surface 11b and from its vicinity, renewed successively at the etched depth. The conductive material within the base material 11 is measured based upon the accumulated surface images.

Abstract: A method for controlling a selection ratio of a chemical-mechanical-polishing slurry composition for polishing and ablating an oxide layer selectively in relation to a nitride layer, the method includes: a step of confirming a polishing-rate selection ratio of an oxide layer to a nitride layer of a chemical-mechanical-polishing slurry composition which includes ceria polishing particles, a dispersing agent, and an anionic additive, while a concentration of the anionic additive is changed; and a step of adjusting the concentration of the anionic additive to attain a desired selection ratio of the slurry composition, on the basis of the confirmed polishing-rate selection ratio, thereby controlling the selection ratio of the slurry composition.

Abstract: A silicon wafer wherein stacking fault (SF) nuclei are distributed throughout the entire in-plane direction, and the density of the stacking fault nuclei is set to a range of between 0.5×108 cm?3 and 1×1011 cm?3.

Abstract: A surface of a reference sample is contaminated with a transition metal, and a heat treatment is performed to diffuse the transition metal in the sample. A concentration of recombination centers formed by the transition metal is measured in the entire heat-treated reference sample, and a region [V], a region [Pv], a region [Pi], and a region [I] in the reference sample are defined based on the values measured. Meanwhile, recombination lifetimes associated with the transition metal are measured in the entire heat-treated reference sample. Based on both of the measurement results, a correlation line of the concentration of recombination centers and the recombination lifetimes is produced. A surface of the measurement sample is contaminated with the transition metal, and a heat treatment is performed to diffuse the transition metal in the sample.

Abstract: This silicon wafer production process has a step of cutting a silicon wafer from a silicon single crystal ingot in a perfect region which includes a perfect region P free of agglomerates of interstitial-silicon-type point defects and agglomerates of vacancy-type point defects and/or a region R in which there is occurrence of ring-shaped oxidation induced stacking faults, and a step of performing rapid thermal annealing on the silicon wafer in a hydrogen atmosphere, an argon atmosphere or an atmosphere containing a mixed gas thereof.

Abstract: The present invention teaches an apparatus for pulling a single crystal, whereby a radial temperature gradient of a seed crystal and/or a neck is reduced to a minimum so as to inhibit occurrence of thermal stress and prevent induction of dislocations, thereby resulting in an improvement in dislocation-free rate of single crystals to be pulled in cases where a single crystal is pulled with a seed crystal and/or a neck being heated using an auxiliary heating device. The apparatus comprises a crucible to be charged with a melt, a heater located around the crucible, and an auxiliary heating device including a heating section which can be located so as to surround a seed crystal in a position near and above the melt, a transfer mechanism for withdrawing the heating section from a passing area of a single crystal, and a covering section to cover a clearance between the heating section and the seed crystal extending from the heating section.

Abstract: The present invention relates to a semiconductor substrate production method, field effect transistor production method, semiconductor substrate and field effect transistor which, together with having low penetrating dislocation density and low surface roughness, prevent worsening of surface and interface roughness during heat treatment of a device production process and so forth. A production method of a semiconductor substrate W, in which SiGe layers 2 and 3 are formed on an Si substrate 1, is comprised of a heat treatment step in which heat treatment is performed either during or after the formation of the SiGe layers by epitaxial growth, at a temperature that exceeds the temperature of the epitaxial growth, and a polishing step in which irregularities in the surface formed during the heat treatment are removed by polishing following formation of the SiGe layers.

Abstract: In single crystal growth by means of a CZ method, a granular/lump polycrystalline raw material is additionally supplied into a raw material melt in a crucible through a vertical charging tube. A raw material accumulating section is provided at a site part way downward in the vertical charging tube working in such a way that a predetermined amount of the polycrystalline raw material is accumulated in the raw material accumulating section and the polycrystalline raw material in excess of the predetermined amount falls down. The polycrystalline raw material falling down in the vertical charging tube strikes against the accumulated raw material in the raw material accumulating section, thereby absorbing a shock of the falling raw material. The accumulated raw material works simultaneously as a protective member, thereby preventing breakage of the tube accompanying absorption of the shock from occurring.

Abstract: A method of making silicon single crystal wafers free of grown-in defects is provided. These wafers are formed from silicon single crystal manufactured by the Czochralski method. Careful control of the pulling rate, V (mm/min), and the temperature gradient G (° C./mm) permits crystals to be formed that are free from OSF rings, and other types of defects.