Abstract: In a high rate pulling with a cooler 10 surrounding a single crystal 8, steam explosion by leakage from the cooler 10 is prevented. Flow rates La, Lb of cooling water are measured by flowmeters 14a, 14b on a cooling water inflow side and cooling water outflow side of the cooler 10. When flow rate difference &Dgr;L (La−Lb) determined from the flow rates La, Lb exceeds 20 cc/minute, open/close valves 15a, 15b, 15c are operated to stop water supply to the cooler 10 and drain outward the cooing water in the cooler 10.

Abstract: Particles adherent to a semiconductor wafer surface, and defects such as SFs, mounds, and dislocations present near the semiconductor wafer surface can be accurately divided according to their types at a low cost without being influenced by an inspector's ability. The wafer is scanned with a laser beam, scattered or reflected light from the wafer surface is detected from multiple light optics having different detecting angles, respectively, and forms and types of the occurrences present on the wafer surface are determined based on a ratio of detected light intensities from the multiple light optics.

Abstract: The invention relates to a method of producing epitaxial wafers for the manufacture of high integration density devices capable of showing stable gettering effect. Specifically, it provides (1) a method of producing epitaxial wafers which comprises subjecting a silicon wafer sliced from a single crystal ingot grown by doping with not less than 1×1013 atoms/cm3 of nitrogen to 15 minutes to 4 hours of heat treatment at a temperature not lower than 700° C. but lower than 900° C. and then to epitaxial growth treatment. It is desirable that the above single crystal ingot have an oxygen concentration of not less than 11×1017 atoms/cm3. Further, (2) the above heat treatment is desirably carried out prior to the step of mirror polishing of silicon wafers. Furthermore, (3) it is desirable that the pulling rate be not increased in starting tail formation as compared with the pulling rate of the body in growing the above single crystal ingot.

Abstract: An apparatus is provided which is to be used in producing single crystals for silicon wafers useful as semiconductor materials and which can stably produce large-diameter, long-length and high-quality single crystals from which wafers limited in the number of grown-in defects can be taken. This silicon single crystal production apparatus comprises a cooling member surrounding the single crystal to be pulled up and having an internal surface coaxial with the pulling axis and thermal insulating members disposed outside the outer surface and below the bottom surface of the cooling member, the cooling member having an internal surface diameter of 1.20D to 2.50D (D being the diameter of the single crystal to be pulled up) and a length of not less than 0.25D, the distance from the melt surface to the bottom surface of the cooling member being 0.30D to 0.

Abstract: To restrict to a low level a temperature gradient of an ingot immediately after solidification in a bottomless crucible in a electromagnetic induction casting method using an electrically conductive bottomless crucible. An upper section and a lower section of an electrically conductive bottomless crucible to be disposed inside an induction coil are configured as a water-cooled section and a non-water-cooled section. Both the water-cooled section and the non-water-cooled section are divided by vertical slits into a plurality of portions in a circumferential direction. Rapid cooling with water in the lower section of the crucible is restricted.

Abstract: To impart flexibility suitable for recovery of a quartz crucible to a divided type graphite crucible and avoid damage to the quartz crucible due to the flexibility. A graphite crucible 10 is divided into two or more parts by radial dividing lines 14. An opening 11a is provided in a center of a bottom of the graphite crucible 10. A protrusion 21 fitting into the opening 11a is provided on a crucible placing surface of a crucible tray 20. An inner diameter d2 of the opening 11a is 0.04 to 0.9 times an inner diameter d1 of a straight body portion of the graphite crucible 10. An outer diameter D2 of the crucible tray 20 is 0.5 or more times an outer diameter D1 of the straight body portion of the graphite crucible 10. Minimum thickness of the crucible tray 20 is 15 mm or more.

Abstract: A semiconductor structure and a method of manufacturing a silicon on insulator (SOI) structure having a silicon germanium (SiGe) layer interposed between the silicon and the insulator. According to one manufacturing method, a first SiGe layer, a silicon layer, and a second SiGe layer are epitaxially grown in sequence over a first substrate, and then an insulating layer is formed on the second SiGe layer. Then, impurity ions are implanted into a predetermined location of the first substrate underlying the first SiGe layer to form an impurity implantation region. A second substrate is bonded to the insulating layer on the first substrate. After the first substrate is separated along the impurity implantation region and removed, the first SiGe layer remaining on the surface of the separated region is removed so that the surface of the silicon layer may be exposed.

Abstract: Provided are a method and apparatus for inspecting a defect on a plane, such as a surface or a section, of an object to be inspected. The object is, for instance, a silicon wafer. A whole area of a plane of the object is first imaged by an optical system to gain image signals. Then, a particular region on the plane is positionally detected from the image signals. The particular region includes a blot and a defect and has a higher luminance than a remaining region on the plane. A blot is distinguishably detected from the particular region. A specified region on the plane is then subjected to a detailed inspection under a microscope. The region is set to avoid the blot even if the blot is on the region. The detailed inspection under the microscope is performed toward only the region with no blot.

Abstract: It is difficult to keep a wafer at a prescribed temperature in epitaxial growth and etching, leading to a possibility of variations in quality, but a thermal processing apparatus according to the present invention has a learning-modifying means in a controlling means to learn and modify an output s1 from a radiation thermometer based on the output s1 from the radiation thermometer, a supplied electric energy P to a heating means, and an output s2 from a radiation thermometer.

Abstract: To miniaturize a crystal holding apparatus which mechanically holds and pulls up a single crystal at a top thereof. To avoid harmful influence on crystal growing resulting from crystal holding. A plurality of pivot clamps 40, 40 are circumferentially mounted at regular intervals on a cylindrical frame 30 which lifts and lowers and rotates for pulling up the single crystal. A clamp operation mechanism 50 is incorporated in the frame 30, which is pushed by a seed chuck 2 lifting in the frame 30 to shift the pivot clamps 40, 40 from an open condition to a close condition. The clamp operation mechanism 50 shifts the pivot clamps 40, 40 from the open condition to close condition when a neck passes inside the pivot clamps 40, 40, and release the pivot clamps 40, 40 after the shift.

Abstract: There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1×1013 atoms/cm3 or more, or with nitrogen doping at a concentration of 1×1012 atoms/cm3 and carbon doping at a concentration of 0.1×1016−5×1016 atoms/cm3 and/or boron doping at a concentration of 1×1017 atoms/cm3 or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer. The present invention provides an epitaxial wafer for a large-scale integrated device having no defects in a device-active region and having an excellent gettering effect without performance of an extrinsic or intrinsic gettering treatment.

Abstract: The present invention has an object to provide a retention plate used in a polishing device that mirror polishes semiconductor substrates such as silicon wafers, particularly a retention plate used with the hard chuck method, that can prevent roll-off, and can achieve a high improvement in flatness. According to the present invention, by means of using a retention plate of a constitution that is of a smaller diameter than that of the wafer and which gives a region in which the area of contact with the wafer is reduced by means of groove processing, or a porous structure and the like, on the outer peripheral part, a reduction of the processing pressure of the outer peripheral part becomes possible, and, because the polishing of the region in which roll-off occurs is delayed, the amount removed by polishing becomes uniform over the wafer surface, and high precision wafer processing becomes possible.

Abstract: To minimize and stably suppress worsening of a warpage of a wafer in epitaxial treatment. A semiconductor wafer is flattened by a double-sided grinding machine. Machining strains produced at both sides of the semiconductor wafer are removed to measure a direction of the warpage of the semiconductor wafer. The direction of the warpage is adjusted and then, epitaxial treatment is performed.

Abstract: A defect inspection method and a defect inspection apparatus accurately determine whether potential defects on a surface of a wafer are true defects, and restrains the oversight or the like of defects, permitting reliable quality assurance and accurate quality control to be achieved. The number and positions of detected potential defects are used as the parameters for determining whether potential defects are true defects. The density of potential defects is determined, and the determined density is compared with a set value to decide whether the potential defects are true defects. A surface of a wafer is captured using a differential interference microscope, and the image is processed to count the number of potential defects observed on the surface. The potential defects are detected at the spots where luminance shifts in the captured image. A spatial filter is applied to the captured image to enhance the area where the luminance shifts, and the enhanced area is binarized.