Abstract: Techniques for executing client processes on window servers are disclosed. The techniques allow a client process requiring one or more window extensions to run on a local window server without requiring the local server to support the one or more window extensions. The one or more window extensions can be supported by a remote window server. Accordingly, client processes are able to execute on computer systems that do not locally support the window server or window server extensions, which are required by the client processes.

Abstract: A computer system housing with a curved bezel that forms one or more sideways gap between a side of the computer housing chassis and the bezel attached to that side. Typically, the curved bezel is attached to the front of the chassis with each sideways gap extending perpendicularly from the front of the chassis to a predetermined width and stretching to predetermined length along the front of the chassis. The sideways gaps facilitate increased air inlet from the sides and allow efficient cooling of various system components that are mounted on the chassis and housed within the housing. One or more cooling fans may be mounted at different locations within the housing to optimize air circulation and, hence, cooling within the housing. The chassis may be partitioned into two separate sub-chassis for proper positioning of the cooling fans as well as to accommodate changes in computer system configurations with minimized retooling of the chassis.

Abstract: A computer system housing with a curved bezel that forms one or more sideways gap between a side of the computer housing chassis and the bezel attached to that side. Typically, the curved bezel is attached to the front of the chassis with each sideways gap extending perpendicularly from the front of the chassis to a predetermined width and stretching to predetermined length along the front of the chassis. The sideways gaps facilitate increased air inlet from the sides and allow efficient cooling of various system components that are mounted on the chassis and housed within the housing. One or more cooling fans may be mounted at different locations within the housing to optimize air circulation and, hence, cooling within the housing. The chassis may be partitioned into two separate sub-chassis for proper positioning of the cooling fans as well as to accommodate changes in computer system configurations with minimized retooling of the chassis.

Abstract: The present invention provides a system and method within a high availability network for monitoring and managing cluster membership. The cluster membership monitor provides the ability to maintain a list of current cluster members, monitor status of each peer node on the cluster, stay apprised of each nodes viability, elect a master node for the cluster when necessary, and coordinate reformation as members join and leave the cluster.

Abstract: A stage of a multi-stage, self-timed datapath circuit calculates one or more data outputs as a function of one or more data inputs. Data outputs are calculated by multiple logical elements that operate simultaneously and produce internal results as inputs to other logical elements within a stage. An internal completion signal generator detects completion of a predetermined set of the internal results calculation and, in response, generates an completion signal for each internal result detected. A done signal generator receives the completion signals and, in response to one or more preselected combinations of the completion signals, provides a done signal. The done signal is generated with a predetermined delay such that the delay is at least as long as a time it takes for the stage to calculate a final result.

Abstract: A multiprocessing computer system includes a plurality of nodes interconnected through a global interconnect network which supports cluster communications. An initiating node may launch a request to a remote node's memory. In one specific implementation, the address base of the system is divided into “slices”. Different slices may correspond to the local memory of differing cluster nodes. The system interface of each node advantageously includes a lookup table which is used to associate selected address regions, or slices, with specific remote nodes for which the slices are local. Accordingly, when a processor within a node initiates a transaction on a local bus, the system interface of that node accesses its lookup table to determine whether that transaction should be conveyed to a remote node, as determined by the corresponding entry of the lookup table for that transaction's address. Otherwise, the transaction is a local transaction and is not conveyed upon the global bus network.

Abstract: An adaptive memory control determines optimal values for the refresh period and row and column address strobe signal frequency of an associated DRAM. A binary test pattern is written to the DRAM array, read during a subsequent read operation, and then compared to the original test pattern. If a match, the 1's complement of the test pattern is written to the array and then compared as described above with the original 1's complement pattern. If a match, the process is repeated using a more aggressive value for the desired parameter, i.e., refresh period, strobe frequency, etc. If at any point the comparison does not result in a match, a more conservative parameter value is used for the subsequent write, read, and compare sequence. This process continues until an optimal value for each desired parameter is determined.

Abstract: In accordance with the present invention a method and system for transmitting multibyte characters in a network comprises the steps, performed by a processor, of receiving a set of fixed-length characters; converting each fixed-length character into a multibyte character to determine a length corresponding to the multibyte characters; and transmitting the length and the multibyte characters.

Abstract: Several embodiments of a computer system are described which achieve separation of control and data paths during data transfer operations, thus allowing independent scalability of storage system performance factors (e.g., storage system ops and data transfer rate). In one embodiment, the computer system includes a data switch coupled between a host computer and one or more storage devices. A storage controller for managing the storage of data within the one or more storage devices is coupled to the switch. The switch includes a memory for storing data routing information generated by the controller, and uses the data routing information to route data directly between the host computer and the one or more storage devices such that the data does not pass through the storage controller. Within the computer system, information may be conveyed between the host computer, the switch, the one or more storage devices, and the storage controller according to a two party protocol such as the Fibre Channel protocol.

Abstract: An architecture for components of a vehicle, wherein the architecture facilitates the upgrading, replacement, removal or addition of the components in the vehicle. In one embodiment, a network is installed in the vehicle, wherein the network comprises a transmission medium and one or more network devices coupled thereto. The network devices are addressable using IP addresses or object terminology. The network devices may be configured to determine the capabilities of other devices, or they may be configured to look up the services provided by devices on the network, and they may utilize these services and capabilities themselves. The network devices are not constrained to use predetermined designs or interfaces which may be necessitated by the use of proprietary buses or connections. The network devices may be automatically integrated into the network using a discover-and-join protocol and may easily be removed from the network.

Abstract: A computer system is described including a processor for executing instructions, a memory module for storing instructions and data, and a memory controller coupled between the processor and the memory module. The memory controller provides a differential clock signal and memory access signals which are routed to the memory module. The memory module includes multiple memory devices coupled to a clock buffer. The clock buffer produces a new single-ended “regenerated” clock signal from the differential clock signal. The clock buffer includes an input buffer circuit and a phase-locked loop (PLL). The input buffer circuit receives the differential clock signal from the memory controller and produces a single-ended reference clock signal from the differential clock signal. The PLL produces the regenerated clock signal substantially at the same frequency of, and in synchronization with, the single-ended reference clock signal produced by the input buffer circuit.

Abstract: A synchronous dynamic random access memory controller has a high speed interface and a low speed interface. The high speed interface has a buffer with entries for receiving transactions, and the buffer has a valid bit for each entry. The entries store transactions that are received from a high speed bus. The low speed interface retrieves transactions from the buffer. The high speed interface and low speed interface each have state machines that synchronize the high speed and low speed interfaces using the valid bit for each of the entries.

Abstract: The present invention provides a method and apparatus for generating three-dimensional bar charts by interspersing non-rectangular shapes amongst rectangular boxes so that the rectangular boxes and non-rectangular shapes tend not to obscure each other. To this end, one embodiment of the present invention provides a method that operates by receiving a set of data values to be displayed in the three-dimensional bar chart. The set of data values is divided into two subsets. A first subset is represented by rectangular boxes projecting from a two-dimensional grid, so that a height of a given box above the two-dimensional grid bears a functional relationship to a data value being displayed by the given box. A second subset is represented by non-rectangular shapes projecting from the two-dimensional grid, which are interspersed between the rectangular boxes, so that a height of a given non-rectangular shape bears a functional relationship to a data value being displayed by the given non-rectangular shape.

Abstract: An apparatus and method for allocating a memory in a cache aware manner are provided. An operating system can be configured to partition a system memory into regions. The operating system can then allocate corresponding portions within each region to various programs that include the operating system and applications. The portions within each region of the system memory can map into designated portions of a cache. The size of a portion of memory allocated for a program can be determined according to the needs of the program.

Abstract: Methods, data formats, and computer program products are disclosed for exchanging configuration data between a configuration server schema residing on a configuration server and a network directory service. The exchange of data is significantly enhanced through the use of an extension to a network directory service enabling a rapid mapping between a directory service attribute and a configuration server property. A directory service entry includes multiple shadow attributes where each shadow attribute corresponds to a particular directory service attribute. The particular directory service attribute, in turn, has a corresponding property in the configuration server. The extension also includes a correspondence or path matching file that contains matches between directory service addresses and configuration server location identifier or paths.

Abstract: One embodiment of the present invention provides a computer readable memory including an array descriptor data structure which contains information on an organization of an array of data values in order to facilitate accesses into the array of data values. This array descriptor data structure includes a starting address of the array in the memory, and a group of extents, including an extent value for each dimension of the array, the extent value for a given dimension quantifying a number of elements in the given dimension. This array descriptor additionally includes a group of strides, including a stride value for each dimension of the array, the stride value of a given dimension quantifying a distance in array elements between consecutive array locations in the given dimension. Also included in the array descriptor data structure is a group of lower bound addresses, including a lower bound address for each dimension of the array.

Abstract: A data visualization arrangement for facilitating the display of data items comprising a selected region of an object in a selected one of a plurality of display modes. The arrangement comprises a data object store, an interface, an object region retrieval component and a display. The data object store stores the data object, the data object comprising a plurality of data items in a predetermined organization. The interface receives a region identification for identifying a particular region of the object and a display mode identification. The object region retrieval component retrieves data items from a region of the data object as identified by the region identification received by the interface. Finally, the display receives the data items as retrieved by the object region retrieval mechanism and displays them in the display mode as identified by the display mode identification.

Abstract: The invention provides a method of creating and periodically loading a database of classfiles on a non traditional computer device, such as a PDA (personal digital assistant), cellular telephone, pager, appliances, or other embedded device. A resident Java virtual machine loads classes from this database instead of loading them from a file system. The embedded device is periodically updated by connecting it to a network or computer that includes a classfile source. At this time, records can be added to, or deleted from, the database (where the records are classfiles). The management of the classfile database on the embedded device is independent of the virtual machine on the embedded device. One embodiment of the invention comprises an embedded device with a virtual machine, a classfile database, a database manager, and a remote database loader. The embedded device and virtual machine can function even when not connected to the classfile source.

Abstract: A method may be provided which controls the output impedance of a driver which includes within the driver an impedance circuit and a slew rate control. Accordingly, a desired output slew rate and a desired output impedance can be advantageously established and maintained over a wide range of variations in operating conditions, manufacturing processes and output voltage levels. Such a method also advantageously limits any crowbar current, thereby reducing the overall power consumption of the driver with little, if any, degradation of driver performance.

Abstract: A file server system tolerant to hardware and software failures is located over a plurality of hardware nodes. The nodes of the system act as hosts for software components of the system. Several of the software components can be replicated. The replicable software components include the system file store, a checker and a logger. The replicated components have one primary copy and one or more back-up copies. Replica copies of a given replicated component are each located at different nodes. Location and handling of replica copies of a given replicable component is under the control of a replication manager which is a (non-replicable) software component of the system. The replication manager is distributed meaning it can have one of its instances running on each node of the system. These instances inter-communicate to maintain coherence. The failure detector is also distributed, its instances running on each of the nodes, and contributing to an early detection of hardware and software failures.