Abstract: In one embodiment, a node comprises a plurality of processor cores, coherency control circuitry coupled to the plurality of processor cores, and at least one coherence unit coupled to the coherency control circuitry. Each processor core is configured to have a plurality of threads active and each processor core includes at least one first level cache. The coherency control circuitry is configured to manage intranode coherency among the plurality of processor cores. The coherency unit is configured to couple to an external interface of the node, and is configured to transmit and receive coherence messages on the external interface to maintain coherency with at least one other node having one or processor cores and a coherence unit. In another embodiment, a system comprises an interconnect and a plurality of nodes coupled to the interconnect.
Type:
Grant
Filed:
August 17, 2005
Date of Patent:
July 8, 2008
Assignee:
Sun Microsystems, Inc.
Inventors:
Ricky C. Hetherington, Stephen E. Phillips
Abstract: A method is provided for selectively accessing first and second event histories that are merged together. A graphical user interface displays events within the merged history. Access may be selectively provided to a last event immediately preceding a merge juncture within the sequential history associated with the first or the second history via the graphical user interface when the merged event is accessed. In addition or in the alternative, access may be selectively provided to the merged event via the graphical user interface when the last event associated with the first or second history is accessed. Additional interrelated methods, apparatuses, computer program products and computer systems are described.
Abstract: One embodiment of the present invention provides a system that avoids locks by transactionally executing critical sections. During operation, the system receives a program which includes one or more critical sections which are protected by locks. Next, the system modifies the program so that the critical sections which are protected by locks are executed transactionally without acquiring locks associated with the critical sections.
Type:
Grant
Filed:
August 1, 2005
Date of Patent:
July 8, 2008
Assignee:
Sun Microsystems, Inc.
Inventors:
Mark S. Moir, Marc Tremblay, Shailender Chaudhry
Abstract: A heatsink includes a heatsink base, an elastomeric base, multiple slider pins and an alignment frame coupled to the heatsink base. The elastomeric base includes multiple holes, the elastomeric base coupled to the perimeter of the heatsink base. Each of the slider pins secured in one of the holes in the elastomeric base. The alignment frame supporting and aligning the slider pins as the slider pins move in a direction substantially perpendicular to the heatsink base. A method of assembling a heat spreader is also described.
Abstract: One embodiment of the present invention provides a system that computes a distance metric between computer system workloads. During operation, the system receives a dataset containing metrics that have been collected for a number of workloads of interest. Next, the system uses splines to define bases for a regression model which uses a performance indicator y as a response and uses the metrics (represented by a vector x) as predictors. The system then fits the regression model to the dataset using a penalized least squares (PLS) criterion to obtain functions f1, . . . , fP, which are smooth univariate functions of individual metrics that add up to the regression function f, such that y=f(x)+?= ? i = 1 P ? f i ? ( x i ) + ? , wherein ? represents noise. Finally, the system uses the fitted regression function to define the distance metric.
Abstract: An interface between clients and services in a distributed computing environment is described. Method gates may provide an interface to remotely invoke functions of a service. A method gate may be generated from an advertisement that may include definitions for one or more messages for remotely invoking functions of the service. A client may generate messages containing representations of method calls. The service may invoke functions that correspond to the set of messages. A method gate on the service may unmarshal the message and invoke the function. The client may receive the results of the function directly. Alternatively, the results may be stored, an advertisement to the results may be provided, and a gate may be generated to access the results. Message gates may perform the sending and receiving of the messages between the client and service. In one embodiment, functions of the service may be computer programming language (e.g. Java) methods.
Type:
Grant
Filed:
September 27, 2000
Date of Patent:
July 8, 2008
Assignee:
Sun Microsystems, Inc.
Inventors:
Gregory L. Slaughter, Thomas E. Saulpaugh, Bernard A. Traversat, Mohamed M. Abdelaziz
Abstract: Access to digital content may be controlled by determining digital content to be made accessible via a rights locker describing a user's access rights for digital content associated with the rights locker, determining enrollment authentication data, and sending a rights locker enrollment request to a rights locker provider, where the rights locker enrollment request comprises a digital content request and the enrollment authentication data. An authenticated rights locker access request is received in response to the sending, where the authenticated rights locker access request is for subsequent use in accessing digital content associated with the rights locker.
Abstract: One embodiment of the present invention provides a system that transparently interconnects multiple network links into a single virtual network link. During operation, a Rbridge (Rbridge) within the system receives a packet, wherein the Rbridge belongs to a set of one or more Rbridges that transparently interconnect the multiple network links into the single virtual network link. These Rbridges automatically obtain information specifying which endnodes are located on the multiple network links without the endnodes having to proactively announce their presence to the Rbridges. If a destination for the packet resides on the same virtual network link, the Rbridge routes the packet to the destination. This route can be an optimal path to the destination, and is not constrained to lie along a spanning tree through the set of Rbridges.
Abstract: A data storage tape cartridge is provided with a combination tape including a data storage tape, an intermediate portion and a leader. A servo track and media information region is provided on the intermediate portion of the tape. The servo track is read by a servo track reader of a data storage apparatus. The media information region is read by the read/write head of the data storage apparatus.
Type:
Application
Filed:
December 29, 2006
Publication date:
July 3, 2008
Applicant:
SUN MICROSYSTEMS, INC.
Inventors:
William J. Vanderheyden, Robert O. Wyman, John D. Willems
Abstract: A method and system suitable for use in organize communications in a network. The organization process optionally being suitable to facilitating nodal communications so as to minimize energy consumption and activity periods associated with nodal communications. The process being adaptable for use with any number of nodes, such as but not limited to nodes associated with wireless sensor nets or other networks.
Abstract: A linear tape drive system includes a tape having a path direction, a data track having data transitions at an azimuthal orientation relative to the path direction, and a servo track having servo positioning transitions. A linear tape drive module is configured to read and/or write to the data track at the azimuthal orientation and read the servo positioning transitions.
Abstract: A method for archiving a file that has multiple file parts stored on multiple object storage devices of a computer system includes the steps of saving the file parts on one or more archive devices, allowing one or more changes to be made to the file during the saving step, and applying at least one of the changes made during the saving step to one of the file parts stored on a respective object storage device. Furthermore, the method is performed such that the file parts saved on the one or more archive devices do not include the one or more changes made to the file during the saving step.
Abstract: Data tracks are written across a width of a tape by positioning a first head section across the tape and writing a first subset of data tracks onto the tape with a first plurality of write elements on the first head section. A second head section is positioned across the tape separately from the first head. A second subset of data tracks is written onto the tape with a second plurality of write elements on the second head section so that the second subset is interleaved with the first subset. A third head section is positioned across the tape separately from the first head and the second head. The first subset and second subsets are read with a plurality of read elements on the third head section to verify that data was correctly written onto the tape.
Abstract: A small footprint device can securely run multiple programs from unrelated vendors by the inclusion of a context barrier isolating the execution of the programs. The context barrier performs security checks to see that principal and object are within the same namespace or memory space and to see that a requested action is appropriate for an object to be operated upon. Each program or set of programs runs in a separate context. Access from one program to another program across the context barrier can be achieved under controlled circumstances by using a global data structure.
Type:
Grant
Filed:
November 22, 2004
Date of Patent:
July 1, 2008
Assignee:
Sun Microsystems, Inc.
Inventors:
Joshua Susser, Mitchel B. Butler, Andy Streich
Abstract: A transactional memory implementation has been developed that is capable of coordinating concurrent hardware transactional memory (HTM) and software transactional memory (STM) transactions over a unified transactional memory space. Some implementations employ hardware transactional memory, if available or suitable, to improve performance. Some exploitations include a hardware transactional memory in which, or for which, hardware-mediated transactions are augmented to include within their transactional scope (or mechanism) one or more additional transactional locations that facilitate coordination with concurrently executing software-mediated transactions (if any).
Abstract: We explore techniques for designing nonblocking algorithms that do not require advance knowledge of the number of processes that participate, whose time complexity and space consumption both adapt to various measures, rather than being based on predefined worst-case scenarios, and that cannot be prevented from future memory reclamation by process failures. These techniques can be implemented using widely available hardware synchronization primitives. We present our techniques in the context of solutions to the well-known Collect problem. We also explain how our techniques can be exploited to achieve other results with similar properties; these include long-lived renaming and dynamic memory management for nonblocking data structures.
Type:
Grant
Filed:
July 16, 2003
Date of Patent:
July 1, 2008
Assignee:
Sun Microsystems, Inc.
Inventors:
Mark S. Moir, Victor M. Luchangco, Maurice Herlihy
Abstract: A floating point unit generates results in which status information generated for an operation is encoded within the resulting operand, instead of requiring a separate floating point status register for the status information. In one embodiment, a floating point operand data structure includes a first portion having floating point operand data and a second portion having embedded status information associated with at least one status condition of the operand data. The status condition may be determined from only the embedded status information. The status condition may also be associated with at least one floating point operation that generated the operand data structure. The outcome of a conditional floating point instruction may be based on the embedded status information without regard to contents of the floating point status register.
Abstract: One embodiment of the present invention provides a system for operating a key distribution center (KDC) that provides keys to facilitate secure communications between clients and servers across a computer network, wherein the system operates without having to store long-term server secrets. The system operates by receiving a communication from a server at the KDC. This communication includes an identifier for the server, as well as a temporary secret key to be used in communications between a client and the server for a limited time period. In response the communication, the system attempts to authenticate the server. If the server is successfully authenticated, the system stores the temporary secret key at the KDC, so that the temporary secret key can be subsequently used to facilitate communications with the server.
Abstract: A method of tuning a test trace that is capacitively coupled to a number of signal traces. A method for determining a configuration of a device comprising signal traces and a capacitively coupled test trace may include selecting a test frequency of a test signal to be driven on selected signal traces during a test mode of device operation, and tuning circuit characteristics of the test trace to generate a bandpass frequency response including a passband and a stopband, where a detection frequency corresponding either to the test frequency or a selected harmonic of the test frequency is included in the passband. Tuning of circuit characteristics may include selecting a degree of capacitive coupling between the test trace and the signal traces such that, within a specified constraint for signal degradation on the signal traces, the bandpass frequency response of the given test trace satisfies a specified transmission requirement at the detection frequency.
Type:
Grant
Filed:
May 24, 2006
Date of Patent:
July 1, 2008
Assignee:
Sun Microsystems, Inc.
Inventors:
Margaret H. Wang, Prabhansu Chakrabarti
Abstract: A method for managing an application server that is configured to execute a plurality of test applications is provided. The method includes the operations of (a) processing a first one of the plurality of test applications, (b) determining if the first application fails to be processed to completion, (c) recording an exception identifying an explanation for the failure if the first test application fails to be processed to completion, (d) refreshing the application server, (e) executing a next one of the plurality of test applications, and (f) repeating operations (a) through (e) if there are remaining ones of the plurality of test applications that still need to be processed.