Patents Assigned to SunEdison Semiconductor Limited
  • Methods for producing silicon on insulator structures having high resistivity regions in the handle wafer
    Patent number: 8846493
    Abstract: Silicon on insulator structures having a high resistivity region in the handle wafer of the silicon on insulator structure are disclosed. Methods for producing such silicon on insulator structures are also provided. Exemplary methods involve creating a non-uniform thermal donor profile and/or modifying the dopant profile of the handle wafer to create a new resistivity profile in the handle wafer. Methods may involve one or more SOI manufacturing steps or electronic device (e.g., RF device) manufacturing steps.
    Type: Grant
    Filed: March 13, 2012
    Date of Patent: September 30, 2014
    Assignee: SunEdison Semiconductor Limited
    Inventors: Jeffrey L. Libbert, Lu Fei, Robert W. Standley
  • Systems and methods for cleaving a bonded wafer pair
    Patent number: 8845859
    Abstract: Systems and methods are provided for mechanically cleaving a bonded wafer pair by controlling the rate of cleaving. This controlled rate of cleaving results in a reduction or elimination of non-uniform thickness variations in the cleaved surface of the resulting SOI wafer. One embodiment uses flexible chucks attached to the faces of the wafers and actuators attached to the flexible chucks to cleave the bonded wafer pair. Other embodiments also use rollers in contact with the surfaces to control the rate of cleaving.
    Type: Grant
    Filed: March 12, 2012
    Date of Patent: September 30, 2014
    Assignee: SunEdison Semiconductor Limited (UEN201334164H)
    Inventors: Michael John Ries, Jeffrey L. Libbert, Dale A. Witte
  • Systems and methods for reducing dust in granular material
    Patent number: 8833564
    Abstract: A method of removing dust from granular polysilicon includes introducing a stream of granular polysilicon, dispersing the longitudinal stream of granular polysilicon by redirecting the stream into a radially outward flow having a circular pattern, and introducing a counter flow of gas in an opposite direction to that of the longitudinal stream of granular polysilicon to contact the radially outward flow to separate the dust from the granular polysilicon.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: September 16, 2014
    Assignee: SunEdison Semiconductor Limited
    Inventors: Seok-Min Yun, Seong-Su Park, Se-Myung Kim, Won-Jin Choi, Woo-Jin Yoon
  • Methods for monitoring the amount of metal contamination in a process
    Patent number: 8822242
    Abstract: Methods are disclosed for monitoring the amount of metal contamination imparted during wafer processing operations such as polishing and cleaning. The methods include subjecting a silicon-on-insulator structure to the semiconductor process, precipitating metal contamination in the structure and delineating the metal contaminants.
    Type: Grant
    Filed: January 18, 2012
    Date of Patent: September 2, 2014
    Assignee: Sunedison Semiconductor Limited (UEN201334164H)
    Inventors: Jeffrey L. Libbert, Lu Fei
  • Methods for reducing the metal content in the device layer of SOI structures and SOI structures produced by such methods
    Patent number: 8796116
    Abstract: Methods for producing silicon on insulator structures with a reduced metal content in the device layer thereof are disclosed. Silicon on insulator structures with a reduced metal content are also disclosed.
    Type: Grant
    Filed: January 20, 2012
    Date of Patent: August 5, 2014
    Assignee: SunEdison Semiconductor Limited
    Inventors: Alexis Grabbe, Larry Flannery