Patents Assigned to SYSTEM INC.
  • Patent number: 11878993
    Abstract: Disclosed herein, interalia, are compounds, compositions, and methods of using the same for the sequencing of a nucleic acid.
    Type: Grant
    Filed: April 4, 2023
    Date of Patent: January 23, 2024
    Assignee: Singular Genomics Systems, Inc.
    Inventors: Ronald Graham, Olga Adelfinskaya, Megha Cila, Rodrigo Rodriguez, Abrehet Abdu, Eli N. Glezer
  • Publication number: 20240017225
    Abstract: A novel canister storage system, mixing system, canister assembly, dispensing system, and tracking system. In one or more embodiments, the systems are used for storing, mixing and dispensing fluids. In one application, the fluid includes one or more paint toners.
    Type: Application
    Filed: September 27, 2023
    Publication date: January 18, 2024
    Applicant: X-PERT Paint Mixing Systems, Inc.
    Inventors: Peter Santrach, Bruce Funk, Barry Hines, Christopher Herman
  • Publication number: 20240021058
    Abstract: An identification information-calculating type electromagnetic wave transmission/reception-based intrusion surveillance system is proposed. The system is provided to detect an external intrusion by transmitting and receiving an electromagnetic wave signal between an electromagnetic wave signal transmission module and an electromagnetic wave signal reception module, which are installed to face with each other while forming a set in an access surveillance area.
    Type: Application
    Filed: August 30, 2021
    Publication date: January 18, 2024
    Applicant: E2 SYSTEM INC.
    Inventor: Yun Doh HWANG
  • Publication number: 20240018730
    Abstract: A roadway warning device including a portable rumble strip that includes high-density filler material to achieve a desired overall density and roadway stability of the rumble strip such as for use in high-speed traffic conditions without the use of conventional rigid metal ballast inserts. In some embodiments, the filler is dispersed and embedded within a flexible polymer composite matrix of the rumble strip body. In some embodiments, the filler is in the form of discrete unbound pieces of material disposed within a cavity of the rumble strip body. In some embodiments, the filler is in the form of a frangible article disposed within the rumble strip body.
    Type: Application
    Filed: February 22, 2022
    Publication date: January 18, 2024
    Applicant: Plastic Safety Systems, Inc.
    Inventor: Donald REITER
  • Publication number: 20240022912
    Abstract: Systems, methods, and apparatuses for providing dynamic, prioritized spectrum utilization management. The system includes at least one monitoring sensor, at least one data analysis engine, at least one application, a semantic engine, a programmable rules and policy editor, a tip and cue server, and/or a control panel. The tip and cue server is operable utilize the environmental awareness from the data processed by the at least one data analysis engine in combination with additional information to create actionable data.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 18, 2024
    Applicant: Digital Global Systems, Inc.
    Inventors: Armando Montalvo, Dwight Inman
  • Publication number: 20240020170
    Abstract: A cost estimation tool in a system for implementing an operation unit graph on a reconfigurable processor is presented as well as a method of operating a cost estimation tool for estimating a cost of implementing an operation unit graph. The operation unit graph may include first and second logical units that perform first and second data operations and have first and second ports, respectively, coupled by a logical edge, on a reconfigurable processor. The method includes receiving the operation unit graph, determining first and second upper bandwidth limits of the first and second ports, respectively, determining a logical edge bandwidth of the logical edge based on the first and second upper bandwidth limits, determining a timing group for the logical edge, and providing the logical edge bandwidth and the timing group as a cost estimation of implementing the operation unit graph on the reconfigurable processor.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 18, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Yue FU, Kin Hing LEUNG, Arvind Krishna SUJEETH, Sumti JAIRATH, Andrew DENG, Chris RÉ, Raghu PRABHAKAR
  • Publication number: 20240019327
    Abstract: In an aspect, a pressure sensor for determining pressure in an environment comprises: a source for emitting a coherent reference light characterized by a reference light frequency; a first lock-in mechanism configured to send an electrical signal to the source based on a reference resonance frequency; a reference cavity; wherein the reference cavity is characterized by the reference resonance frequency; a modulator configured a reference light to generate at least a first sideband frequency such that an output of said modulator is a measurement light characterized by at least the first sideband frequency; a frequency synthesizer configured to drive the modulator; a second lock-in mechanism configured to send an electrical signal to the frequency synthesizer based on a measurement resonance frequency; and a measurement cavity configured to receive at least a portion of the measurement light; wherein the measurement cavity is characterized by the measurement resonance frequency; and wherein the pressure of the
    Type: Application
    Filed: September 28, 2023
    Publication date: January 18, 2024
    Applicant: Stable Laser Systems, Inc.
    Inventors: Josue DAVILA-RODRIGUEZ, David LEE, Mark NOTCUTT, Michael GRISHAM, Nathaniel PHILLIPS
  • Publication number: 20240020264
    Abstract: A cost estimation tool in a system for implementing an operation unit graph on a reconfigurable processor is presented as well as a method of operating a cost estimation tool for determining scaled logical edge bandwidths in an operation unit graph in preparation of placing and routing the operation unit graph onto a reconfigurable processor. The cost estimation tool may be configured to receive the operation unit graph, divide the operation unit graph in first and second subgraphs, determine maximum latencies of the first and second subgraphs, and determine a scaled logical edge bandwidth of a logical edge that couples a first logical unit of M logical units in the first subgraph with a second logical unit of N logical units in the first subgraph based on M, N, and scaled bandwidth limits of the M and N logical units.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 18, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Yue FU, Kin Hing LEUNG, Joshua BROT, Arvind Krishna SUJEETH, Sumti JAIRATH, Andrew DENG, Chris RÉ, Raghu PRABHAKAR
  • Publication number: 20240023054
    Abstract: Apparatus and methods for identifying a wireless signal-emitting device are disclosed. The apparatus is configured to sense and measure wireless communication signals from signal-emitting devices in a spectrum. The apparatus is operable to automatically detect a signal of interest from the wireless signal-emitting device and create a signal profile of the signal of interest; compare the signal profile with stored device signal profiles for identification of the wireless signal-emitting device; and calculate signal degradation data for the signal of interest based on information associated with the signal of interest in a static database including noise figure parameters of a wireless signal-emitting device outputting the signal of interest. The signal profile of the signal of interest, profile comparison result, and signal degradation data are stored in the apparatus.
    Type: Application
    Filed: September 28, 2023
    Publication date: January 18, 2024
    Applicant: Digital Global Systems, Inc.
    Inventors: Ronald C. Dzierwa, Daniel Carbajal, David William Kleinbeck
  • Publication number: 20240020261
    Abstract: A reconfigurable dataflow unit (RDU) includes an intra-RDU network, an array of configurable units connected by an array level network and function interfaces. The RDU also includes interface circuits coupled between the intra-RDU network and external interconnects. An interface circuit receives a packet from the external interconnect and extracts a target RDU identifier and compares the target RDU identifier to the value of the identity register. It also communicates over the intra-RDU network to a function interface based on information in the first packet in response to the target RDU identifier being equal to the identity register. The interface circuit retrieves another interface circuit identifier for the target RDU identifier from the pass-through table and, in response to the target RDU identifier not being equal to the identity register, sends the target RDU identifier and other information to the other interface circuit over the intra-RDU network.
    Type: Application
    Filed: July 5, 2023
    Publication date: January 18, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Paul JORDAN, Manish K. SHAH, Emre Ali BURHAN, Dawei HUANG, Yong QIN
  • Publication number: 20240020265
    Abstract: A system with a cost estimation tool for estimating a realized bandwidth consumption of a logical edge between a logical producer unit and a logical consumer unit of an operation unit graph during placement and routing of the logical producer unit, the logical consumer unit, and the logical edge onto a reconfigurable processor is presented as well as a method of operating such a cost estimation tool and a non-transitory computer-readable storage medium including instructions that, when executed by a processing unit, cause the processing unit to operate such a cost estimation tool The cost estimation tool may be configured to determine the realized bandwidth consumption of the tentative assignment based on an upper bandwidth limit of the logical edge, an end-to-end bandwidth, a scaling factor of a realized bandwidth, and a congestion estimation of the physical link.
    Type: Application
    Filed: July 13, 2023
    Publication date: January 18, 2024
    Applicant: SambaNova Systems, Inc.
    Inventors: Yue FU, Kin Hing LEUNG, Likun HAO, Arvind Krishna SUJEETH, Sumti JAIRATH, Andrew DENG, Chris RÉ, Raghu PRABHAKAR
  • Patent number: 11874252
    Abstract: An apparatus for ion manipulation having improved duty cycle includes first and second separation regions separated by a switch that alternates between guiding ions to each of the separation regions. The separation regions separate the ions based on mobility over respective time periods that at least partially overlap. The apparatus can additionally or alternatively include a pre-separation region that filters ions prior to accumulating ions, thus allowing an accumulation region to accumulate for a longer time period. The apparatus can additionally or alternatively include a plurality of gates along the separation region(s) to simultaneously filter a plurality of ion packets sequentially released into the separation region(s).
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: January 16, 2024
    Assignee: MOBILion Systems, Inc.
    Inventors: John Daniel DeBord, Liulin Deng, Nathan Paul Roehr
  • Patent number: 11876310
    Abstract: A system for providing power to a device is provided. The system includes at least one gateway that provides power and/or data to at least one device in the system; and at least one adapter coupled to the gateway and the at least one device, wherein the adapter is configured to couple lengths of cable between devices that are daisy chained together. Related adapters are also provided herein.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: January 16, 2024
    Assignee: Wiser Systems, Inc.
    Inventors: Seth Edward-Austin Hollar, Ryan Michael Tedrick, Scott Fisher
  • Patent number: 11872045
    Abstract: Electrodes for use in electroencephalographic recording, including consciousness and seizure monitoring applications, have novel features that speed, facilitate or enforce proper placement of the electrodes, including aligning tabs and arrowed aligning juts, color coding, and an insulating bridge between reference and ground electrodes which ensures a safe application distance between the conductive regions of the two electrodes in the event of cardiac defibrillation or to prevent shorting between the adjacent electrodes by preventing the conductive path to be shared. A method of using a set of four such electrodes is also disclosed.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: January 16, 2024
    Assignee: Neuro Wave Systems Inc.
    Inventors: Stéphane Bibian, Tatjana Zikov
  • Patent number: 11876798
    Abstract: A virtual delivery appliance may communicate with a client device over a network to provide the client device with a virtualized session for a user. A processor may be configured to communicate with the client device over the network to perform a registration operation with a relying party. An application within the virtualized session may perform an authentication operation with the relying party to access a resource. The processor may be configured to forward an authentication challenge message to the client device in response to the application receiving the authentication challenge message from the relying party for the user to access the resource, and receive an authentication answer message in response to the authentication challenge message from the client device.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: January 16, 2024
    Assignee: Citrix Systems, Inc.
    Inventors: Ashwin Suresh, Jason Vega Paez, Georgy Momchilov, Jayadev Marulappa Niranjanmurthy, Mark D. Howell
  • Patent number: 11874788
    Abstract: Embodiments included herein are directed towards a transmitter circuit. The circuit may include a most significant bit (“MSB”) main driver and a most significant bit boost driver operatively connected to the MSB main driver. The circuit may also include a least significant bit (“LSB”) main driver and a least significant bit boost driver operatively connected to the LSB main driver, wherein the MSB main driver and the LSB main driver are configured to receive two parallel non-return-to-zero (“NRZ”) data inputs.
    Type: Grant
    Filed: June 24, 2022
    Date of Patent: January 16, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventor: Vinod Kumar
  • Patent number: 11876858
    Abstract: A process can include receiving monitoring information associated with a machine learning (ML) or artificial intelligence (AI) workload implemented by an edge compute unit of a plurality of edge compute units. Status information corresponding to a plurality of connected edge assets can be received, the plurality of edge compute units and connected edge assets included in a fleet of edge devices. A remote fleet management graphical user interface (GUI) can display a portion of the monitoring or status information for a subset of the fleet of edge devices, based on a user selection input, and can receive a user configuration input indicative of an updated configuration for at least one workload corresponding to a pre-trained ML or AI model deployed on the at least one edge compute unit. A cloud computing environment can transmit control information corresponding to the updated configuration to the at least one edge compute unit.
    Type: Grant
    Filed: September 5, 2023
    Date of Patent: January 16, 2024
    Assignee: Armada Systems Inc.
    Inventors: Pradeep Nair, Pragyana K Mishra, Anish Swaminathan, Janardhan Prabhakara
  • Patent number: 11873668
    Abstract: A vehicle interior assembly includes a frame and a fall away door that closes off an opening in the frame when in a closed position. The door moves between the closed position and an open position via sequential vertical and horizontal movements. From the closed position, the door first drops vertically to a dropped position. A final portion of this vertical movement may be damped movement. From the dropped position, the door moves horizontally to the open position, at which the door is concealed from view from the exterior of the assembly. Various guides can be provided to define the movement path of the door. Various types of non-visible sensors can be used to detect a user's intention to open and close the door.
    Type: Grant
    Filed: April 23, 2021
    Date of Patent: January 16, 2024
    Assignee: Faurecia Interior Systems, Inc.
    Inventors: Hugo Piccin, Julien Mohy-Paci, Jean-Michel Azevedo, Thomas Dessapt
  • Patent number: 11876650
    Abstract: An equalizer includes a first feed-forward stage that provides a measure of low-frequency ISI and a second feed-forward stage that includes a cascade of stages each making an ISI estimate. The ISI estimate from each stage is further equalized by application of the measures of low-frequency ISI from the first feed-forward stage and fed to the next in the cascade of stages. The ISI estimates from the stages thus become progressively more accurate. The number of stages applied to a given signal can be optimized to achieve a suitably low bit-error rate. Power is saved by disabling stages which are not required to meet that goal.
    Type: Grant
    Filed: November 1, 2022
    Date of Patent: January 16, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Prashant Choudhary, Nanyang Wang
  • Patent number: 11876521
    Abstract: The present disclosure relates to dynamically updating a delay line code. A method for updating the delay line code may include receiving a strobe input at a coarse delay line. The method may further include receiving a coarse delay cell code at the coarse delay line. The method may also include generating a first clock path based upon a first chain of interleaved logic gates included within the coarse delay line. The method may additionally include generating a second clock path based upon a second chain of interleaved logic gates included within the coarse delay line. The method may further include receiving the first clock path, and the second clock path, and a fine delay cell code at a fine delay cell. The method may also include generating a strobe delayed output based upon the first clock path, and the second clock path, and the fine delay code.
    Type: Grant
    Filed: April 26, 2022
    Date of Patent: January 16, 2024
    Assignee: Cadence Design Systems, Inc.
    Inventors: Hajee Mohammed Shuaeb Fazeel, Jitendra Kumar Yadav, Thomas Evan Wilson