Patents Assigned to Tahoe Research, LTD.
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Patent number: 12354956Abstract: An embodiment includes a metal interconnect structure, comprising: a dielectric layer disposed on a substrate; an opening in the dielectric layer, wherein the opening has sidewalls and exposes a conductive region of at least one of the substrate and an interconnect line; an adhesive layer, comprising manganese, disposed over the conductive region and on the sidewalls; and a fill material, comprising cobalt, within the opening and on a surface of the adhesion layer. Other embodiments are described herein.Type: GrantFiled: December 29, 2023Date of Patent: July 8, 2025Assignee: Tahoe Research, Ltd.Inventors: Christopher J. Jezewski, Tejaswi K. Indukuri, Ramanan V. Chebiam, Colin T. Carver
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Patent number: 12332069Abstract: Methods, systems, and storage media relating to a vehicle navigator system are disclosed herein. In an embodiment, vehicle operation data relating to one or more characteristics of operation of a motor vehicle may be received. An operation style by which an operator may operate the motor vehicle may be determined from the vehicle operation data. A vehicle location and a destination location may be received. A route may be determined from the vehicle location to the destination location according to the operation style by which an operator operates the motor vehicle. Other embodiments may be disclosed and/or claimed.Type: GrantFiled: May 17, 2023Date of Patent: June 17, 2025Assignee: Tahoe Research, Ltd.Inventor: Jayashree R. Padmanaban
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Patent number: 12324471Abstract: The present invention relates to a helmet that includes an outer shell, a heads-up information system that comprises a display, and an attachment assembly. The heads-up information system is movable from a storage position within the outer shell to a use position in which the display of the heads-up information system is visible by a user, without obstructing the field of vision of the user, when the helmet is worn by the user. The attachment assembly is coupled to outer shell and the heads-up information system, and is operable to move the heads-up information system between the storage position and the use position.Type: GrantFiled: October 2, 2023Date of Patent: June 10, 2025Assignee: Tahoe Research, Ltd.Inventors: Hamid Abdollahi, Raymond C. M. Leung
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Patent number: 12322699Abstract: Embodiments of the invention describe low capacitance interconnect structures for semiconductor devices and methods for manufacturing such devices. According to an embodiment of the invention, a low capacitance interconnect structure comprises an interlayer dielectric (ILD). First and second interconnect lines are disposed in the ILD in an alternating pattern. The top surfaces of the first interconnect lines may be recessed below the top surfaces of the second interconnect lines. Increases in the recess of the first interconnect lines decreases the line-to-line capacitance between neighboring interconnects. Further embodiments include utilizing different dielectric materials as etching caps above the first and second interconnect lines. The different materials may have a high selectivity over each other during an etching process. Accordingly, the alignment budget for contacts to individual interconnect lines is increased.Type: GrantFiled: May 12, 2022Date of Patent: June 3, 2025Assignee: Tahoe Research, Ltd.Inventors: Christopher J. Jezewski, Jasmeet S. Chawla
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Publication number: 20250155949Abstract: Power governance circuitry is provided to control a performance level of a processing unit of a processing platform. The power governance circuitry comprises measurement circuitry to measure a current utilization of the processing unit at a current operating frequency and to determine any change in utilization or power and frequency control circuitry is provided to update the current operating frequency to a new operating frequency by determining a new target quantified power expenditure to be applied in a subsequent processing cycle depending on the determination of any change in utilization or power. A new operating frequency is selected to satisfy the new target quantified power based on a scalability function specifying a variation of a given value of utilization or power with the operating frequency. A processing platform and machine readable instructions are provided to set a new quantified target power of a processing unit.Type: ApplicationFiled: January 14, 2025Publication date: May 15, 2025Applicant: Tahoe Research, Ltd.Inventors: Barnes COOPER, Harinarayanan SESHADRI, Rajeev MURALIDHAR, Noor MUBEEN
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Publication number: 20250150947Abstract: Embodiments of the present disclosure are directed towards devices and methods for identifying preferred access networks based at least in part on access network information including access network assistance information, steering policies, or access commands. In some embodiments, conflicts between access network information and access network discovery and selection function (ANDSF) policies may be rectified in identifying a preferred access network.Type: ApplicationFiled: December 30, 2024Publication date: May 8, 2025Applicant: Tahoe Research, Ltd.Inventors: Alexander SIROTKIN, Nageen HIMAYAT, Sangeetha BANGOLAE
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Publication number: 20250137795Abstract: Methods, systems, and storage media relating to a vehicle navigator system are disclosed herein. In an embodiment, vehicle operation data relating to one or more characteristics of operation of a motor vehicle may be received. An operation style by which an operator may operate the motor vehicle may be determined from the vehicle operation data. A vehicle location and a destination location may be received. A route may be determined from the vehicle location to the destination location according to the operation style by which an operator operates the motor vehicle. Other embodiments may be disclosed and/or claimed.Type: ApplicationFiled: December 31, 2024Publication date: May 1, 2025Applicant: Tahoe Research, Ltd.Inventor: Jayashree R. PADMANABAN
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Patent number: 12261057Abstract: Embodiments of the invention include methods of forming a textile patterned hardmask. In an embodiment, a first hardmask and a second hardmask are formed over a top surface of an interconnect layer in an alternating pattern. A sacrificial cross-grating may then be formed over the first and second hardmasks. In an embodiment, portions of the first hardmask that are not covered by the sacrificial cross-grating are removed to form first openings and a third hardmask is disposed into the first openings. Embodiments may then include etching through portions of the second hardmask that are not covered by the sacrificial cross-grating to form second openings. The second openings may be filled with a fourth hardmask. According to an embodiment, the first, second, third, and fourth hardmasks are etch selective to each other. In an embodiment the sacrificial cross-grating may then be removed.Type: GrantFiled: February 3, 2022Date of Patent: March 25, 2025Assignee: Tahoe Research, Ltd.Inventors: Kevin Lin, Robert Lindsey Bristol, Alan M. Myers
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Patent number: 12248351Abstract: Power governance circuitry is provided to control a performance level of a processing unit of a processing platform. The power governance circuitry comprises measurement circuitry to measure a current utilization of the processing unit at a current operating frequency and to determine any change in utilization or power and frequency control circuitry is provided to update the current operating frequency to a new operating frequency by determining a new target quantified power expenditure to be applied in a subsequent processing cycle depending on the determination of any change in utilization or power. A new operating frequency is selected to satisfy the new target quantified power based on a scalability function specifying a variation of a given value of utilization or power with the operating frequency. A processing platform and machine readable instructions are provided to set a new quantified target power of a processing unit.Type: GrantFiled: March 8, 2023Date of Patent: March 11, 2025Assignee: Tahoe Research, Ltd.Inventors: Barnes Cooper, Harinarayanan Seshadri, Rajeev Muralidhar, Noor Mubeen
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Publication number: 20250079292Abstract: Embodiments of the invention include a microelectronic device that includes a substrate, at least one dielectric layer on the substrate and a plurality of conductive lines within the at least one dielectric layer. The microelectronic device also includes an air gap structure that is located below two or more of the plurality of conductive lines.Type: ApplicationFiled: November 18, 2024Publication date: March 6, 2025Applicant: Tahoe Research, Ltd.Inventors: Han Wui THEN, Sansaptak DASGUPTA, Marko RADOSAVLJEVIC, Sanaz K. GARDNER
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Publication number: 20250065834Abstract: Systems, devices, and techniques are provided for occupancy assessment of a vehicle. For one or more occupants of the vehicle, the occupancy assessment establishes position and/or identity for some or all of the occupant(s).Type: ApplicationFiled: November 8, 2024Publication date: February 27, 2025Applicant: Tahoe Research, Ltd.Inventors: Giuseppe RAFFA, Chieh-Yih WAN, Sangita R. SHARMA, Lama NACHMAN, David L. GRAUMANN
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Patent number: 12213057Abstract: Embodiments of the present disclosure are directed towards devices and methods for identifying preferred access networks based at least in part on access network information including access network assistance information, steering policies, or access commands. In some embodiments, conflicts between access network information and access network discovery and selection function (ANDSF) policies may be rectified in identifying a preferred access network.Type: GrantFiled: April 26, 2023Date of Patent: January 28, 2025Assignee: Tahoe Research, Ltd.Inventors: Alexander Sirotkin, Nageen Himayat, Sangeetha Bangolae
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Publication number: 20250029876Abstract: Subtractive plug and tab patterning with photobuckets for back end of line (BEOL) spacer-based interconnects is described. In an example, a back end of line (BEOL) metallization layer for a semiconductor structure includes an inter-layer dielectric (ILD) layer disposed above a substrate. A plurality of conductive lines is disposed in the ILD layer along a first direction. A conductive tab is disposed in the ILD layer, the conductive tab coupling two of the plurality of conductive lines along a second direction orthogonal to the first direction. A conductive via is coupled to one of the plurality of conductive lines, the conductive via having a via hardmask thereon. An uppermost surface of each of the ILD layer, the plurality of conductive lines, the conductive tab, and the via hardmask is planar with one another.Type: ApplicationFiled: October 7, 2024Publication date: January 23, 2025Applicant: Tahoe Research, Ltd.Inventors: Kevin LIN, Robert L. BRISTOL, Richard E. SCHENKER
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Publication number: 20250022403Abstract: Technology for a display controller is described. The display controller can detect a frame update when the display controller is in a dynamic sleep state. The display controller can wake up from the dynamic sleep state and enter a selective update state at a programmed vertical blanking interrupt (VBI) that precedes an actual VBI. The display controller can perform a scan-out with a display panel during the selective update state. The display controller can return to the dynamic sleep state in a same time frame after the scan-out is completed. The display controller can exclude timing logic to send a VBI at every time frame to the display panel to maintain time synchronization between the display controller and the display panel.Type: ApplicationFiled: September 23, 2024Publication date: January 16, 2025Applicant: Tahoe Research, Ltd.Inventors: Vishal SINHA, Paul DIEFENBAUGH, Todd WITTER, Jason TANNER, Arthur RUNYAN, Nausheen ANSARI, Kathy BUI, Yifan LI
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Publication number: 20250021207Abstract: Technologies for selectively augmenting communications transmitted by a communication device include a communication device configured to acquire new user environment information relating to the environment of the user if such new user environment information becomes available. The communication device is further configured to create one or more user environment indicators based on the new user environment information, to display the one or more created user environment indicators via a display of the communication device and include the created user environment indicator in a communication to be transmitted by the communication device if the created user environment indicator is selected for inclusion in the communication.Type: ApplicationFiled: September 30, 2024Publication date: January 16, 2025Applicant: Tahoe Research, Ltd.Inventors: Glen J. ANDERSON, Jose K. SIA, JR., Wendy MARCH
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Publication number: 20250016943Abstract: Folding devices are disclosed. An example folding device includes a first frame; a second frame; an actuator including a first end coupled to the first frame and a second end hingably coupled to the second frame; and a display coupled to the first and second frames, when the folding device is in a folded position, the display wraps around ends of the first and second frames to cover a joint between the first and second frames, when the folding device rotates from the folded position toward an unfolded position, the actuator urges the ends of the first and second frames away from one another to encourage the display to unwrap from around the ends.Type: ApplicationFiled: September 23, 2024Publication date: January 9, 2025Applicant: Tahoe Research, Ltd.Inventor: Jason M. BRAND
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Patent number: 12191308Abstract: Non-planar semiconductor devices having doped sub-fin regions and methods of fabricating non-planar semiconductor devices having doped sub-fin regions are described. For example, a method of fabricating a semiconductor structure involves forming a plurality of semiconductor fins above a semiconductor substrate. A solid state dopant source layer is formed above the semiconductor substrate, conformal with the plurality of semiconductor fins. A dielectric layer is formed above the solid state dopant source layer. The dielectric layer and the solid state dopant source layer are recessed to approximately a same level below a top surface of the plurality of semiconductor fins, exposing protruding portions of each of the plurality of semiconductor fins above sub-fin regions of each of the plurality of semiconductor fins. The method also involves driving dopants from the solid state dopant source layer into the sub-fin regions of each of the plurality of semiconductor fins.Type: GrantFiled: March 17, 2023Date of Patent: January 7, 2025Assignee: Tahoe Research, Ltd.Inventors: Tahir Ghani, Salman Latif, Chanaka D. Munasinghe
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Publication number: 20250006250Abstract: Techniques to couple a high bandwidth memory device on a silicon substrate and a package substrate are disclosed. Examples include selectively activating input/out (I/O) or command and address (CA) contacts on a bottom side of a logic layer for the high bandwidth device based on a mode of operation. The I/O and CA contacts are for accessing one or more memory devices include in the high bandwidth memory device via one or more data channels.Type: ApplicationFiled: September 9, 2024Publication date: January 2, 2025Applicant: Tahoe Research, Ltd.Inventors: Chong J. ZHAO, James A. McCALL, Shigeki TOMISHIMA, George VERGIS, Kuljit S. BAINS
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Patent number: 12183218Abstract: Computer-readable storage media, computing devices, and methods associated with an adaptive learning environment associated with an adaptive learning environment are disclosed. In embodiments, a computing device may include an instruction module and an adaptation module operatively coupled with the instruction module. The instruction module may selectively provide instructional content of one of a plurality of instructional content types to a user of the computing device via one or more output devices coupled with the computing device. The adaptation module may determine, in real-time, an engagement level associated with the user of the computing device and may cooperate with the instruction module to dynamically adapt the instructional content provided to the user based at least in part on the engagement level determined. Other embodiments may be described and/or claimed.Type: GrantFiled: March 14, 2023Date of Patent: December 31, 2024Assignee: Tahoe Research, Ltd.Inventors: Sinem Aslan, Asli Arslan Esme, Gila Kamhi, Ron Ferens, Itai Diner
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Patent number: 12175274Abstract: Systems, methods, and circuitries are disclosed for a per-process memory encryption system. At least one translation lookaside buffer (TLB) is configured to encode key identifiers for keys in one or more bits of either the virtual memory address or the physical address. The process state memory configured to store a first process key table for a first process that maps key identifiers to unique keys and a second process key table that maps the key identifiers to different unique keys. The active process key table memory configured to store an active key table. In response to a request for data corresponding to a virtual memory address, the at least one TLB is configured to provide a key identifier for the data to the active process key table to cause the active process key table to return the unique key mapped to the key identifier.Type: GrantFiled: August 26, 2022Date of Patent: December 24, 2024Assignee: Tahoe Research, Ltd.Inventors: Wajdi Feghali, Vinodh Gopal, Kirk S. Yap, Sean Gulley, Raghunandan Makaram