Abstract: A method is provided that provides a test of an interconnect that communicates information between two digital circuits. One of the digital circuits is constructed to be "scannable" so that it at least includes scannable registers capable of applying signals to, and sampling signals at, the interconnect. The other digital circuit has a different scan architecture such as, for example, that specified by IEEE Standard 1149.1. The method allows the interconnect between the two digital circuits, each having scan architecture that is not compatible with that of the other, to be tested.

Abstract: A system for issuing a family of instructions during a single clock includes a decoder for decoding the family of instructions and logic, responsive to the decode result, for determining whether resource conflicts would occur if the family were issued during one clock. If no resource conflicts occur, an execution unit executes the family regardless of whether dependencies among the instructions in the family exist.

Abstract: A method and apparatus for translating source code written in one computer language to source code written in another language wherein translated static fragments are generated in the face of textual inconsistencies. Exactly one target language definition of each source language static fragment is generated and the differences are encapsulated in new parameters.

Abstract: A method and apparatus for achieving maximal, full connection in a multi-processor system having a plurality of processors. Each of the multiple processors has a respective memory. The invention includes communicatively connecting the processors. Following a disruption in the communicative connection, the invention collects connectivity information on one of the processors and selects certain of the processors to cease operations, based on the connectivity information collected. The invention further communicates the selection to each of the processors communicatively coupled to the one processor. The selected processors cease operations.

Abstract: A split brain avoidance protocol to determine the group of processors that will survive a complete partitioning (disconnection) in the inter-processor communications paths connecting processors in a multi-processor system. Processors embodying the invention detect that the set of processors with which they can communicate has changed. They then choose either to halt or to continue operations, guided by the goal of minimizing the possibility that multiple disconnected groups of processors continue to operate as independent systems, each group having determined (incorrectly) that the processors of the other groups have failed.

Abstract: An interpretive language is initialized to include code that provides a bridge to an object-oriented environment. The interpretive language includes a command library to which are added commands that use the bridge to produce object instances and to employ member functions of classes within the object-oriented environment.

Abstract: A multiple processing system, comprises at least a pair of processor units communicatively connected to a number of peripheral devices through a network that includes routing devices interconnected to route information in the form of message packets sent between the processor units and peripheral devices. Data describing the topographical interconnections of the system elements is maintained with the system. A service processor accesses the data, determines therefrom the topographical interconnections forming the network, assigns addresses/identifications to the system elements, and configures the router devices to establish the most direct routes between system elements for message packets sent on the network.

Abstract: System-critical files are protected from being inadvertently modified or deleted by placing them in a Reserve name space of storage that requires any process seeking modifying access to the Reserve name space to have a "Right" to do so. The right to modifying access is garnered by a process first making a call to a system library procedure that causes a memory-stored data structure associated with the calling process to be modified, identifying the process as one with a Right to make modifying access to the Reserve name space. Any attempt to modify, delete, or create any file residing in the Reserve name space without the Right will be refused.

Abstract: A method of checking a large and/or replicated databases includes forming a position sensitive checksum for each entry of the database to be used in the check. The checksums are then exclusive Ored with one another to form a first database checksum. Periodically, the checksums are again created from each of the entries of the check and a second database checksum formed and compared to the first for a match that indicate checked entries of the database have not changed. In another embodiment, a modification to one of the check entries may be provided, accompanied by a master checksum indicative of what the first checksum should be after the entry is modified. The database entry is modified, and a position checksum value for the entry as modified is created.

Abstract: A multiprocessor that includes a virtual file system providing a file system interface to user application code. This interface allows users to access files in many types of file systems in a consistent, file system-independent manner. In a preferred embodiment, the higher interface of the file system is the Posix file system interface, though it can be any file system interface supporting the capabilities required by a user process. The Posix file system supports regular files, pipes, fifos and special files.A pipe server, a pipe library and a name server together implement the fifo semantics required by the Posix standard for Posix processes. The present invention provides these fifo capabilities to any process which uses the Posix interfaces.

Abstract: A computing system comprising a number of multiple processor unit nodes interconnectively connected by a communications system to form a cluster is initialized in a manner that creates separate, independent execution environments for each processor unit. Each multiple processor unit node is configured to operate as a symmetric multiprocessing system with a single, shared memory. During a Startup procedure, memory area segments are created for each processor unit, providing processes running on that processor unit with mutually exclusive access to the associated memory area segment. Startup determines an order of the nodes of the cluster system, and establishes a Coordinator process in the lowest numbered processor unit in the first node of the order. The Coordinator process, when created, directs the remainder of the Startup procedure, and constructs a succession list that identifies the next processor unit in the order to take over the Coordinator process should the first fail.

Abstract: A multiprocessor system includes a number of central processing unit (CPUs) and at least one input/output (I/O) device interconnected by routing apparatus for communicating packetized messages therebetween. The messages contain address information identifying the source and destination of the message, and may also contain requests to write to, or read from, storage of a CPU. Protection against errant reads or writes is provided by an access validation method that utilizes access validation information contained in plural entries maintained by each CPU. Each entry provides validation by identifying what elements of the system has read and/or write wccss to the memory of that CPU, without which memory access is denied.

Abstract: An electrical component, mounted for example to a printed circuit board, is enclosed in a sealed chamber with an inert gas that permits the electrical leads of the electrical component to be formed from a material having high heat and electrical conductivity, such as silver, that is protected from corrosion and/or oxidation by the inert gas. The housing is fabricated from a heat conductive material, and heat is thereby drawn from the electrical leads for dissipation by the outer surface of the housing.

Abstract: An apparatus and method for getting descriptors to data and passing the descriptors among data sources and sinks, thereby avoiding copying the data among the data sources and sinks. The data source/sink which consumes the data actual initiates the copying of the actual data itself, using global pointers to the data in the descriptors.

Abstract: A digital system includes a number of digital subsystems interconnected by a shared bus structure that is mutually exclusively accessible for communicating data between the subsystems. The system is structured to be tested by pseudo-random scan test methodology. Each subsystem includes a counter that, during scan test periods, provides an enable signal to the bus access or driver circuitry of the associated subsystem. A scan test operation is preceded by pre-loading each counter with a predetermined state so that, initially, and throughout the test period, one and only one digital subsystem will drive the shared data bus. Each scan sequence (comprising a scan in, an execution cycle, and a scan out of the pseudo-random test strings) will result in the counters being clocked once so that a new subsystem will be enable to drive the bus the next sequence, permitting the bus access circuitry of each subsystem, and the bus itself, to be tested.

Abstract: A method and system for providing a fault tolerant access between network clients and a network server. Accordingly, a preferred embodiment of the present invention, a first primary input/output process (IOP) and a second backup IOP are provided in a first network client. A first backup IOP and a second primary IOP are provided in a second network client. The first backup IOP is a backup of the first primary IOP and the second backup IOP is a backup of the second primary IOP. A first preferred access path between the first primary IOP and the network server as well as a first alternate access path between the first backup IOP and the network server are defined. Similarly, a second preferred access path between the second primary IOP and the network server as well as a second alternate access path between the second backup IOP and the network server are defined. A first network connection between the first primary IOP and the network server is established via the first preferred access path.

Abstract: A pair of substantially identical integrated circuit elements, in the form of microprocessors, are operated in response to the same instruction and data signals that are accessed from a memory by one of the integrated circuits. The accessed instruction and data signal are supplied, via a synchronous interface, to the second integrated circuit, which operates thinking that the supplied data and instruction signals were accessed by it in response to address and control signals. The states of the two integrated circuits are applied to comparator circuitry, both via buffered paths. The comparator circuitry is operated in response to control signals produced by the first integrated circuit to effect comparison on only those signals that are valid at any particular moment in time. Clock-synchronizing circuitry is included to ensure that predetermined state transitions of the clocks used to operate the first and second integrated circuit occur within a prescribed time period.

Abstract: A data structure representing an Interface Definition Language ("IDL") source file is disclosed. The data structure is preferably produced during the compilation of the source file and generation of language-specific source code. The data structure includes a variable-sized array of data structures representing entries from the source file in addition to an array of strings containing each line in the source file. Each of the entry data structures contains a fixed part containing information about the name and attributes of the source file entry and a variable part that depends upon the entry's data type. The data structure can be stored in a file or database for run-time access by distributed applications.

Abstract: An apparatus and method for getting descriptors to data and passing the descriptors among data sources and sinks, thereby avoiding copying the data among the data sources and sinks. The data source/sink which consumes the data actual initiates the copying of the actual data itself, using global pointers to the data in the descriptors.

Abstract: An apparatus and method for getting descriptors to data and passing the descriptors among data sources and sinks, thereby avoiding copying the data among the data sources and sinks. The data source/sink which consumes the data actual initiates the copying of the actual data itself, using global pointers to the data in the descriptors.