Patents Assigned to TECHNOLOGIES INC.
  • Publication number: 20250250705
    Abstract: Method(s) and system(s) for the direct production of lithium and other metals from a brine solution containing salts of various metal cations at room temperature via a combined sorbent extraction and electrochemical extraction/plating process. This process uses a skeleton structure material that can reversibly insert/extract a desired metal cation to absorb the desired metal ions from a brine solution. The metal impregnated skeleton structure material is then transferred to an electrochemical cell where the metal ions are extracted from the structure and plated in the form of metal onto an electronically conductive substrate. This process is a combination of methods to take metal ions directly from a brine solution to produce an end-product of metal and is a significant improvement over current industrial processes that will reduce the energy required for metal production.
    Type: Application
    Filed: April 4, 2023
    Publication date: August 7, 2025
    Applicant: c/o ENERGY EXPLORATION TECHNOLOGIES, INC.
    Inventors: Nicholas S. GRUNDISH, Angelo KIRCHON, Richelle LYNDON, David KAPLIN, Amit PATWARDHAN, Jongwook MAH
  • Publication number: 20250253020
    Abstract: A system for processing medical claims, comprising a processor configured to receive device-generated information from a medical device. The device-generated information includes performance information. The processor generates a first biometric signature, and using the device-generated information, generates a second biometric signature, wherein the second biometric signature uses the performance information. Using the first and second biometric signatures, the processor generates a signature comparison. Using the signature comparison, the processor generates a signature indicator and transmits the signature indicator.
    Type: Application
    Filed: April 21, 2025
    Publication date: August 7, 2025
    Applicant: ROM TECHNOLOGIES, INC.
    Inventors: Joseph Guaneri, Daniel Posnack, Peter Arn, Wendy Para, S. Adam Hacking, Micheal Mueller, Jonathan Greene, Steven Mason
  • Publication number: 20250252697
    Abstract: A method for fabricating a custom headwear for a subject is described. The method comprises generating a three-dimensional head data file for the subject and determining contour lines on the head; automatically generating a headwear data file. The method yet further comprises utilizing the headwear data file to generate a shape for a desired headwear, the shape having an interior configured to restrain growth of the head in first predetermined areas. Still further, the method comprises generating contour lines for the custom headwear.
    Type: Application
    Filed: March 20, 2025
    Publication date: August 7, 2025
    Applicant: CRANIAL TECHNOLOGIES, INC.
    Inventors: TIMOTHY R LITTLEFIELD, JEROLD N LUISI, GEORGE E KECHTER
  • Patent number: 12378644
    Abstract: A cemented carbide suitable as a high performance hard metal material for wire drawing of high-tensile strength alloys is provided. The cemented carbide may include a relatively low binder content with additives Cr, Ta and/or Nb to provide high wear and corrosion resistance, high thermal conductivity, high hardness and a desired hardness to fracture toughness correlation.
    Type: Grant
    Filed: February 14, 2020
    Date of Patent: August 5, 2025
    Assignee: HYPERION MATERIALS & TECHNOLOGIES, INC.
    Inventors: Nuria Cinca I Luis, Laura Larrimbe, Jose Maria Tarrago
  • Patent number: 12379286
    Abstract: In an example, a vehicle tire includes a tread portion, a sidewall portion, and a sensor module for estimating one or more parameters of the tire. The sensor module includes a detector patch that includes one or more capacitors, each of which has an electrostatic capacity that is variable due to at least deformation of each capacitor. The sensor module also includes an electronics unit connected to each capacitor and configured to control the sensor module. The detector patch is adhered to an inside of at least one of the tread portion or the sidewall portion. At least one of the capacitors is located on the inside of the at least one of the tread portion or the sidewall portion. The electronics unit is configured to estimate at least one of the parameters based on the electrostatic capacity of each capacitor.
    Type: Grant
    Filed: February 19, 2021
    Date of Patent: August 5, 2025
    Assignees: NITTO, INC., NITTO DENKO CORPORATION, NITTO BEND TECHNOLOGIES, INC.
    Inventors: Toshihiko Omote, Benedicto Delos Santos, Martin John McCaslin, John Bortell, Sean Sousa, Colton Allen Ottley, Jared K. Jonas, Colin D. Eichinger, Nathan C. Briggs
  • Patent number: 12381115
    Abstract: Embodiments provide a method for fabricating a semiconductor structure and a semiconductor structure. The method includes: providing a substrate having a plurality of active area; forming a plurality of bit lines arranged at intervals on the substrate, the plurality of bit lines having a plurality of first mask layers; forming a first dielectric layer on the substrate positioned between adjacent two of the plurality of bit lines; patterning the first dielectric layer, to form a plurality of first notches arranged at intervals on the first dielectric layer; forming a second mask layer on the first dielectric layer, and the second mask layer encircling in each of the plurality of first notches to form a second notch; forming a plurality of contact holes arranged at intervals in the first dielectric layer; and forming a conductive plunger in each of the plurality of contact holes.
    Type: Grant
    Filed: August 11, 2021
    Date of Patent: August 5, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Jingwen Lu
  • Patent number: 12380940
    Abstract: A semiconductor device includes: a power down control circuit receiving a power down command signal and a chip selection signal, and generating a power down enable signal and a power down exit signal, here, a logic level of the power down enable signal is converted at a first edge of the power down command signal during a power down stage, and a logic level of the power down exit signal is converted at a second edge of the chip selection signal during a power down exit stage; a power control circuit stopping providing a power voltage according to the power down enable signal during the power down stage, and providing the power voltage according to the power down exit signal during the power down exit stage; and an input buffer circuit transmitting signals during the power down exit stage in response to the power down exit signal.
    Type: Grant
    Filed: August 12, 2023
    Date of Patent: August 5, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yupeng Fan
  • Patent number: 12378643
    Abstract: According to some configurations of the present disclosure, an alloy may include a composition that includes magnesium (Mg) that is approximately 5 to 12% by weight of the composition; manganese (Mn) that is approximately 0.1 to 2% by weight of the composition; and silicon (Si) that is approximately 0.3 to 3% by weight of the composition; and aluminum (Al) that is a balance of the composition. In one configuration, the composition may further include one or more of iron (Fe), titanium (Ti), zirconium (Zr), chromium (Cr), and/or yttrium (Y).
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: August 5, 2025
    Assignee: DIVERGENT TECHNOLOGIES, INC.
    Inventors: Prabir Kanti Chaudhury, Chan Cheong Pun, Chor Yen Yap, Taiki Thomas Shirai
  • Patent number: 12380484
    Abstract: Systems, devices, and methods are provided for determining contextually relevant user-based product recommendations based on scene information. In at least one embodiment, techniques described herein may be used to determine, using a first machine-learning model, first information associated with a first object within a first image of digital content, determine, using a second machine-learning model, similarity scores between the first object and a first plurality of products of an online purchasing system, detect, in association with the first image of the digital content, performance of a first computer-based action by a user, determine, using a third machine-learning model and based on contextual data of the user, one or more affinity scores for the user, select a first product based on the one or more affinity scores, and present a recommendation to the user to perform a second computer-based action in association with the first product.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: August 5, 2025
    Assignee: AMAZON TECHNOLOGIES, INC.
    Inventors: Yash Chaturvedi, Mohamed Kamal Omar, Alexander Ratnikov, Ahmed Aly Saad Ahmed, Steven James Cox, Prasanth Saraswatula, Jingxiang Chen
  • Patent number: 12379908
    Abstract: The present application is directed towards systems and methods for cluster-based code analysis and transformation. Cluster-based analysis may group code objects based on their similarity across functional areas, such as where a code object is cloned in multiple areas (e.g. sort functions that are duplicated across areas, or reports or tables that are identical). In some implementations, objects may be grouped into clusters by type, or based on reading from or writing to a common table. In some implementations, clustering at different layers may be possible.
    Type: Grant
    Filed: April 4, 2023
    Date of Patent: August 5, 2025
    Assignee: SMARTSHIFT TECHNOLOGIES, INC.
    Inventors: Albrecht Gass, Stefan Hetges, Nikolaos Faradouris, Oliver Flach
  • Patent number: 12380941
    Abstract: Embodiments provide a power supply switching circuit, which generates a first control signal jointly by utilizing a first input signal and a first drive signal opposite in phase to a second control signal, and generates the second control signal jointly by utilizing a second input signal and a second drive signal opposite in phase to the first control signal, such that time (i.e., overlap time) required for simultaneously turning on or off a first output subcircuit and a second output subcircuit is greatly reduced or even eliminated, effective output of an output node is implemented, and reliability of a device is improved. Furthermore, compared with eliminating the overlap time by means of delay, eliminating the overlap time by means of the power supply switching circuit is simple and reliable in control logic and is insensitive to process, which further improves the reliability of the device.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: August 5, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Yupeng Fan
  • Patent number: 12382696
    Abstract: A semiconductor structure and a manufacturing method thereof are provided. The semiconductor structure includes a substrate, a gate structure being provided on a surface of the substrate, and a source region and a drain region being provided in the substrate at two sides of the gate structure, respectively; and a contact located on the substrate, the contact including a first contact located on the substrate and a second contact located on a side of the first contact away from the substrate, in which an area of a bottom surface of the first contact is greater than an area of a top surface of the second contact.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: August 5, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Jifeng Tang
  • Patent number: 12379482
    Abstract: A drone detection, identification and location system and method may illuminate a target with one or multiple selected radio-frequency (RF) carrier frequencies. Both direct emissions received from the target and re-emissions generated by the target may be processed to determine whether the target is a drone. The re-emissions may be generated by circuitry of the target resulting from the illumination with the one or multiple RF carrier frequencies. The re-emissions may comprise cross-modulation products (CMPs) including forced non-linear emissions (FNLEs). The direct emissions and the re-emissions may be processed to generate an RF signature for the target. The target may be determined to be drone and the type of drone may be identified based on the RF signature.
    Type: Grant
    Filed: June 6, 2022
    Date of Patent: August 5, 2025
    Assignee: RTX BBN TECHNOLOGIES, INC.
    Inventors: Tyler Shake, Thomas Wilkerson, John Dishon
  • Patent number: 12377835
    Abstract: An apparatus includes an inertial measurement unit (IMU) configured to detect motion characteristics of a vehicle. The apparatus also includes an odometry system configured to detect a wheel speed of each wheel of the vehicle. The apparatus further includes at least one processor communicatively connected to the IMU and the odometry system, the at least one processor configured to determine first parameters for predicting a path of the vehicle, determine second parameters for predicting the path of the vehicle, and predict the path of the vehicle using a combination of the first parameters and the second parameters, wherein the combination is weighted based on a longitudinal acceleration of the vehicle obtained using the IMU.
    Type: Grant
    Filed: September 30, 2021
    Date of Patent: August 5, 2025
    Assignee: CANOO TECHNOLOGIES INC.
    Inventors: Kilsoo Kim, Jongmoo Choi, Siddharth Agarwal, Emilio Moyers, Mayukh Sattiraju, Aviral Singh, David R. Arft
  • Patent number: 12379113
    Abstract: Architectures and techniques are presented that can facilitate improved design and function of certain heating, ventilation, and air conditioning (HVAC) devices. Architectures directed to an improved evase device can be designed with rounded corners that can facilitate, e.g., mitigation of reverse flow that traditionally grows back from corners of a transition from an axial fan to a rectangular duct. Architectures directed to an improved intake device can be designed to limit intake from certain flow directions and to smoothly change flow direction, which can facilitate, e.g., reduction in noise. Architectures directed to an improved fan intake device can be designed to reduce noise without significantly reducing total pressure. Architectures directed to an improved air handler device can be designed to concurrently heat and cool air and to reduce dimensions (e.g., size, weight) that can reduce costs and mitigate shipping and installation difficulties.
    Type: Grant
    Filed: November 1, 2024
    Date of Patent: August 5, 2025
    Assignee: BEST TECHNOLOGIES, INC.
    Inventors: John C Karamanos, Herbert Willke
  • Patent number: 12380724
    Abstract: A method and system to verify carpool occupancy compliance for access to High Occupancy Vehicle (HOV) lanes, High Occupancy or Toll (HOT) lanes, or other vehicle-occupancy contingent rewards. Software and hardware devices are used with radio-frequency transmitter modules to capture one or more photo images of vehicle occupants and to perform boxed headcounts of humans in any given photo frame. Biometric signature detection is used to confirm the boxed headcounts and a realness algorithm to further confirm the genuineness of any human image. Occupancy compliance can be communicated directly to an appropriate regulatory body.
    Type: Grant
    Filed: May 16, 2023
    Date of Patent: August 5, 2025
    Assignee: RIDEFLAG TECHNOLOGIES INC.
    Inventors: Michel Papineau, Mark Feltham
  • Patent number: 12381542
    Abstract: A reference system is provided for generating a clock signal with a tunable noise pedestal for driving a signal generator. The reference system includes a reference source configured to generate a reference signal and a multiplier chain, including a noise pedestal generator. The noise pedestal generator includes a noise pedestal attenuator configured to attenuate the reference signal to degrade a noise floor of the reference signal, a VGA configured to adjust the attenuated reference signal to a desired signal level, a bandpass filter configured to filter out excess noise from the adjusted reference signal to form a noise pedestal, and a switch arrangement configured to selectively input the reference signal to a first path including the noise pedestal attenuator and the VGA, and a second path bypassing the noise pedestal attenuator and the VGA. The clock signal includes the noise pedestal when the first path is selected.
    Type: Grant
    Filed: October 31, 2023
    Date of Patent: August 5, 2025
    Assignee: KEYSIGHT TECHNOLOGIES, INC.
    Inventors: Andrew Ferrara, Naveed Edalati
  • Patent number: 12380939
    Abstract: A method for obtaining a row hammer refresh address, including: after a row hammer refresh signal arrives, obtaining a current sampling address, and determining whether a high address is locked in a current row hammer refresh cycle; in response to the high address being locked, determining whether a high address of the current sampling address is identical to the locked high address; in response to being identical, updating an access frequency of the locked high address, and updating access frequencies of low addresses with a low address of the current sampling address; and when a next row hammer refresh signal arrives, using a low address with a highest access frequency stored in the group of low registers as a low address of the row hammer refresh address, and using the locked high address as a high address of the row hammer refresh address.
    Type: Grant
    Filed: August 9, 2023
    Date of Patent: August 5, 2025
    Assignee: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventor: Lu Liu
  • Patent number: 12381128
    Abstract: A microelectronic structure is disclosed. The microelectronic structure can include a bulk semiconductor portion that has a first surface and a second surface opposite the first surface. The microelectronic structure can include a via structure that extends at least partially through the bulk semiconductor portion along a direction non-parallel to the first surface. The microelectronic structure can include a first dielectric barrier layer that is disposed on the first surface of the bulk semiconductor portion and extends to the via structure. The microelectronic structure can include a second dielectric layer that is disposed on the first dielectric barrier layer and extends to the via structure.
    Type: Grant
    Filed: December 27, 2021
    Date of Patent: August 5, 2025
    Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.
    Inventors: Guilian Gao, Gaius Gillman Fountain, Jr.
  • Patent number: D1087319
    Type: Grant
    Filed: November 21, 2023
    Date of Patent: August 5, 2025
    Assignee: IPEX TECHNOLOGIES INC.
    Inventors: Anjalkumar Ashokbhai Patel, Erol Ozbakir