Patents Assigned to TECHNOLOGIES INC.
-
Publication number: 20230301054Abstract: A method for forming a memory includes the following operations: a substrate and a semiconductor layer located on the substrate are formed; the semiconductor layer is patterned to form a plurality of first isolation structures and channel regions, each first isolation structure includes a first through hole and a second through hole, and a first isolation pillar located between the first through hole and the second through hole; a first filling layer filling up the first through hole and the second through hole is formed; the first isolation pillar is removed to form a third through hole located in the first filling layer; a barrier layer filling up the third through hole is formed; the channel regions are exposed by removing the first filling layer; and a gate layer covering surfaces of the channel regions is formed.Type: ApplicationFiled: June 20, 2022Publication date: September 21, 2023Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventors: Juanjuan HUANG, YI JIANG, Weiping BAI, Deyuan XIAO
-
Publication number: 20230300841Abstract: A user equipment (UE) is disclosed. The UE includes a receiver and a processor that receive a radio resource control (RRC) signal including uplink (UL) sounding reference signal (SRS) configuration information. The UE also receives a semi-persistent scheduling (SPS) message to activate transmission of UL SRSs The UE may then transmit UL SRSs in a time and frequency pattern based on at least the UL SRS configuration information. A UE method and an eNode-B are also disclosed.Type: ApplicationFiled: May 23, 2023Publication date: September 21, 2023Applicant: WIRELESS FUTURE TECHNOLOGIES INC.Inventors: Kari Juhani Hooli, Ajit Kahaduwe, Timo Erkki Lunttila, Karri Markus Ranta-Aho, Antti Anton Toskala
-
Publication number: 20230301071Abstract: A method for manufacturing a memory includes: providing a substrate provided with bit lines, each bit line including a plurality of straight line segments connected end to end in sequence, and adjacent straight line segments have an included angle therebetween; forming active pillars and insulating layers on the substrate, each straight line segment of each bit line being electrically connected with at least two active pillars, each insulating layer extending in a first direction and covering the outer peripheral surface of the active pillar; filling a first support layer between adjacent insulating layers; removing part away from the substrate, of each insulating layer to form a filling space; and forming a dielectric layer and a conductive layer between parts exposed in the filling space and close to the substrate, of the active pillars.Type: ApplicationFiled: May 22, 2023Publication date: September 21, 2023Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Qinghua HAN
-
Publication number: 20230298688Abstract: A method of training a microbiota model engine to identify biomarkers for predicting food safety or animal growth includes obtaining data that is indicative of an assay of candidate biomarkers obtained the gastrointestinal tracts of a set of animals, where the assay is performed at specified intervals in the lifecycle of the animals and the animals manifest specified characteristics at the specified intervals. The method further includes training the microbiota model engine using the data to generate a prediction based on at least one of a food safety or an animal growth criterion and obtaining, from the trained microbiota model engine, a set of features used by the microbiota model engine to generate the prediction. The method additionally includes identifying a subset of biomarkers from amongst the candidate biomarkers from the set of features and providing the subset of biomarkers for generating food safety or animal growth predictions.Type: ApplicationFiled: May 27, 2021Publication date: September 21, 2023Applicant: CAN TECHNOLOGIES, INC.Inventors: Vernon L. MCINTOSH, Jean E. DE OLIVEIRA
-
Publication number: 20230301069Abstract: A preparation method for a semiconductor device includes: providing a semiconductor substrate, the semiconductor substrate having shallow trenches and active regions defined by the shallow trenches, the active regions extending in a first direction; forming isolation layers in the first direction at interfaces between the shallow trenches and the active regions, the isolation layers and the active regions being inverse types to each other; forming shallow trench isolation structures in the shallow trenches; and forming word-line structures, the word-line structures extending in a second direction and sequentially passing through the shallow trench isolation structures and the active regions.Type: ApplicationFiled: May 28, 2021Publication date: September 21, 2023Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.Inventor: Yukun LI
-
Publication number: 20230301070Abstract: Provided are a semiconductor structure and a method for manufacturing the same, a memory device and a method for manufacturing the same. The semiconductor structure includes at least one transistor. Each of the at least one transistor includes a channel including a first semiconductor layer and a second semiconductor layer disposed around the first semiconductor layer. The second semiconductor layer introduces strain into the channel.Type: ApplicationFiled: July 25, 2022Publication date: September 21, 2023Applicants: CHANGXIN MEMORY TECHNOLOGIES, INC., BEIJING SUPERSTRING ACADEMY OF MEMORY TECHNOLOGYInventors: Deyuan Xiao, Yong Yu, Guangsu Shao
-
Patent number: 11765066Abstract: Systems, methods, and related technologies for parsing network traffic are described. Network traffic transmitted by a set of devices communicatively coupled to a network is obtained. A set of protocol fields for parsing the network traffic is determined. The set of protocol fields are associated with a set of processing engines. The network traffic is parsed to determine a set of field values from the network traffic based on the set of protocol fields. The set of field values are transmitted to the set of processing engines.Type: GrantFiled: September 27, 2022Date of Patent: September 19, 2023Assignee: FORESCOUT TECHNOLOGIES, INC.Inventor: Samuel Groot
-
Patent number: 11765911Abstract: A spin-orbit-torque (SOT) magnetoresistive random access memory (MRAM) device includes a SOT MRAM cell containing a first two terminal selector element, a nonmagnetic metallic assist plate, and a magnetic tunnel junction located between the first two terminal selector element and the nonmagnetic metallic assist plate, and a circuit selection element selected from a transistor or a second two terminal selector element electrically connected to the nonmagnetic metallic assist plate of the SOT MRAM cell.Type: GrantFiled: February 1, 2022Date of Patent: September 19, 2023Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Lei Wan, Jordan Katine, Neil Robertson
-
Patent number: 11763086Abstract: Systems and techniques are generally described for anomaly detection in text. In some examples, text data comprising a plurality of words may be received. An image of a first word of the plurality of words may be generated. A feature representation of the first word may be generated using a variational autoencoder. A score may be generated based at least in part on the feature representation. In various examples, the score may indicate a likelihood that an appearance of the first word in the image of the first word is anomalous with respect to at least some other words of the plurality of words.Type: GrantFiled: March 29, 2021Date of Patent: September 19, 2023Assignee: AMAZON TECHNOLOGIES, INC.Inventors: Ionut Catalin Sandu, Alin-Ionut Popa, Daniel Voinea
-
Patent number: 11760352Abstract: In some examples, a network computer system can monitor a plurality of mobile computing devices to determine a current location of a corresponding freight operator of a plurality of freight operators. The network computer system can record the current location of each of the plurality of freight operators in a data store of the set of memory resources. Additionally, the network computer system can repeatedly query the data store to determine when at least two freight operators of the plurality of freight operators that satisfy a set of drafting conditions. The set of drafting conditions including a proximity condition as between the at least two freight operators and a candidate commencement location. In response to the determination, the network computer system can implement a drafting arrangement between the at least two freight operators.Type: GrantFiled: October 25, 2021Date of Patent: September 19, 2023Assignee: UBER TECHNOLOGIES, INC.Inventors: Luis Madrigal, Eyal Lasker, Padmini Pyapali
-
Patent number: 11763527Abstract: In some aspects, the disclosure is directed to methods and systems for a dynamic, reconfigurable virtual reality environment with in-environment access to external data and resources. Implementations of these systems also provide an external mechanism for modifying other aspects of the virtual reality experience with no need to recode or compile the experience. This can alter the primary flow of the experience, change its behavior based on the specific user accessing it and add branded or customer-specific aspects to the application. The same level or environment can provide drastically different experiences for various users from beginners through experts, even allowing the option of random or ordered events, controllable by an instructor or administrator, through simple configuration.Type: GrantFiled: December 31, 2020Date of Patent: September 19, 2023Assignee: OBERON TECHNOLOGIES, INC.Inventors: Scott Allen, Timothy Allen
-
Patent number: 11763223Abstract: A system, method and computer readable medium for generating and maintaining a resource deployment map for a project over a communications network includes a database for storing the resource deployment map including a set of tasks, dependencies between tasks, a predefined period of time required for completing each task, a set of resources, and assignments of the set of resources to the tasks, a web server for receiving project change information including a modified set of resources, and time delays in the tasks, identifying integration points in the resource deployment map, wherein an integration point comprises tasks, assigning the modified set of resources to the tasks as follows: assign all resources necessary for a first integration point, assign all remaining resources necessary for a next integration point, repeat the previous step until all resources are assigned, and generating a revised resource deployment map based on the modified set of resources, and time delays.Type: GrantFiled: May 18, 2022Date of Patent: September 19, 2023Assignee: REALIZATION TECHNOLOGIES, INCInventors: Sanjeev Gupta, Ravi Shankar
-
Patent number: 11764177Abstract: A bonded structure is disclosed. The bonded structure can include an interconnect structure. The bonded structure can also include a first die directly bonded to the interconnect structure. The bonded structure can also include a second die mounted to the interconnect structure. The second die is spaced apart from the first die laterally along an upper surface of the interconnect structure. The second die is electrically connected with the first die at least partially through the interconnect structure. The bonded structure can further include a dielectric layer that is disposed over the upper surface of the interconnect structure between the first die and the second die.Type: GrantFiled: February 9, 2021Date of Patent: September 19, 2023Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.Inventor: Belgacem Haba
-
Patent number: 11764994Abstract: Embodiments of this present disclosure may include an industrial control system that uses a daisy chain communication network to couple point-to-point sensors (P2P sensors) for communication of data between respective P2P sensors and a controller. Each P2P sensor may couple to the daisy chain communication network via accessing circuitry. The accessing circuitry may include switching circuitry and flip-flop circuitry to control when each P2P sensors may communicate with the controller via the daisy chain communication network.Type: GrantFiled: July 21, 2021Date of Patent: September 19, 2023Assignee: ROCKWELL AUTOMATION TECHNOLOGIES, INC.Inventor: Alan J. Campbell
-
Patent number: 11760059Abstract: A method of bonding includes using a bonding layer having a fluorinated oxide. Fluorine may be introduced into the bonding layer by exposure to a fluorine-containing solution, vapor or gas or by implantation. The bonding layer may also be formed using a method where fluorine is introduced into the layer during its formation. The surface of the bonding layer is terminated with a desired species, preferably an NH2 species. This may be accomplished by exposing the bonding layer to an NH4OH solution. High bonding strength is obtained at room temperature. The method may also include bonding two bonding layers together and creating a fluorine distribution having a peak in the vicinity of the interface between the bonding layers. One of the bonding layers may include two oxide layers formed on each other. The fluorine concentration may also have a second peak at the interface between the two oxide layers.Type: GrantFiled: July 24, 2019Date of Patent: September 19, 2023Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.Inventor: Qin-Yi Tong
-
Patent number: 11760847Abstract: Solid-state branching and/or crosslinking of aliphatic polyamide or polyester articles is achieved using a topical approach. A surface of the article is coated with a composition that includes a polyene and a free radical initiator. The article and applied coating are then heated to induce branching and/or crosslinking in the polyamide or polyester. This is performed below the crystalline melting temperature of the polyamide or polyester, or in the case of a fabric, below the melting temperature of the fibers in the fabric. Fabrics treated in this manner exhibit reduced or even no dripping in vertical flame tests.Type: GrantFiled: January 25, 2022Date of Patent: September 19, 2023Assignee: GREEN THEME TECHNOLOGIES, INC.Inventor: Xia Zhao
-
Patent number: 11764189Abstract: Dies and/or wafers are stacked and bonded in various arrangements including stacks, and may be covered with a molding to facilitate handling, packaging, and the like. In various examples, the molding may cover more or less of a stack, to facilitate connectivity with the devices of the stack, to enhance thermal management, and so forth.Type: GrantFiled: September 24, 2021Date of Patent: September 19, 2023Assignee: ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC.Inventors: Guilian Gao, Cyprian Emeka Uzoh, Jeremy Alfred Theil, Belgacem Haba, Rajesh Katkar
-
Patent number: 11763169Abstract: Methods and systems for encoding digital information in nucleic acid (e.g., deoxyribonucleic acid) molecules without base-by-base synthesis, by encoding bit-value information in the presence or absence of unique nucleic acid sequences within a pool, comprising specifying each bit location in a bit-stream with a unique nucleic sequence and specifying the bit value at that location by the presence or absence of the corresponding unique nucleic acid sequence in the pool, but, more generally, specifying unique bytes in a bytestream by unique subsets of nucleic acid sequences. Also disclosed are methods for generating unique nucleic acid sequences without base-by-base synthesis using combinatorial genomic strategies (e.g., assembly of multiple nucleic acid sequences or enzymatic-based editing of nucleic acid sequences).Type: GrantFiled: November 16, 2017Date of Patent: September 19, 2023Assignee: CATALOG TECHNOLOGIES, INC.Inventors: Nathaniel Roquet, Hyunjun Park, Swapnil P. Bhatia, Darren R. Link
-
Patent number: 11765068Abstract: According to one method, the method occurs at a first impairment device comprising at least one programmable data plane processor. The method includes receiving, via an application programming interface (API) and from a test controller, command and control instructions for configuring a packet processing pipeline for facilitating traffic impairments; configuring, using the command and control instructions, the packet processing pipeline implemented using the at least one programmable data plane processor; and applying, via the packet processing pipeline, at least one impairment to one or more test packets for testing a system under test (SUT).Type: GrantFiled: December 22, 2021Date of Patent: September 19, 2023Assignee: KEYSIGHT TECHNOLOGIES, INC.Inventor: Christian Paul Sommers
-
Patent number: 11763175Abstract: A method and system for analyzing a corpus of data artifacts is disclosed. The method comprises obtaining, by a computer, a semantic representation of the data artifacts, where the semantic representation indicates (1) entities identified in the data artifacts, and (2) semantic relationships among the entities as indicated by the data artifacts. The method further comprises clustering the data artifacts into clusters of semantically related data artifacts based on the semantic representation and inferring additional semantic relationships between pairs of the entities. The inferring comprises applying, on a cluster-by-cluster basis, a multi-tiered network of inference engines to a portion of the semantic representation corresponding to the cluster, where the multi-tiered network of inference engines includes a domain-independent inference tier and a domain-specific inference tier.Type: GrantFiled: September 3, 2019Date of Patent: September 19, 2023Assignee: ORBIS TECHNOLOGIES, INC.Inventors: Sameer Joshi, Todd Pehle, Larry Crochet