Abstract: Systems and methods are disclosed to perform semiconductor processing with a process chamber; a flash lamp adapted to be repetitively triggered; and a controller coupled to the control input of the flash lamp to trigger the flash lamp. The system can deploy a solid state plasma source in parallel with the flash lamp in wafer processing.

Abstract: An apparatus to perform semiconductor processing includes a process chamber; a plasma generator for generating a plasma in the process chamber; and a helical ribbon electrode coupled to the output of the plasma generator.

Abstract: The present invention relates generally to semiconductor fabrication and particularly to fabricating magnetic tunnel junction devices. In particular, this invention relates to a method for using the dielectric layer in tunnel junctions as an etch stop layer to eliminate electrical shorting that can result from the patterning process.

Abstract: In a dual cathode magnetron, an adjustment circuit is provided between a pair of sputter targets having a coaxial (preferably frusto-conical) relationship to modify the distribution of ion and electron currents flowing from the plasma discharge to a substrate residing within a sputter chamber. A stress adjustment circuit is used to modify the ion bombardment of the growing films on the substrate resulting in a mechanism for control of the stress in the deposited films. In a preferred embodiment, the adjustment circuit comprises a variable resistor disposed between an internal shield that acts as a passive anode and a target. The value of the variable resistor influences the plasma discharge current distribution between the split sputter targets and the internal shields, and can effectively be used to adjust the properties of the deposited films.

Abstract: First and second electrodes at opposite ends and magnets between the electrodes define an enclosure. Inert gas (e.g. argon) molecules pass into the enclosure through an opening near the first electrode and from the enclosure through an opening near the second electrode. A ring near the first electrode, a plate near the second electrode and the magnets are at a reference potential (e.g. ground). The first electrode is biased at a high voltage by a high alternating voltage to produce a high intensity negative electrical field. The second electrode is biased at a low negative voltage by a low alternating voltage to produce a low intensity negative electrical field. Electrons movable in a helical path in the enclosure near the first electrode ionize inert gas molecules. A wafer having a floating potential and an insulating layer is closely spaced from the second electrode.

Abstract: Systems and methods are disclosed to perform semiconductor processing with a process chamber; a flash lamp adapted to be repetitively triggered; and a controller coupled to the control input of the flash lamp to trigger the flash lamp. The system can deploy a solid state plasma source in parallel with the flash lamp in wafer processing.

Abstract: A reactor for processing semiconductor wafers with electrodes and other surfaces that can be one of heated, textured and/or pre-coated in order to facilitate adherence of materials deposited thereon, and eliminate the disadvantages resulting from the spaulding, flaking and/or delaminating of such materials which can interfere with semiconductor wafer processing.

Abstract: A high pressure trapping system is provided to collect chemical vapor by-products in successive stages through chemical reasons conducted at progressively colder temperatures. A hot trap receives chemical vapor exhaust and collects a first waste, typically a solid, as a result of the high temperature completing a chemical reason in the vapor. Surviving gaseous by-products continue to the next process. The following chamber is colder, and collects waste as a solid or a liquid as a result of a chemical process dependent on the cold temperature. Sometimes a third chamber is used for even a colder chemical reaction to collect waste products. As a solid, these waste products are easier to collect, remove, and even reuse.

Abstract: A process system and a deposition method for depositing a highly controlled layered film on a workpiece is disclosed. The basic component of the apparatus is a pulsing plasma source that is capable of either exciting or not-exciting a first precursor. The pulsing plasma source includes an energy source to generate a plasma, and a plasma adjusting system to cause the plasma to either excite or not-excite a precursor. The precursor could flow continuously (an aspect totally new to ALD), or intermittently (or pulsing, standard ALD operation process). The deposition method includes the steps of pulsing the plasma to excite/not-excite the precursors and the ambient to deposit and modify the deposited layers. This procedure then can be repeated until the film reaches the desired thickness.

Abstract: First and second electrodes and magnets between the electrodes define an enclosure. The first electrode is biased at a high voltage to produce a high intensity electrical field. The second electrode is biased at a low negative voltage by a low alternating voltage to produce a low intensity electrical field. Electrons movable in a helical path in the enclosure near the first electrode ionize inert gas molecules in the enclosure. A wafer having a floating potential and an insulating layer is closely spaced from the second electrode. The second electrode and the wafer define plates of a first capacitor having a high impedance. The wafer and the inert gas ions in the enclosure define opposite plates of a second capacitor. The first capacitor accordingly controls and limits the speed at which the gas ions move to the insulating layer surface to etch this surface. The resultant etch, only a relatively few angstroms, of the insulating layer is smooth, uniform and accurate.

Abstract: A process to deposit a thin film by chemical vapor deposition includes evacuating a chamber of gases; exposing a device to a gaseous first reactant, wherein the first reactant deposits on the device to form the thin film having a plurality of monolayers in thickness; evacuating the chamber of gases; exposing the device, coated with the first reactant, to a gaseous second reactant under a plasma treatment, wherein the thin film is treated by the first reactant; and repeating the previous steps.

Abstract: A plasma etch reactor 20 includes a upper electrode 24, a lower electrode 24, a peripheral ring electrode 26 disposed therebetween. The upper electrode 24 is grounded, the peripheral electrode 26 is powered by a high frequency AC power supply, while the lower electrode 28 is powered by a low frequency AC power supply, as well as a DC power supply. The reactor chamber 22 is configured with a solid source 50 of gaseous species and a protruding baffle 40. A nozzle 36 provides a jet stream of process gases in order to ensure uniformity of the process gases at the surface of a semiconductor wafer 48. The configuration of the plasma etch reactor 20 enhances the range of densities for the plasma in the reactor 20, which range can be selected by adjusting more of the power supplies 30, 32.

Abstract: A plurality of successive layers are firmly adhered to one another and to a wafer surface and an electrical component or sub-assembly even when the wafer surface is not even and the layers are bent. The wafer surface is initially cleaned by an ion bombardment of an inert gas (e.g. argon) on the wafer surface in an RF discharge at a relatively high gas pressure. The wafer surface is then provided with a microscopic roughness by applying a low power so that the inert gas (e.g. argon) ions do not have sufficient energy to etch the surface. A layer of chromium is then sputter deposited on the wafer surface as by a DC magnetron with an intrinsic tensile stress and low gas entrapment by passing a minimal amount of the inert gas through the magnetron and by applying no RF bias to the wafer. The chromium layer is atomically bonded to the microscopically rough wafer surface.

Abstract: An asymmetric alternating voltage (preferably 40 KHz) is provided between a pair of targets having a coaxial (preferably frusto-conical) relationship to (1) deposit the material in a uniform thickness on the substrate surface (2) eliminate dielectric material from the surfaces of the targets and other components (3) provide a single ignition of the targets and eliminate target ignitions thereafter and (4) reduce the substrate temperature by using low energy (“cold”) electrons from a plasma discharge to produce a low energy current. The asymmetry may result from amplitude differences between the voltage in alternate half cycles and the voltage in the other half cycles. A second alternating voltage (preferably radio frequency) modulates the asymmetric alternating voltage to provide the smooth plasma ignition.

Abstract: Magnetic tunnel junction (MTJ) devices can be fabricated by a stop-on-alumina process whereby the tunnel junction layer serves as the stop layer during plasma overetching of the upper magnetic layer. The resulting side walls of the MTJ device are non-vertical in the vicinity of the tunnel junction layer which serves to electrically isolate the upper magnetic layer from the lower magnetic layer. The gas employed during plasma overetching excludes halogen containing species which results in highly selective etching of the magnetic layer vis-à-vis the alumina tunnel barrier layer. The introduction of oxygen in the gas may enhance the reproducibility of the overetch process. Finally, plasma treatment with He and H2 followed by rinsing and baking subsequent to removal of the photoresist mask during the fabrication process enhances yield.

Abstract: A method for protecting an organic polymer underlayer during a plasma assisted process of depositing a subsequent film on the organic polymer underlayer is disclosed. The method provides the deposition of a protective continuous layer using organic polymer damage-free technique in order to not damage the organic polymer underlayer and to protect the organic polymer underlayer during the plasma assisted process of depositing a subsequent film. The organic polymer damage-free technique is a non-plasma process, using only thermal energy and chemical reactions to deposit the continuous layer. The organic polymer damage-free technique can also be a plasma assisted process using a reduced plasma power low enough in order to not damage the organic polymer underlayer.

Abstract: An apparatus for sequential processing of a workpiece comprises an assembly line processing system. The apparatus comprises multiple workpieces moving in an assembly line fashion under multiple process stations. The multiple process stations provide different processes onto the workpieces for a sequential processing of the workpieces. The sequential processing action is carried out by the movement of the workpieces under the various process stations.

Abstract: A replaceable shielding apparatus provides a cost effective way of shielding a portion of a workpiece during processing. The apparatus includes a replaceable shield, made of comparable weight as the workpiece for allowing replacement of the shield in the same way as the replacement of the workpiece. With this feature, the replacement of the shield is a routine process and would not interfere much with the workpiece operation. The invention further includes a shield clamp for clamping the shield onto the workpiece. In a preferred embodiment, the invention further includes a non-reactive gas inlet for creating a pressurized cavity in the vicinity of the shielded portion of the workpiece.

Abstract: A multilayer copper structure has been provided for improving the adhesion of copper to a diffusion barrier material, such as TiN, in an integrated circuit substrate. The multilayer copper structure comprises a thin high-resistive copper layer to provide improved adhesion to the underlying diffusion barrier layer, and a low-resistive copper layer to carry the electrical current with minimum electrical resistance. The invention also provides a method to form the multilayer copper structure.

Abstract: A semiconductor processing system includes a chamber adapted to process a wafer, the chamber having an opening to facilitate access to the interior of the chamber. The system has a lid coupled to the chamber opening, the lid having an open position and a closed position. An actuator is connected to the lid to move the lid between the closed position and the open position. The system may include a floating pivot coupled to the lid and the actuator to align the lid with the opening when the lid closes.