Abstract: An optical time domain reflectometer including a light source and a light detector is calibrated using an optical directional coupler having a first port connected to the reflectometer and second and third ports connected to two opposite ends of an optical transmission member. Light pulses from the light source are introduced into the transmission member by way of one end thereof, and reflected and backscattered light from the transmission member is detected by the light detector. The reflectometer provides a display of the time relation between light pulses generated by the light source and electrical signals generated by the light detector, and the display is utilized in conjunction with a known propagation characteristic of the optical transmission member, to calibrate the reflectometer.

Abstract: An alkaline, cyanide, aqueous electroplating composition of copper, tin, and zinc includes a small amount of nickel to enhance the inclusion of tin in the copper-tin-zinc plate deposited from the solution. The plate resists tarnishing by a corrosion test solution, and retains its bright silvery-colored appearance because the plate preferably includes at least about 10.9 atomic wt % tin. The plating method for enhanced tin alloys through nickel additions to the bath is also described.

Abstract: Offset balancing method and apparatus for a DC amplifier including gain selection and polarity switching circuits are disclosed. During the offset compensation process, the amplifier input is connected to ground and its polarity is switched between the normal and inverted states before detecting the resulting output DC levels. The difference between such output DC levels is used to generate an offset compensation signal to be applied to the amplifier. The offset compensation process is repeated for each gain selection of the DC amplifier.

Abstract: A buffer amplifier input circuit includes both field-effect and bipolar transistors arranged in conjunction with an operational amplifier to provide very stable operation over a wide frequency range.

Abstract: A test pattern generator comprises vertical line pulse generating circuit (20) for generating a first pulse train (VL) and a second pulse train (Hi), the first pulse train being used to display vertical lines on a raster scan display apparatus and including, between successive pulses of the second pulse train, a number of pulses equal to the number of vertical lines. A horizontal sync pulse generating circuit (30) receives the second pulse train and generating a horizontal sync pulse train (M sync). A vertical blanking and sync pulse generating circuit (40, 42, 44, 46) is connected to the horizontal sync pulse generating circuit for generating a vertical sync pulse train (V sync) and a vertical blanking pulse train (Vb), and a horizontal line pulse generating circuit (50) generates a horizontal line pulse train (HL), used to display horizontal lines, in response to the horizontal sync pulse train and the vertical blanking pulse train.

Abstract: A waveform acquisition apparatus and method permits a plurality of samples of an input signal to be taken for each trigger recognition event, and stored at predetermined memory addresses to provide a complete equivalent-time waveform in which all accumulated samples are in correct time relation to each other. The mathematical determination of each address is obtained by measuring the time difference between a trigger recognition event on each cycle of a repetitive signal and a next occurring sample clock following each trigger recognition event, and then using a microprocessor to compute the relative addresses.

Abstract: A miniature electrical probe is provided with a pair of rotatable elongate tip electrodes for gripping a wire or component lead. In one embodiment, a sliding collar provides an operating mechanism for opening and closing the tips, and in a second embodiment, a lever provides an operating mechanism.

Abstract: A current-limiting circuit for a differential amplifier includes a voltage generator which is switched in parallel with a signal-current-generating impedance connected between the emitters of the differential amplifier transistors whenever an input signal exceeds the voltage of the voltage generator. A practical embodiment for limiting the current in either direction for opposite-polarity input signals includes a pair of voltage generators cross-coupled from a respective differential amplifier transistor base to the opposite transistor emitter via transistor switches.

Abstract: A ramp generator comprises an integrating capacitor and a current source connected to the capacitor to charge the capacitor and thereby generate a ramp signal. A switching device is connected to the capacitor and is operative to discharge the capacitor periodically in response to a periodic control signal applied to a control terminal of the switching device. A comparator has a first input terminal connected to a peak detector, which detects the peak value of the ramp signal, and a second input terminal connected to receive a reference voltage. The comparator compares the peak value of the ramp signal and the reference voltage and is connected to the current source to control the rate of supply of current to the capacitor in response to the comparison result so as to maintain a predetermined relationship between the amplitude of the ramp signal and the reference voltage, independently of the frequency of the control signal.

Abstract: A coating of metallic material is deposited on the internal surface of a hollow object. An elongate member comprising two electrical conductors extending side-by-side from end-to-end of the member has one end inside the hollow object and its opposite end outside the object. A filament has its two ends connected to the conductors respectively at the one end of the elongate member, and a crucible containing metal to be deposited is supported above the filament and in spaced relationship thereto. By supplying current to the filament by way of the conductors for the filament is heated to achieve thermonic emission. The filament and the crucible are connected to negative and positive terminals respectively of a potential source so that electrons emitted by the filament are accelerated towards the crucible and cause the crucible to be heated by electron bombardment.

Abstract: A high voltage attenuator is discussed which includes a divider having a signal input line and a plurality of signal output lines for providing an attenuated electrical signal on a selected one of the signal output lines in response to a switching control signal. A compensation means is also coupled to said divider means to provide signal compensation to the attenuated electrical signal in response to the switching control signal, together with switching control means coupled to the divider means to provide the switching control signal.

Abstract: A color shadow mask cathode ray tube has arrays of three phosphors deposited on the back of its faceplate. The color radiated by one of the phosphors corresponds to that which is produced when the colors radiated by the other two phosphors are combined.

Abstract: A CMOS integrated circuit made up of complementary insulated gate field effect transistors incorporates isolation trenches formed by a combination of thermal growth of silicon dioxide and chemical vapor deposition of polycrystalline silicon to prevent air gaps. Matching of the thermal coefficient of expansion of the trench with that of the substrate minimizes pn junction leakage currents as well as positive feedback latch-up operation. To reduce the ohmic contact resistance and interconnect resistance of the transistor elements, refractory metal silicide areas of low sheet resistance are contacted with the source, drain and gate elements. The process of manufacture also employs vertical walls of silicon nitride to prevent the formation of "birds' beak" portions of increased thickness in the silicon dioxide layer of each transistor, which could degrade the high frequency performance of the device.

Abstract: An improved bootstrapped shunt feedback amplifier is provided in which a minimum number of transistors are arranged to provide a higher slew rate of output voltage at lower power, while minimizing distortion and thus providing a more precise signal replication. Features include the use of three-terminal composite transistors to increase bandwidth and bootstrapping to improve amplifier response while reducing voltage stress on the active devices.

Abstract: A waveform measurement and display apparatus comprises a pair of signal-processing channels in addition to a sweep generator arranged so as to provide both Y-T and X-Y display modes. A time marker generator system is provided to insert time markers into the same relative time positions of the respective Y-T and X-Y displays so as to precisely ascertain the time relationship between the two displays. Additionally, such time markers may be inserted into corresponding time positions for expanded and unexpanded waveforms in the Y-T display mode so as to precisely ascertain the relative time position therebetween.

Abstract: A circuit is provided for encoding digital data to be recorded on high-density magnetic storage media. The circuit converts serial data to modified phase modulation encoded serial data with time encoding or write precompensation.

Abstract: A feedback amplifier is provided with a voltage-controlled compensation circuit which varies the effective feedback capacitance by controlling a proportional amount of feedback current returned via the capacitor to the amplifier summing node. The proportionality and current steering of the feedback current is effected by a multiplier circuit, the bias of which is controlled by an adjustable DC voltage. Several feedback amplifier configurations are shown herein, exemplifying the versatility of the compensation circuit of the present invention.

Abstract: An input apparatus for a logic analyzer is disclosed which receives a plurality of logic signals from a probe, the plurality of logic signals being received at different points in time, the input apparatus being capable of generating a corresponding plurality of logic signals in response thereto, the time of generation of the corresponding plurality of logic signals substantially coinciding with the time of generation of a corresponding reference logic signal. The input apparatus comprises a plurality of tapped delay lines corresponding to the plurality of received logic signals. A controller controls the amount of time delay for each delay line associated with each received logic signal. The controller continues this control function until the time of generation of the corresponding plurality of logic signals substantially coincides with the time of generation of the corresponding reference logic signal.

Abstract: A CMOS integrated circuit made up of complementary insulated gate field effect transistors incorporates isolation trenches formed by a combination of thermal growth of silicon dioxide and chemical vapor deposition of polycrystalline silicon to prevent air gaps. Matching of the thermal coefficient of expansion of the trench with that of the substrate minimizes pn junction leakage currents as well as positive feedback latch-up operation. To reduce the ohmic contact resistance and interconnect resistance of the transistor elements, refractory metal silicide areas of low sheet resistance are contacted with the source, drain and gate elements. The process of manufacture also employs vertical walls of silicon nitride to prevent the formation of "birds' beak" portions of increased thickness in the silicon dioxide layer of each transistor, which could degrade the high frequency performance of the device.

Abstract: A waveform measurement system includes a feature in which a readout of an absolute ground-reference voltage at a particular selectable time point along a waveform is provided. A ground reference potential is sampled and stored, and the instantaneous voltage value of the waveform at the time point is arithmetically combined with the reference potential to provide the measurement. Intensified dots, as well as horizontal volts cursors, are generated and displayed on the waveform at the ground reference and selected instantaneous voltage value positions.