Abstract: A system and method for receiving an input bit stream defining a non-interlaced video image and for producing concurrently an output bit stream defining an interlaced representation of such image. Intermediate storage of every other input raster line in a first-in/first-out oriented memory permits the output of the interlaced signal to be interleaved with the receipt of the non-interlaced input, and the interleaving of the input and output operations permits the use of a memory module having a capacity less than that required to store a complete raster line of input information. Provision is also made for synchronizing the output operation to U.S. or European standards.

Abstract: An amplitude limiter circuit is provided in which the output terminal is disconnected from the input terminal, or the input signal source, when the input signal amplitude exceeds the predetermined upper and/or lower limit. Voltage maintenance means maintains the output voltage when the amplitude limiting condition is reached.

Abstract: A multiple-feedback path bandpass/bandreject filter which exhibits a nearly constant Q over a predetermined frequency range, and which is tunable by means of a single variable impedance element is provided. A Thevenin equivalent voltage source is placed in series with the tuning element, wherein the Thevenin voltage is a predetermined constant fractional amplitude of the bandreject output voltage, or its equivalent.

Abstract: A substantially transparent interference shield wherein a flexible material employed to form an interlayer laminating a thin metal screen between two panels of glass is extended beyond the periphery of the panels a distance less than the screen so as to provide the necessary support permitting the shield to be mounted in a surrounding frame solely by clamping engagement of the extended screen. Provision is also made for the additional encapsulation within the flexible material of a resilient gasket employed to enhance electrical contact between the screen and the frame.

Abstract: A word recognizer probe to be removably incorporated with the mainframe of a logic analyzer is disclosed. The use of serial input-parallel output type memory means in the probe minimizes the number of interconnection signal paths between the probe and the mainframe regardless of the input bits to be recognized.

Abstract: A ground isolation monitoring apparatus having a protective circuit is provided for use between an AC power source and a utilization device, such as an electronic instrument. The protective circuit permits operation of the utilization device with earth ground disconnected, automatically reconnecting earth ground if a hazardous voltage or current appears on device chassis or exposed metal parts. The protective circuit also monitors neutral-to-earth ground continuity and shuts off AC power to the utilization device if the ground path opens or if the impedance thereof increases. Various other features may be provided to ensure safe operation of the device.

Abstract: Microchannel plates having increased gain and significantly improved aging characteristics are provided by forming a thin film of a cesium compound on the channel walls. In an exemplary embodiment, a surface film of cesium hydroxide is applied to the interior wall surfaces of an MCP by saturating the plate with a solution of the compound, then allowing the solvent to evaporate. The cesium hydroxide residue on the walls subsequently is converted to cesium oxide by a high temperature bake.

Abstract: A pulse generator output stage is provided with a current boost circuit to generate additional current substantially contemporaneously with pulse transitions in order to achieve fast output risetimes and falltimes. Switched current generators are arranged to produce a square-wave current having current spikes on the rising and falling edges to rapidly charge and discharge inherent circuit capacitances and thereby produce square-wave voltage pulses with a minimum of power consumption.

Abstract: A glitch detector for use in a sampled data acquisition system is disclosed. Glitch detection is provided by a flip-flop which is set on a first signal transition, conditioning a logic gate, the output of which changes logic states on a second signal transition. Two such glitch detectors operatively associated with complementary data signals permits detection of either positive-going or negative-going glitches within a sample clock period. A glitch indication flip-flop is reset by a glitch detection signal, providing a glitch indication signal to an output terminal via a latch. Control and reset circuits are provided to facilitate glitch detection on every cycle of the sample clock, and at any point within a sample clock period.

Abstract: A digital oscilloscope is provided with a position control circuit which permits positioning of a signal both before and after digitizing. A track and hold circuit is coupled to the position control potentiometer to generate a reference voltage which tracks the position voltage in a waveform acquisition mode, and which is held at a fixed level in a display mode while the position voltage, which is applied to the acquisition preamp, is variable adjustable. A summation circuit subtracts the reference voltage from the position voltage to provide an altered positioning voltage for the display amplifier which is zero in the acquisition mode and variable in the display mode.

Abstract: A sweep control circuit and method for maintaining a constant swept frequency range of a voltage-controlled oscillator when switching between linear and non-linear sweeping functions is provided. The sweep control circuit includes a linear amplifier and an antilogarithmic amplifier, each of which has an output voltage window that is matched to the linear dynamic range of the CVO. Independently selected start and stop voltages are adjustable over the entire linear range of the VCO to set the lower and upper frequency limits as desired for either a linear or a logarithmic sweep. Log converters are utilized to map the linear start and stop voltages to logarithmic counterparts so that the VCO frequency does not shift when switching from one function to the other. This permits a single start frequency control and a single stop frequency control to be employed. A ramp voltage, which is appropriately scaled for both the linear and logarithmic functions, is applied to sweep the VCO.

Abstract: An intermodulation test analyzer which automatically determines whether an SMPTE or CCIF intermodulation test is being conducted and switches its output accordingly is disclosed. This is accomplished by sensing the low frequency energy content of the test signal. This energy content is compared to a reference level representative of the low frequency energy content of a typical SMPTE test signal. Therefore, if the low frequency energy content of the input signal is greater than the reference level, the signal is treated as the SMPTE test signal. However, if the low frequency energy content is less than the reference level, the signal is processed as a CCIF test signal.

Abstract: Disclosed herein is a circuit for protecting an inhibitable tristate data driver from damage due to an over current. A logic comparator circuit compares input and output logic levels of the data driver, and inhibits the driver causing the output to go to a tristate if a fault occurs.

Abstract: A linear wideband differential amplifier includes a variable gain stage comprising two cross-coupled differential amplifiers and differential current source to compensate for thermal distortion, to minimize transient response distortion, and to eliminate signal attenuation at the center gain setting.

Abstract: A supply voltage driver for one or more monolithic differential amplifiers sharing common power supplies comprises an additional monolithic differential amplifier operated as a voltage follower suspended between a current source and a current sink. Reference Zener diodes are coupled between the voltage follower output and the power supply terminals of the differential amplifiers to establish operating voltages which track an input signal. Additional current-boosting transistors are provided to provide fast slew rate during signal transitions. Overdrive circuitry is provided to limit the maximum and minimum signal levels.

Abstract: An improved bistable storage target structure for a cathode-ray tube includes a faceplate-supported transparent target electrode covered by a transparent insulating layer. Overlying the insulating layer is an apertured web collector electrode and a storage component of secondary emissive material formed by a plurality of phosphor deposits disposed within the web apertures. A patterned layer of insulating material is provided overlying the web electrode to isolate the phosphor deposits from the collector electrode.

Abstract: Two multiplying digital-to-analog converters are used to digitally weight an analog current to produce a controllable output current. The output current is selected by a digital control signal applied to the control inputs of both converters. Two-quadrant operation is ensured by feeding the analog output of each converter to a current mirror amplifier which develops the required output current.

Abstract: A circuit is provided for encoding digital data to be recorded on high-density magnetic storage media. The circuit converts serial data to modified phase modulation encoded serial data with time encoding or write precompensation.

Abstract: This disclosure describes an electrical connector for joining microcircuit or microcircuit modules, such as leadless integrated or hybrid circuit carriers to utilization means, such as printed or etched circuit boards or similar means. The electrical contacts through which the microcircuit and utilization means are connected are formed and etched in place on an elastomeric material, precisely located; the material acting as a restoring force to maintain connection. The connector when used in a system maintains transmission line mediums in a single environment.

Abstract: Electrographic paper is fed over a segmented platen where its dielectric surface receives image defining electrostatic charges deposited by styli bearing directly and successively upon it. The styli are integral to an endless belt moving laterally to the surface. Voltage pulses corresponding to the input information are applied to the segmented platen to produce the electrostatic charges. The latent image charged surface is progressively fed to an image toning and fixing cycle to produce a hard copy.